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The World Leader in High Performance Signal Processing SolutionsFundamentals of Laying    Out PC Boards        Jack Ardizz...
Todays Agenda PCB   Layout Overview Schematic Critical Component Location and Signal Routing Power Supply Bypassing P...
Overview What  is high speed? For Op Amps we consider anything    >50MHz to be high speed. PCB    layout is one of the f...
The World Leader in High Performance Signal Processing SolutionsSchematic
SchematicA   good layout starts with a good Schematic! The schematic is the blueprint for the PCB Schematic flow and co...
Schematic                          +5V    C1                                         0.1uF                                ...
The World Leader in High Performance Signal Processing SolutionsCritical Component Placement      and Signal Routing
Critical Component Placement and SignalRoutingJust  as in real estate location is everything!Input/output and power conn...
Critical Component Placement and SignalRouting                                    Ground                                  ...
Critical Component Placement and SignalRouting                  Connector        Digital                 ADC        ADC   ...
Critical Component Placement and SignalRouting                         Connector        Digital                        ADC...
Critical Component Placement and SignalRouting                      Connector              Temp                           ...
Critical Component Placement and SignalRouting                                               Input ConnectorWrong Way     ...
Critical Component Placement and SignalRoutingWrong Way                                                          Resistor ...
Critical Component Placement and SignalRouting                                                          ResistorWrong Way ...
Critical Component Placement and SignalRouting                                                          ResistorWrong Way ...
Critical Component Placement and SignalRouting                            Resistor                                        ...
The World Leader in High Performance Signal Processing SolutionsSignal Routing
Signal RoutingOp Amp Packaging and Pinout Packaging plays a large role in high-speed applicationsSmaller packages  Bette...
Op Amp SOIC Packaging Traditional            SOIC-8 layout Feedback routed around or underneath amplifier
Op Amp SOIC Packaging Traditional            SOIC-8 layout Feedback routed around or underneath amplifier
Op Amp SOIC Packaging Traditional            SOIC-8 layout Feedback routed around or underneath amplifier
Analog Devices Low DistortionDedicated Feedback Pinout                                        Original Pin-Out Pinout   e...
Low distortion (dedicated feedback) pinoutenables compact and streamline layout
00:09:52AD8099 Harmonic Distortion Vs. FrequencyCSP and SOIC Packages                               Improvement           ...
Signal Routing Many     different signals exist on boards      Analog,   digital, low voltage, high voltage, and RF to n...
Crosstalk and Coupling Capacitive Crosstalk or Coupling   This results from traces running on top of each other, which f...
The World Leader in High Performance Signal Processing SolutionsPower Supply Bypassing
Power Supply Bypassing Bypassingis essential to high speed circuit performance
Power Supply Bypassing Bypassing  is essential to  high speed circuit  performance Capacitors right at power  supply pins
Power Supply Bypassing Bypassing  is essential to  high speed circuit  performance Capacitors right at power  supply pin...
Power Supply Bypassing Bypassing  is essential to  high speed circuit                                          L1  perfor...
Power Supply Bypassing Bypassing  is essential to  high speed circuit  performance Capacitors right at power  supply pin...
Power Supply Bypassing Bypassing  is essential to  high speed circuit  performance Capacitors right at power  supply pin...
Optimized Load and Bypass CapacitorPlacement and Ground Return                              Tantalum                      ...
Power Supply BypassingBoard Capacitance                                              Component/signal side 4 layer stack u...
Power Supply BypassingPower Plane Capacitance                              *   *Courtesy of Lee Ritchey
Power Supply BypassingCapacitor Model ESR(Equivalent Series Resistance)    Rs                                           ...
Capacitor Choices                                            *                              0603   0612   *Courtesy of Lee...
Power Supply Bypassing Bypassing  is essential to  high speed circuit  performance Capacitors right at power  supply pin...
Power Supply Bypassing Bypassing  is essential to high  speed circuit performance Capacitors right at power  supply pins...
Multiple Parallel Capacitors                                               0.01µF                                 1µF     ...
The World Leader in High Performance Signal Processing SolutionsParasitics
Parasitics      PCB parasitcs take the    Parasitics degrade and          form of hidden         distort performance      ...
Trace/Pad Capacitance                                    d                      A                       kA                ...
Trace/Pad Capacitance                                    d    Example: Pad of SOIC                      A                 ...
Trace/Pad Capacitance                                            Example: Pad of SOIC                                     ...
Approximate Trace Inductance                               All dimensions are in mm50
Approximate Trace Inductance                                           All dimensions are in mm                       Exam...
Approximate Trace Inductance                                                    All dimensions are in mm                 E...
Via Parasitics     Via Inductance                                      Via Capacitance                                    ...
Via Placement*0603and 0402     *Courtesy of Lee Ritchey54
Capacitor Parasitic Model         RP                RS           L                                r                       ...
Resistor Parasitic Model              CP                 L                         R          R = Resistor          CP = P...
Low Frequency Op Amp Schematic57
High Speed Op AmpSchematic58
High Frequency Op AmpSchematic     Stray Capacitance59
Stray Capacitance Simulation Schematic
Frequency Response with 1.5pF StrayCapacitance            1.5dB peaking
Stray InductanceStray Inductance
Parasitic Inductance Simulation Schematic                         24.5mm x .25mm” =29nH
Pulse Response With and Without GroundPlane                 0.6dB overshoot
The World Leader in High Performance Signal Processing SolutionsGround and Power Planes
Ground and Power Planes ProvideA  common reference point Shielding Lowers noise Reduces parasitics Heat sink Power d...
Ground Plane Recommendations There  is no single grounding method which is guaranteed to  work 100% of the time! At leas...
Checking the layout If   possible have another set     of eyes (or more) take a look     at your layout.68
Checking the layout Ifpossible have another set  of eyes (or more) take a look  at your layout. Colored pencils69
Checking the layout Ifpossible have another set  of eyes (or more) take a look  at your layout. Colored pencils Sit wit...
The World Leader in High Performance Signal Processing SolutionsSummary
Summary High  speed PCB design requires deliberate thought and attention to  detail! Load the schematic with as much inf...
References Special    Thanks and acknowledgement to Lee Ritchey for use of     plots and material for this presentation....
References DiSanto,   Greg, “Proper PC-Board Layout Improves Dynamic  Range,” EDN, November 11, 2004. Grant, Doug and Sc...
Next FUNDAMENTAL webcasts Frequency     Synthesis, Part I: Phased Locked Loops (PLL)  March    7th at 12pm (EST) Freque...
THANK YOU
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PCB Layout Fundamentals

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PCB Layout Fundamentals

  1. 1. The World Leader in High Performance Signal Processing SolutionsFundamentals of Laying Out PC Boards Jack Ardizzoni Analog Devices February 2012
  2. 2. Todays Agenda PCB Layout Overview Schematic Critical Component Location and Signal Routing Power Supply Bypassing Parasitics, Vias and Placement Ground Plane Layout Review Summary2
  3. 3. Overview What is high speed? For Op Amps we consider anything >50MHz to be high speed. PCB layout is one of the final steps in the design process and often not given the attention it deserves. High Speed circuit performance is heavily dependant on board layout. Today we will address  Practicallayout guidelines that:  Improve the layout process  Help ensure expected circuit performance  Reduce design time  Lower design cost3
  4. 4. The World Leader in High Performance Signal Processing SolutionsSchematic
  5. 5. SchematicA good layout starts with a good Schematic! The schematic is the blueprint for the PCB Schematic flow and content are essential Include as much information as you can  Notes that include tolerance and case size  Critical component placement  Tuning or alignment procedures  Board stack up  Controlled impedance lines  Thermal issues  Component de-rating and reliability information5
  6. 6. Schematic +5V C1 0.1uF Place this cap right at pin 14 to digital ground Put C4 and C7 on back of board right under the R6 power supply pin. 40 MHz 301 U1 S1 Must be right at 40 MHz C4 op amp supply OSC Out +5V 2.2uF pins + Run 40MHz traces on bottom of the board ensure signal C5 trace is the same length 0.01uF R4 U2 40 MHz 210 OSC Out - R7 50 R3 R5 R1 562 ADA4860- VOUT 562 C6 1K + 1 VIN 0.01uF R2 C2 C3 50 C7 +5V SAT SAT 2.2uF Must be right at + op amp supply FREQUENCY ADJUST -5V pins 1.0 C2=C3, use these 2 capacitors to adjust the -3dB BW See critical component placement drawing for location U3 Linear Regulator D1 +5 U4 1N4148 V Temperature Derating Table +12V ADP667 ITEM REF DES VALUE RATING ACTUAL +5 Sensor 1 R1 1K 62mW 10mW C8 + + C12 V 2 R2 10uF 10uF 3 R3 Case +5V Case AD590 4 C1 VOUT size C9 C11 size 5 C2 6 C3 1210 0.01 0.1uF 1210 7 U1 D2 uF Linear Regulator -5V R8 8 U2 1N4148 1K -12V U5 -5V C13 C16 10uf + + 10uF Case Case size size 1210 1210 C14 C15 0.1uF 0.1uF NOTES: BOARD STACK UP 1.0 All resistors and capacitors are 0603 case size unless noted otherwise. 2.0 All Resistors in ohms unless noted otherwise. Signal 1 3.0 All capacitors in pF unless noted otherwise. Analog Ground 1 4.0 Run analog traces on Signal 1 layer, run digital traces on Signal 2 layer Power plane 5.0 Remove ground plane on all layers under the mounting pins of U2 0.062" Digital Ground 6.0 U1 SOIC-14, U2 SOT-23-6, U3, SOIC-8, U4 SOIC-8 Analog Ground 2 Signal 26
  7. 7. The World Leader in High Performance Signal Processing SolutionsCritical Component Placement and Signal Routing
  8. 8. Critical Component Placement and SignalRoutingJust as in real estate location is everything!Input/output and power connections on a board are typically definedCritical Component location and Signal routing require deliberate thought and planning8
  9. 9. Critical Component Placement and SignalRouting Ground or power plane
  10. 10. Critical Component Placement and SignalRouting Connector Digital ADC ADC RF Driver Power Conditioning Temp Analog Sensor
  11. 11. Critical Component Placement and SignalRouting Connector Digital ADC Signal ADC RF Driver Power Power Conditioning Temp Analog Sensor Poor Placement
  12. 12. Critical Component Placement and SignalRouting Connector Temp Sensor Digital RF Signal Power Conditioning ADC Power Driver Analog ADC Improved Placement
  13. 13. Critical Component Placement and SignalRouting Input ConnectorWrong Way Resistor Clock Analog Digital Circuitry Circuitry Circuitry Sensitive Analog Circuitry Disrupted by Digital Supply Noise ID IA INCORRECT + + ANALOG DIGITAL VD VA VIN CIRCUITS CIRCUITS GND IA + I D ID REF
  14. 14. Critical Component Placement and SignalRoutingWrong Way Resistor Clock Analog Digital Circuitry Circuitry Circuitry Sensitive Analog Circuitry Disrupted by Digital Supply Noise ID IA INCORRECT + + ANALOG DIGITAL VD VA VIN CIRCUITS CIRCUITS GND IA + I D ID REF
  15. 15. Critical Component Placement and SignalRouting ResistorWrong Way Clock Circuitry Analog Circuitry Digital Circuitry Sensitive Analog Circuitry Disrupted by Digital Supply Noise ID IA INCORRECT + + ANALOG DIGITAL VD VA VIN CIRCUITS CIRCUITS GND IA + ID ID REF
  16. 16. Critical Component Placement and SignalRouting ResistorWrong Way Clock Circuitry Analog Circuitry Digital Circuitry Sensitive Analog Circuitry Disrupted by Digital Supply Noise ID IA INCORRECT + + ANALOG DIGITAL VD VA VIN CIRCUITS CIRCUITS Voltage Drop Voltage Drop GND IA + ID ID REF
  17. 17. Critical Component Placement and SignalRouting Resistor Analog CircuitryRight Way Digital Circuitry Sensitive Analog Circuitry Safe from Clock Digital Supply Noise Circuitry ID IA CORRECT + + ANALOG DIGITAL VD VA VIN CIRCUITS CIRCUITS GND IA REF ID
  18. 18. The World Leader in High Performance Signal Processing SolutionsSignal Routing
  19. 19. Signal RoutingOp Amp Packaging and Pinout Packaging plays a large role in high-speed applicationsSmaller packages  Betterat high speeds/high frequency  Compact layout  Less parasitics Analog Devices Low Distortion (dedicated feedback) Pinout  Compact layout  Streamline signal flow  Lower distortion
  20. 20. Op Amp SOIC Packaging Traditional SOIC-8 layout Feedback routed around or underneath amplifier
  21. 21. Op Amp SOIC Packaging Traditional SOIC-8 layout Feedback routed around or underneath amplifier
  22. 22. Op Amp SOIC Packaging Traditional SOIC-8 layout Feedback routed around or underneath amplifier
  23. 23. Analog Devices Low DistortionDedicated Feedback Pinout Original Pin-Out Pinout enables compact layout FB NC 1 8 Disable Lower distortion –IN 2 - 7 +VS Improved thermal +IN 3 + 6 VOUT performance –VS 4 5 NC LFCSP  AD8099, AD8045, AD8000, ADA4899, ADA4857, ADA4817 Also used on Differential Amplifiers
  24. 24. Low distortion (dedicated feedback) pinoutenables compact and streamline layout
  25. 25. 00:09:52AD8099 Harmonic Distortion Vs. FrequencyCSP and SOIC Packages Improvement 10dB at 1MHz 14dB at 10MHz26
  26. 26. Signal Routing Many different signals exist on boards  Analog, digital, low voltage, high voltage, and RF to name a few Ground and power planes can help provide shielding  Microstrip, stripline Isolation  Physical separation  Minimize long parallel runs  Minimize long trace on adjacent layers  Run traces orthogonal on adjacent layers  Guard rings  Differential signals27
  27. 27. Crosstalk and Coupling Capacitive Crosstalk or Coupling  This results from traces running on top of each other, which forms a parasitic capacitor  Solutions run traces orthogonal, to minimize trace coupling and lower area profile Inductive Crosstalk  Inductive crosstalk exists due to the magnetic field interaction between long traces parallel traces  There are two types of inductive crosstalk; forward and backward  Backward is the noise observed nearest the driver on the victim trace  Forward is the noise observed farthest from the driver on the driven line Minimize crosstalk by  Increasing trace separation (improving isolation)  Using guard traces  Using differential signals28
  28. 28. The World Leader in High Performance Signal Processing SolutionsPower Supply Bypassing
  29. 29. Power Supply Bypassing Bypassingis essential to high speed circuit performance
  30. 30. Power Supply Bypassing Bypassing is essential to high speed circuit performance Capacitors right at power supply pins
  31. 31. Power Supply Bypassing Bypassing is essential to high speed circuit performance Capacitors right at power supply pins  Capacitors provide low impedance AC return  Provide local charge storage for fast rising/falling edges
  32. 32. Power Supply Bypassing Bypassing is essential to high speed circuit L1 performance +VS IC Capacitors right at power 1nH supply pins C1 0.1µF  Capacitors provide low impedance AC return  Provide local charge storage for fast rising/falling edges EQUIVALENT DECOUPLED POWER LINE CIRCUIT RESONATES AT: Keep trace lengths short 1 f = 2p  LC f = 16MHz
  33. 33. Power Supply Bypassing Bypassing is essential to high speed circuit performance Capacitors right at power supply pins  Capacitors provide low impedance AC return  Provide local charge storage for fast rising/falling edges Keep trace lengths short
  34. 34. Power Supply Bypassing Bypassing is essential to high speed circuit performance Capacitors right at power supply pins  Capacitors provide low impedance AC return  Provide local charge storage for fast rising/falling edges Keep trace lengths short Close to load return  Helps minimize transient currents in the ground plane
  35. 35. Optimized Load and Bypass CapacitorPlacement and Ground Return Tantalum C RF RG AD80XX RT 0 0 RL C Tantalum
  36. 36. Power Supply BypassingBoard Capacitance Component/signal side 4 layer stack up A Ground plane Power plane d Circuit side K = relative dielectric constant kA C= A = area in cm2 11.3d d = spacing between plates in cm37
  37. 37. Power Supply BypassingPower Plane Capacitance * *Courtesy of Lee Ritchey
  38. 38. Power Supply BypassingCapacitor Model ESR(Equivalent Series Resistance)  Rs * Capacitance  XC = 1/2πfC ESL(Equivalent Series Inductance)  XL=2πfL Effective Impedance Z  Rs 2  ( XL  XC ) 2 At Series resonance  XL=XC *Courtesy of Lee Ritchey Z =R
  39. 39. Capacitor Choices * 0603 0612 *Courtesy of Lee Ritchey
  40. 40. Power Supply Bypassing Bypassing is essential to high speed circuit performance Capacitors right at power supply pins  Capacitors provide low impedance AC return  Provide local charge storage for fast rising/falling edges Keep trace lengths short Close to load return  Helps minimize transient currents in the ground plane Values  Individual circuit performance
  41. 41. Power Supply Bypassing Bypassing is essential to high speed circuit performance Capacitors right at power supply pins  Capacitors provide low impedance AC return  Provide local charge storage for fast rising/falling edges Keep trace lengths short Close to load return  Helps minimize transient currents in the ground plane Values  Individual circuit performance  Maintains low AC impedance  Multiple resonances
  42. 42. Multiple Parallel Capacitors 0.01µF 1µF 330µF 0.1µF * 1 x 330µF T520, 1 x 1.0µF 0603, 2 x 0.1µF 0603, and 6 x 0.01µF 0603 2 x (1 x 330µF T520, 1 x 1.0µF 0603, 2 x 0.1µF 0603, and 6 x 0.01µF 0603) *Courtesy of Lee Ritchey
  43. 43. The World Leader in High Performance Signal Processing SolutionsParasitics
  44. 44. Parasitics PCB parasitcs take the Parasitics degrade and form of hidden distort performance capacitors, inductors and resistors in the PCB46
  45. 45. Trace/Pad Capacitance d A kA C 11.3d K = relative dielectric constant A = area in cm2 d = spacing between plates in cm47
  46. 46. Trace/Pad Capacitance d Example: Pad of SOIC A L = 0.2cm W = 0.063cm K= 4.7 A = 0.126cm2 kA C d = 0.073cm 11.3d C = 0.072pF K = relative dielectric constant A = area in cm2 d = spacing between plates in cm48
  47. 47. Trace/Pad Capacitance Example: Pad of SOIC L = 0.2cm W = 0.063cm d K= 4.7 A A = 0.126cm2 d = 0.073cm kA C = 0.072pF C 11.3d K = relative dielectric constant Reduce Capacitance A = area in cm2 1) Increase board thickness d = spacing between plates in cm 2) Reduce trace/pad area 3) Remove ground plane49
  48. 48. Approximate Trace Inductance All dimensions are in mm50
  49. 49. Approximate Trace Inductance All dimensions are in mm Example L= 25.4mm W = .25mm H = .035mm (1oz copper) Strip Inductance = 28.8nH At 10MHz ZL = 1.86  a 3.6% error in a 50 system51
  50. 50. Approximate Trace Inductance All dimensions are in mm Example Minimize Inductance L= 2.54cm =25.4mm 1) Use Ground plane W = .25mm 2) Keep length short (halving H = .035mm (1oz copper) the length reduces inductance by 44%) Strip Inductance = 28.8nH 3) Doubling width only At 10MHz ZL = 1.86  a 3.6% error reduces inductance by in a 50 system 11%52
  51. 51. Via Parasitics Via Inductance Via Capacitance 0.55 rTD1   4h   C L  2h ln    1 nH D2  D1  d   D2 = diameter of clearance hole in the L = inductance of the via, nH ground plane, cm D1 = diameter of pad surrounding via, cm H = length of via, cm T = thickness of printed circuit board, cm D = diameter of via, cm  r = relative electric permeability of circuit board material C = parasitic via capacitance, pF H= 0.157 cm thick board, D= 0.041 cm T = 0.157cm, D1=0.071cm D2 = 0.127   4(0.157)   L  2(0.157) ln    1   0.041   C = 0.51pf L = 1.2nh53
  52. 52. Via Placement*0603and 0402 *Courtesy of Lee Ritchey54
  53. 53. Capacitor Parasitic Model RP RS L r C RDA CDA C = Capacitor RP = insulation resistance RS = equivalent series resistance (ESR) L = series inductance of the leads and plates RDA = dielectric absorption CDA = dielectric absorption55
  54. 54. Resistor Parasitic Model CP L R R = Resistor CP = Parallel capacitance L= equivalent series inductance (ESL)56
  55. 55. Low Frequency Op Amp Schematic57
  56. 56. High Speed Op AmpSchematic58
  57. 57. High Frequency Op AmpSchematic Stray Capacitance59
  58. 58. Stray Capacitance Simulation Schematic
  59. 59. Frequency Response with 1.5pF StrayCapacitance 1.5dB peaking
  60. 60. Stray InductanceStray Inductance
  61. 61. Parasitic Inductance Simulation Schematic 24.5mm x .25mm” =29nH
  62. 62. Pulse Response With and Without GroundPlane 0.6dB overshoot
  63. 63. The World Leader in High Performance Signal Processing SolutionsGround and Power Planes
  64. 64. Ground and Power Planes ProvideA common reference point Shielding Lowers noise Reduces parasitics Heat sink Power distribution High value capacitance66
  65. 65. Ground Plane Recommendations There is no single grounding method which is guaranteed to work 100% of the time! At least one layer on each PC board MUST be dedicated to ground plane! Provide as much ground plane as possible especially under traces that operate at high frequency Use thickest metal as feasible (reduces resistance and provides improved thermal transfer) Use multiple vias to connect same ground planes together Do initial layout with dedicated plane for analog and digital ground planes, split only if required Follow recommendations on mixed signal device data sheet. Keep bypass capacitors and load returns close to reduce distortion Provide jumper options for joining analog and digital ground planes together67
  66. 66. Checking the layout If possible have another set of eyes (or more) take a look at your layout.68
  67. 67. Checking the layout Ifpossible have another set of eyes (or more) take a look at your layout. Colored pencils69
  68. 68. Checking the layout Ifpossible have another set of eyes (or more) take a look at your layout. Colored pencils Sit with the designer when board corrections are made70
  69. 69. The World Leader in High Performance Signal Processing SolutionsSummary
  70. 70. Summary High speed PCB design requires deliberate thought and attention to detail! Load the schematic with as much information as possible Where you put components on the board is just as important as to where you put entire circuits Take the lead when laying out your board, don’t leave anything to chance Use multiple capacitors for power supply bypassing Parasitics must be considered and dealt with Ground and Power planes play a key role in reducing noise and parasitics New packaging and pinouts allow for improved performance and more compact layouts There are many options for signal distribution, make sure you choose the right one for your application Check the layout very carefully72
  71. 71. References Special Thanks and acknowledgement to Lee Ritchey for use of plots and material for this presentation. Lee Ritchey “Right the first time” ISBN 0-9741936-0-7 http://www.speedingedge.com/ Ardizzoni, John “A Practical Guide to High-Speed Printed-Circuit- Board Layout ” Ardizzoni, John, “Keep High-Speed Circuit-Board Layout on Track,” EE Times, May 23, 2005. Brokaw, Paul, “An IC Amplifier User’s Guide to Decoupling, Grounding, and Making Things Go Right for a Change,” Analog Devices Application Note AN-202. Brokaw, Paul and Jeff Barrow, “Grounding for Low- and High- Frequency Circuits,” Analog Devices Application Note AN-345. Buxton, Joe, “Careful Design Tames High-Speed Op Amps,” Analog Devices Application Note AN-257.73
  72. 72. References DiSanto, Greg, “Proper PC-Board Layout Improves Dynamic Range,” EDN, November 11, 2004. Grant, Doug and Scott Wurcer, “Avoiding Passive-Component Pitfalls,” Analog Devices Application Note AN-348 Johnson, Howard W., and Martin Graham, High-Speed Digital Design, a Handbook of Black Magic, Prentice Hall, 1993. Jung, Walt, ed., Op Amp Applications Handbook, Elsevier-Newnes, 2005 available on Amazon.com Kester, Walt, The Data Conversion Handbook, Elsevier-Newnes, 2005 available on Amazon.com74
  73. 73. Next FUNDAMENTAL webcasts Frequency Synthesis, Part I: Phased Locked Loops (PLL)  March 7th at 12pm (EST) Frequency Synthesis, Part I: Direct Digital Synthesis (DDS)  April 11th at 12pm (EST) www.analog.com/webcast
  74. 74. THANK YOU

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