K – Unlocked (adjustable CPU ratio up to 57 bins)P – Versions clocked slightly higher than similar models, but with onboard-graphics deactivated.S – Performance-optimized lifestyle (low power with 65W TDP)T – Power-optimized lifestyle (ultra low power with 35-45W TDP)X – Extreme performance (adjustable CPU ratio with no ratio limit)M – Mobile processorsXM – UnlockedQM – Quad-coreE – Embedded mobile processorsQE – Quad-coreLE – Performance-optimizedUE – Power-optimized
Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture.Complementary metal–oxide–semiconductor (CMOS) is a technology for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital logic circuits.“Tick-Tock" is a model adopted by chip manufacturer Intel Corporation since 2007 to follow every microarchitectural change with a die shrink of the process technology. Every "tick" is a shrinking of process technology of the previous microarchitecture and every "tock" is a new microarchitecture. Every year, there is expected to be one tick or tock.http://en.wikipedia.org/wiki/Multigate_device#Tri-gate_transistors
With 22nm process we can pack 1.4 billion transistor.
Intel Management Engine (ME)Platform Environment Control Interface (PECI)
Intel recommends enabling Intel® HT Technology with Microsoft Windows 7*, Microsoft Windows Vista*, Microsoft Windows* XP Professional/Windows* XP Home* Not supported in 3550S
Maximum frequency is dependent on the SKU and number of active cores.
Hardware-level technology disables your device even if the hard drive is removed, replaced, or reformattedIntel® AT detects suspicious behavior. For example, your laptop will automatically lock down if it fails to check-in over the Internet at a pre-set time with your service provider.When your device is recovered, it can be quickly restored with your one-time password—without damage to your personal data.
Core i5 is using the Ivy Bridge microarchitecture. Ivy Bridge is the codename for an Intel microprocessorusing the Sandy Bridge microarchitecture. Ivy Bridge uses a 22 nanometer process.The IvyBridge die shrink, known in the IntelTick-Tock modelas the "tick", is based on 3D tri-gate transistors. Inteldemonstrated Ivy Bridge processors in 2011.
Status LaunchedLaunch Date Q212Processor Number i5-3550S# of Cores 4# ofThreads 4Clock Speed 3 GHzMaxTurbo Frequency 3.7 GHzIntel® Smart Cache 6 MBBus/Core Ratio 30DMI 5 GT/sInstruction Set 64-bitInstruction Set Extensions SSE4.1/4.2,AVXEmbeddedOptionsAvailable YesLithography 22 nm
Graphics SpecificationsProcessorGraphics Intel® HD Graphics 2500Graphics Base Frequency 650 MHzGraphics Max Dynamic Frequency 1.15 GHzIntel®Quick SyncVideo YesIntel® InTru™ 3DTechnology YesIntel® Insider™ YesIntel®Wireless Display YesIntel® Flexible Display Interface (Intel®FDI)YesIntel®ClearVideo HDTechnology Yes# of Displays Supported 3
AdvancedTechnologiesIntel®Turbo BoostTechnology 2.0Intel® vProTechnology YesIntel® Hyper-ThreadingTechnology NoIntel®VirtualizationTechnology (VT-x) YesIntel®VirtualizationTechnology forDirected I/O (VT-d)YesIntel®Trusted ExecutionTechnology YesAES New Instructions YesIntel® 64 YesIntel®Anti-TheftTechnology YesIdle States YesEnhanced Intel SpeedStep®Technology YesThermal MonitoringTechnologies YesExecute Disable Bit YesIntel®VT-x with Extended PageTables(EPT)Yes
PEG port upper pre-fetchable base/limitregisters.This allows the PEG unit to claimI/O accesses above 32 bit. Addressing of greater than 4 GB is allowed oneither the DMI Interface or PCI Express*(PCIe*) interface. The processor supports a maximum of 32 GBof DRAM. No DRAM memory will beaccessible above 32 GB.
Processor contains more than 430 registers. PCI Device 0 Function 0 Configuration Space Registers. PCI Device 1 Function 0–2 Configuration Space Registers. PCI Device 1 Function 0–2 Extended Configuration Registers. PCI Device 2 Configuration Space Registers. Device 2 IO Registers. PCI Device 6 Registers. PCI Device 6 Extended Configuration Registers. Direct Media Interface Base Address Registers (DMIBAR). MCHBAR Registers in Memory Controller Channel 0 Registers. MCHBAR Registers in Memory Controller Channel 1. MCHBAR Registers in Memory Controller Integrated Memory Peripheral Hub (IMPH). MCHBAR Registers in Memory Controller Common. Memory Controller MMIO Registers Broadcast Group Registers. Integrated GraphicsVTd Remapping Engine Registers. PCU MCHBAR Registers. PXPEPBAR Registers. Default PEG/DMIVTd Remapping Engine Registers.
A 32-KB instruction and 32-KB data first-levelcache (L1) for each core A 256-KB shared instruction / data second-level cache (L2) for each core Up to 8-MB shared instruction / data third-level cache (L3), shared among all cores.
The ring design isquite simple and hasmany advantages:shortest path, easilyscalable to includemore cores ifrequired.
AdvancedTechnologies Makes a single system appear as multipleindependent systems to software. This allows multiple, independentoperating systems to run simultaneouslyon a single system. IntelVirtualizationTechnology forDirected I/O (IntelVT-d) adds chipsethardware implementation to support andimprove I/O virtualization performanceand robustness.Intel®VirtualizationTechnology (VT-x)Intel®VirtualizationTechnology for DirectedI/O (VT-d)
AdvancedTechnologies Defines platform-level enhancements thatprovide the building blocks for creatingtrusted platforms. provide the authenticity of the controllingenvironment such that those wishing to rely onthe platform can make an appropriate trustdecision. determines the identity of the controllingenvironment by accurately measuring andverifying the controlling software.Intel®Trusted ExecutionTechnology
AdvancedTechnologies Allows an execution core to function astwo logical processors. While some execution resources such ascaches, execution units, and buses areshared, each logical processor has its ownarchitectural state with its own set ofgeneral-purpose registers and controlregisters. This feature must be enabled using theBIOS and requires operating systemsupport.Intel® Hyper-ThreadingTechnology*
AdvancedTechnologies Allows the processor core toopportunistically and automatically runfaster than its rated operatingfrequency/render clock if it is operatingbelow power, temperature, and currentlimits. The IntelTurbo BoostTechnology featureis designed to increase performance ofboth multi-threaded and single-threadedworkloads.Intel®Turbo BoostTechnology
AdvancedTechnologies is a set of security and manageabilitycapabilities built into the processor aimedat addressing four critical areas of ITsecurity Threat management, including protection fromrootkits, viruses, and malware. Identity and web site access point protection . Confidential personal and business dataprotection. Remote and local monitoring, remediation, andrepair of PCs and workstations.Intel® vProTechnology
AdvancedTechnologies Intel® 64 architecture delivers 64-bitcomputing on server, workstation,desktop and mobile platforms whencombined with supporting software. Intel 64 architecture improvesperformance by allowing systems toaddress more than 4 GB of both virtualand physical memory.Intel® 64
AdvancedTechnologies Intel® Anti-TheftTechnology (Intel® AT)helps keep your laptop safe and secure inthe event that it’s ever lost or stolen.Intel® AT requires a service subscriptionfrom an Intel® AT–enabled serviceprovider. Detects device theft Locks down lost device Restores operation easilyIntel®Anti-TheftTechnology
AdvancedTechnologies The latest expansion of the Intelinstruction set. It extends the Intel Streaming SIMDExtensions (Intel SSE) from 128-bitvectors to 256-bit vectors. Intel AVX addresses the continued needfor vector floating-point performance inmainstream scientific and engineeringnumerical applications, visualprocessing, recognition, data-mining/synthesis, gaming, physics, cryptography and other application areas.Intel®AdvancedVectorExtensions
Intel®AdvancedVector ExtensionsIntel AVX introducessupport for 256-bit wideSIMD registers (YMM0-YMM7 in operating modesthat are 32-bit orless,YMM0-YMM15 in 64-bit mode).The lower 128-bits of theYMM registersare aliased to therespective 128-bitXMM registers.
AdvancedTechnologies A set of Single Instruction Multiple Data(SIMD) instructions that enable fast andsecure data encryption and decryption basedon the Advanced Encryption Standard (AES). IntelAES-NI are valuable for a wide range ofcryptographic applications, for example:applications that perform bulkencryption/decryption, authentication,random number generation, andauthenticated encryption. AES is broadly accepted as the standard forboth government and industry applications,and is widely deployed in various protocols.Intel®AdvancedEncryption StandardNew Instructions(Intel®AES-NI)
AdvancedTechnologies AES-NI consists of six Intel SSEinstructions. Four instructions, namelyAESENC, AESENCLAST, AESDEC, andAESDELAST facilitate high performanceAES encryption and decryption. AESIMC and AESKEYGENASSIST, supportthe AES key expansion procedure.Intel®AdvancedEncryption StandardNew Instructions(Intel®AES-NI)
AdvancedTechnologies Allows memory to be marked as executable or non-executable, when combined with a supporting operatingsystem. If code attempts to run in non-executablememory the processor raises an error to the operatingsystem.This feature can prevent some classes of virusesor worms that exploit buffer overrun vulnerabilities andcan thus help improve the overall security of the system.Execute Disable Bit
Core i5-3550S is built over Ivy bridgemicroarchitecture. Processor supporting L3 cache memory. Most of Intel latest technologies aresupported like Anti-Seft,Vpro andVirtualizations.