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  • 1. Designing Embedded Systems Easily and Quickly with FPGAs© 2010 Altera Corporation—Confidential
  • 2. Agenda System Design Challenge How to tackle the Challenge ● Diversity of options integrating FPGA and CPU technologies o Altera Nios II, ARM Cortex-M1 and -A9, and MP32 processors o Intel’s Atom-based processor ● Single FPGA design flow through Quartus II software o New Qsys system-level integration tool Nios II Processor Summary© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.2
  • 3. “Embedded Systems” in Altera FPGAs?© 2010 Altera Corporation—Confidential
  • 4. System Design Challenges Obsolete in two Too expensive, years, must need to reduce I/O Flash support for seven cost CPU Changingstandard requires SDRAM new device and I/O board redesign I/O I/O I/O Marketing DSP requires new I/O FPGA features to stay competitive 16-week lead time, CPU DSP CPU must qualify 2nd source Need to reduce board size to meet form factor requirements © 2010 Altera Corporation—Confidential ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 4
  • 5. System-Level IntegrationSystem Design Challenges I/O Flash CPU SDRAM I/O I/O I/O I/O DSP I/O FPGA FPGA CPU DSP CPU CPU Solution: integrate external devices within programmable device© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.5
  • 6. How Altera tackles the challenge? Altera is launching an Embedded Initiative providing embedded system designers: ● Diversity of options integrating FPGA and CPU technologies o In alliance with major embedded processor partners ● Single FPGA design flow for these options o New system-level integration tool o Support for range of devices using Altera FPGA technology© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.6
  • 7. Widest Array of FPGA-Enabled Embedded OptionsUnified with a Single FPGA Tool Flow Qsys New RTL Synthesis Place and Route PowerPlay TimeQuest …. Atom E600 Configurable MP32 Cortex-M1 Cortex-A9 Processor New New New© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.7
  • 8. What is Driving this Initiative? Trends Needs  Multicore + hardware  More combinations of acceleration CPU and reconfigurable - CPUs at power limit accelerators - Power-efficiency more critical  Continued bill of materials (BoM)  FPGAs increasingly reduction used in embedded systems  More OS options for FPGA-based CPUs  More FPGA-enabled embedded options  Single FPGA design flow targeting the widest array of options© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.
  • 9. New Offering: ARM Cortex-A9 + FPGA Altera will deliver a family of devices that integrates hardened ARM® Cortex™-A9-based subsystems with 28-nm FPGA technology ● Earlier this year, Altera signed an agreement with ARM Ltd. to license a range of technologies, including the Cortex-A9 MPCore™ ● One of ARM’s highest performance cores, with multi-core capability ● More detailed information will be made available in 2011© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.9
  • 10. New Offering: MP32 + FPGA Altera is broadening its portfolio of soft processor cores with the MP32 soft core ● Based on MIPS32® processor architecture from MIPS® Technologies ● MP32 will complement Altera’s Nios II processor and the portfolio of partner soft CPUs available for Altera devices ● Altera deeply committed to Nios II. Remains preferred option for most applications, which can leverage existing Nios II ecosystem. ● MP32 extends Operating Systems available for soft CPUs beyond what is currently available on Nios II.© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.10
  • 11. New Offering:Qsys System-Level Integration Tool Powerful productivity tool for quickly assembling a system ● Successor to Altera’s SOPC Builder tool Introduces FPGA-optimized network-on-a-chip technology ● Up to 2X performance increase of memory-mapped and datapath interconnects compared to SOPC Builder Hierarchical design ● Improved system-level design productivity ● Supports effective design reuse Support of industry-standard IP interfaces (eg: AMBA) Shipping later this year© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.11
  • 12. Existing offering: Nios II+FPGA Nios II UART System interconnect fabric Cache CPU GPIO Debug Timer On-chip ROM Custom logic On-chip SDRAM RAM controller FPGA Nios II processor + peripherals = your exact-fit custom embedded processor© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.12
  • 13. Addressing the Needs Trends Needs Solutions  Multicore + hardware  More combinations of  Altera devices with ARM acceleration CPU and Cortex-A9 - CPUs at power limit reconfigurable - Power-efficiency accelerators  Intel’s Atom-based processor more critical  Continued bill of  Altera devices with  FPGAs increasingly materials (BoM) ARM Cortex-M1 used in embedded reduction systems  More OS options for  Altera devices with MP32  More FPGA-enabled FPGA-based CPUs  Altera devices with Nios II embedded options  Single FPGA design  More OS options available flow targeting the for FPGA-based soft CPUs widest array of options  Quartus II software + Qsys© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.13
  • 14. Nios II Processor© 2010 Altera Corporation—Confidential
  • 15. Nios II Processor Adoption 2001 Nios CPU Nios CPU Nucleus Nucleus introduced Over 20,000 licensees worldwide introduced 2002 Used by each of the top 20 OEMs uCLinux uCLinux uITRON uITRON Industry’s #1 soft-core CPU – Gartner Dataquest 2003 Vibrant Nios Forum community (over 10,000 ) 2004 Used by developers in all Altera markets Nios II CPU Nios II CPU introduced introduced uC/OS-II uC/OS-II ThreadX ThreadX 2005 OSEK/VDX OSEK/VDX C2H Compiler 2006 C2H Compiler introduced introduced Segger Segger DO-254 DO-254 2007 certification Toppers Toppers certification uCLinux uCLinux Synopsys eCos eCos Synopsys 2008 ASIC ASIC MMU/MPU MMU/MPU 2009 Wind River Linux Wind River Linux© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.15
  • 16. “Nios II: Industry’s Most Widely Used SoftProcessor”- Forbes Magazine  Industrial  Networking  Automotive  Serial field bus protocol  Ethernet MACs  Infotainment  Industrial Ethernet  Universal front end  Car networking  Industrial automation  Traffic management  Driver assistance  Drives and PLCs  Access flow processor  Audio processing  Medical  Consumer  Military  Diagnostic imaging  Display and projector  COTS embedded  Cardiac rhythm management  Home media networking  Guidance and control  Patient monitoring  Home appliance  DO-254 compliance© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.16
  • 17. Scaling System Performance 10x.. 20x.. 30x.. 40x.. Nios II processor Nios II C2H generated processor Custom HW accelerator instruction Arbiter Arbiter Program Data Program Data memory memory memory memory Embedded systems in FPGAs can scale performance by leveraging parallelism© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.17
  • 18. Protecting SW Investment FromObsolescence Nios II UART System interconnect fabric CPU Cache GPIO Debug Timer On-chip ROM Custom logic On-chip SDRAM RAM controller No change to software application No need to requalify processor No change to design tools or flow Nios II processor is soft IP. Your entire system can be easily migrated to another device, preserving your software investment.© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.18
  • 19. Adding Value to Your Existing System FPGA as a coprocessor FPGA CPU CPU CPU CPU Ethernet Ethernet Ext I/F (e.g. PCI) Ext I/F (e.g. PCI) DDR2 SDRAM DDR2 SDRAM Video IP Video IP External External CPU or CPU or Custom Custom DSP DSP function function Processor + FPGA coprocessor: low-risk adoption path to flexibility© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.19
  • 20. Nios II Processor:Most Popular Soft Processor Ever Over 20,000 kits shipped  Over 5,000 unique Nios licensees (companies)  More than all other soft-core processors combined * Nios Design Community  www.niosforum.com  Over 5,000 active participants  Open source hardware and software Nios Wiki site launched 2006  www.nioswiki.com Development kit - key to success  Complete kit  Simple, capable CPU  Easy to use  Low cost (~$995)  Perpetual license  No royalties * Other soft core processors include MicroBlaze and ARM soft core processors© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.20
  • 21. Nios II Processor: Faster or Smaller 300 Fast 1.1 DMIPS/MHz Performance (DMIPS) 250 200 Standard 0.7 DMIPS/MHz 150 100 50 Economy 0.2 DMIPS/MHz 0 0 500 1,000 1,500 2,000 CPU core size (logic elements)Results based on Stratix III FPGA© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.21
  • 22. Hardware Architecture© 2010 Altera Corporation—Confidential
  • 23. Nios II Processor Nios II processor core reset General Instruction and Instruction and clock Program purpose Instruction data trace controller data traceJTAG interface registers Instruction master Hardware- and cacheto software port assisted addressdebugger debug module generation Status and control registers Tightly TightlyHigh-speed Trace coupledconnection Trace port Trace coupled Trace port memory I-memoryto trace pod memory I-memory breakpoints breakpoints MMU Exception Tightly Tightly HW coupled HW controller coupled D-memory D-memory Interrupt MPU irq[31..0] controller Data Data master Custom cache Custom instruction Arithmetic port I/O signals logic logic unit = Optional = Configurable = Fixed = Debug Options © 2010 Altera Corporation—Confidential ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 23
  • 24. Binary Compatibility/Flexible Performance Nios II/f Nios II/s Nios II/e fast standard economy processor processor processorPipeline 6 stage 5 stage NoneHardware multiplier and Emulated 1 cycle 3 cyclebarrel shifter in softwareBranch prediction Dynamic Static NoneInstruction cache Configurable Configurable NoneData cache Configurable None NoneCustom Up to 256instructions© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.24
  • 25. Custom Instructions Accelerating software  Example:  Adds ALU functionality  CRC algorithm (64 Kbytes)  No compiler impact  Ideal for complex math and logical operations 25,000,000 Clock cycles 20,000,000 15,000,000 27 27 10,000,000 times times faster faster 5,000,000 0 Software Custom only instruction© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.25
  • 26. Hardware Accelerators Data transformation coprocessor  Best for block data operations  Run concurrently with CPU Example:  CRC algorithm (64 Kbytes) CRC CRC CPU coprocessor coprocessor 2,500Iterations/second 2,000 1,500 530x 530x faster faster 1,000 Arbiter Arbiter Arbiter Arbiter 5,000 0 Software Custom Coprocessor Program Data Data only instruction memory memory memory© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.26
  • 27. Summary Altera’s Embedded Initiative provides embedded system designers: ● Diversity of options integrating FPGA and CPU technologies o Altera Nios II, ARM Cortex-M1 and -A9, and MP32 processors o Intel’s Atom-based processor ● Single FPGA design flow through Quartus II software o New Qsys system-level integration tool More embedded offerings coming in 2011© 2010 Altera Corporation—ConfidentialALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off.and Altera marks in and outside the U.S.27
  • 28. Thank You! Any Questions?© 2010 Altera Corporation—Confidential