Intel new processors

Slide 1: Basic Information About Pentium 4 ,Dual- Core And Quad-Core Processors

Slide 2: Introduction  One constant in computing is that the world’s hunger for faster performance is never satisfied.  What are we really looking for ?  Superior Performance  Energy Efficiency  Some Processors technology used now :  Hyper-Threading (HT)  Dual Core  Pipelining

Slide 3: Pentium 4  The Pentium 4 brand refers to Intel's line of single-core mainstream desktop and laptop central processing units (CPUs) introduced on November 20, 2000  It is the first implementation of a new micro-architecture which is called “NetBurst” by Intel  The NetBurst architecture includes features such as \"Hyper Pipelined Technology” (20 stage pipeline instead of 10 in pentium 3( and \"Rapid Execution Engine”) With this technology, the ALUs in the core of the CPU actually operate at twice the core clock frequency ( which are firsts in this particular microarchitecture.

Slide 4: Comparison Between Pentium3 and Pentium4

Slide 5: Pentium III vs. Pentium 4 Pipeline

Slide 6:  Pentium4 is equipped with the full set of IA-32 SIMD technology (Single Instruction, Multiple Data instructions set) which is one of Streaming SIMD Extensions 2 which It extends the earlier SSE instruction set, and is intended to fully supplant MMX .All existing software can run correctly on it.  Notice that the L1 cache is less than Pentium 3 (8kb , 32 Kb in Pentium 3 ) but in Pentium 4 there is Execution Trace Cache incorporated with the L1 cache . his cache stores decoded micro- operations, so that when executing a new instruction, instead of fetching and decoding the instruction again, the CPU can directly access the decoded micro-ops from the trace cache, thereby saving a considerable amount of time.

Slide 7: Dual Core  Dual-core refers to a CPU that includes two complete execution cores per physical processor. It combines two processors and their caches and cache controllers onto a single integrated circuit (silicon chip). It is basically two processors, in most cases, residing reside side-by-side on the same die.  The proximity of multiple CPU cores on the same die allows the cache coherency circuitry to operate at a much higher clock rate than is possible if the signals have to travel off-chip. Combining equivalent CPUs on a single die significantly improves the performance of cache snoop operations. Put simply, this means that signals between different CPUs travel shorter distances, and therefore those signals degrade less. These higher quality signals allow more data to be sent in a given time period since individual signals can be shorter and do not need to be repeated as often.

Slide 8: Dual Core Specifications  Duo Processor  Dual execution cores  Out-of-Order Execution Engine  32KB L1 instruction and 32KB L1 data caches, 2MB L2 cache  667 MHz system bus with 5333MB/S bandwidth  Smart Cache  Enhanced SpeedStep® Technology  Dynamic Power Coordination  Digital Media Boost

Slide 9: Key Features: Dual Core  Two physical cores in a package FP Unit FP Unit  Each with its own execution EXE Core EXE Core  resources L1 Cache L1 Cache  Each with its own L1 cache L2 Cache System Bus  32K instruction and 32K data (667MHz, 5333MB/s)  8-way set associative; 64-byte line  Both cores share the L2 cache  2MB 8-way set associative; 64-byte line size  10 clock cycles latency; Write Back update policy

Slide 10:  Assuming that the die can fit into the package, physically, the multi-core CPU designs require much less Printed Circuit Board (PCB) space. Also, a dual-core processor uses slightly less power than two coupled single-core processors, principally because of the increased power required to drive signals external to the chip and because the smaller silicon process geometry allows the cores to operate at lower voltages; such reduction reduces latency.  The cores share some circuitry, like the L2 cache and the interface to the front side bus (FSB). In terms of competing technologies for the available silicon die area, multi-core design can make use of proven CPU core library designs and produce a product with lower risk of design error than devising a new wider core design.  Complete optimization for the dual-core processor requires both the operating system and applications running on the computer to support a technology called thread-level parallelism, or TLP. Thread-level parallelism is the part of the OS or application that runs multiple threads simultaneously.

Slide 11:  Even without a multithread-enabled application, you will still see benefits of dual-core processors if you are running an OS that supports TLP. For example, if you have Microsoft Windows XP (which supports multithreading), you could have your Internet browser open along with a virus scanner running in the background, while using Windows Media Player to stream your favorite radio station and the dual-core processor will handle the multiple threads of these programs running simultaneously with an increase in performance and efficiency.  65nm manufacturing technology is used .

Slide 12: Advantages  Reduced bus traffic  Both cores have full access to the entire cache  Dynamic Cache sizing  Clock partitioning and recovery  Dynamic Bus Parking  Dynamic Power Management improves performance and battery life

Slide 13: Disadvantages  In addition to operating system (OS) support, adjustments to existing software are required to maximize utilization of the computing resources provided by multi-core processors. Also, the ability of multi-core processors to increase application performance depends on the use of multiple threads within applications .  Integration of a multi-core chip drives production yields down and they are more difficult to manage thermally than lower- density single-chip designs

Slide 14: Quad Core  Four execution cores in one package • Each core runs at a lower frequency • Power normally given to a single core is divided among four cores • Resulting in higher performance per watt of power consumed  Quad core is designed to : • Plug into current motherboards • Meet thermal and electrical specifications • Reduce total cost of ownership • Increase return on investment • Fabricated on 65 nm silicon process technology

Slide 15: Quad Core Features  Intel Core Micro- Architecture : • Intel advanced smart cache (Smart Cache enables greater system responsiveness )  L2 cache shared between 4 cores  Dynamic usage up to 100% per core • Intel Wide Dynamic Execution  More Instructions per clock cycle  Each core can complete up to 4 full instructions simultaneously  Intel Virtualization Technology • Hardware assisted Virtualization  Fully Buffered DIMM Technology • High speed memory access  Intel I/O Acceleration Technology  Hardware assisted I/O  Digital Thermal Sensor (DTS ) • Efficient Processor and platform thermal control • System fans spin only as fast as needed to cool the system • Slower Spinning fans generate less noise

Slide 17: What Does Quad core mean for us?  Four dedicated physical threads  Helps operating systems and applications deliver additional performance  End users experience better multitasking and multi-threaded performance  Some of the applicable applications :  Consumer video encoding  Professional image editing  Special effects  3-d applications such as Ray tracing , animation , computer aided design  Gaming  Artificial intelligence  Character physics  Scene rendering

Slide 18: Notes  Despite all these enhancements, the NetBurst architecture created obstacles for engineers trying to scale up its performance. With this architecture, Intel was looking to touch speeds of 10 GHz, but with rising clock speed, Intel faced increasing problems with keeping power dissipation within acceptable limits. Intel reached limits at a speed of 3.8 GHz and has encountered problems trying to achieve even that.  Did You Know...\"If we assume that the number of transistors per processor core remains relatively fixed, it is reasonable to assume that the number of processor cores could follow Moore's Law, which states that the number of transistors per a certain area on the chip will double approximately every 18 months.\" [Source: Intel Software network/Dev]