Your SlideShare is downloading. ×
Ok 6 alu
Upcoming SlideShare
Loading in...5
×

Thanks for flagging this SlideShare!

Oops! An error has occurred.

×
Saving this for later? Get the SlideShare app to save on your phone or tablet. Read anywhere, anytime – even offline.
Text the download link to your phone
Standard text messaging rates apply

Ok 6 alu

97
views

Published on


0 Comments
1 Like
Statistics
Notes
  • Be the first to comment

No Downloads
Views
Total Views
97
On Slideshare
0
From Embeds
0
Number of Embeds
1
Actions
Shares
0
Downloads
0
Comments
0
Likes
1
Embeds 0
No embeds

Report content
Flagged as inappropriate Flag as inappropriate
Flag as inappropriate

Select your reason for flagging this presentation as inappropriate.

Cancel
No notes for slide

Transcript

  • 1. WISNU HENDRO MARTONO,M.Sc06/09/13 12:58 1Organisasi Komputer by TIM DOSEN STT PLN
  • 2. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 2
  • 3.  Sum output Logic equation: Circuit:06/09/13 12:58 3Organisasi Komputer by TIM DOSEN STT PLN
  • 4. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 4• Carry output • Logic equation:• Circuit:
  • 5. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 51 Bit AdderadderABCarry InSumCarry OutA B CarryInCarryOutSum0 0 0 0 00 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 01 1 1 1 1
  • 6. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 64 Bit Ripple Carry AdderadderA0C0S0B0adderA1S1B1adderA2S2B2adderA3S3B3C1C2C3A3A2A1A0+ B3B2B1B0S3S2S1S0C3 C2 C1 C0
  • 7. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 74 Bit Ripple Carry AdderadderA0C0S0B0adderA1S1B1adderA2S2B2adderA3S3B3C1C2C3A3A2A1A0+ B3B2B1B0S3S2S1S0C3 C2 C1 C0
  • 8. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 84 Bit Ripple Carry Adderadder 0adderadderadder1100 01000011+ 00101adder0100adder1011adder0100adder00
  • 9. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 9Pengurangan• Menghitung A-B  A + (-B-1) + 1• -B-1 seluruh bit di Inversi.• Menambah +1 dg menetapkan C0 dg 1
  • 10. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 10Subtractionadder 1adderadderadder10100101- 00110adder101adder010adder100adder100011B inverted
  • 11. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 11Bilangan Kompliment Dua• Tidak ada yg berbeda!– Merupakan keuntungan menggunakanrepresentasi kompliment dua.• Overflow:– Utk Penambahan: sign pada hasil berbedadg sign dari operands (walaupun sama2mempunyai sign).
  • 12. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 12-3 + 7adder 0adderadderadder1011 11101101+ 01110adder1010adder1011adder1110adder10
  • 13. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 13-3 + -7adder 0adderadderadder1011 10011101+ 10010adder0011adder1101adder0100adder10Overflow!
  • 14. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 14Ripple Carry Timing• Semua adder sebenarnya beroperasiberdasar waktu (dirancang menggunakanrangkaian combinational).• Menunggu cukup lama (hingga carry terakhirdihitung) dan perhatikan pada jawabanterakhir.• Sepertinya terjadi adanya kesalahan padanilai sementaranya!
  • 15. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 15Carry Look-ahead• Menghitung bit carry segera.• Tidak memungkinkan utk adder ygbesar (32 bit), tetapi realistis utk 4 bitadder.
  • 16. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 164 Bit Carry Look-aheadadderadderadderadder0011+ 0010Carry Generator1100110001000100 01adder0100adder111adder0100adder00Carry Generator00
  • 17. Decoders: n input, 2noutput.Masukan digunakan utk memilih Luaran mana yg akandihidupkan. Setiap saat hanya satu Luaran yg akanhidup/on.Multiplexors: 2ninput, n selection bit, 1 output.Bit yg terpilih menentukan Masukan mana yg akanmenjadi Luaran.06/09/13 12:58 17Organisasi Komputer by TIM DOSEN STT PLN
  • 18. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 182 input DecoderDecoderI0I1O0O2O1O3Perlakukan I0I1 as a 2 bit integer i. The ithoutput will beturned on (Oi=1), all the others off.I0 I1 O0 O1 O2 O30 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1Decoder Truth Table
  • 19. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 19Decoder Boolean Expressions103102101100IIOIIOIIOIIO•=•=•=•=Decoder ImplementationI1I0O0O1O2O3
  • 20. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 202 Input MultiplexorInputs: I0 and I1Selector: SOutput: OIf S is a 0: O=I0If S is a 1: O=I1MuxI0I1OS
  • 21. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 212-Mux Truth TableS O0 I01 I1AbbreviatedTruth TableS I0 I1 O00 0 0 00 0 1 00 1 0 10 1 1 11 0 0 01 0 1 11 1 0 01 1 1 1
  • 22. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 22Unit Logika Arithmatik• Peralatan yg membentuk tindakanoperasi arithmatik dan operasi logika.– arithmetic ops: addition, subtraction– logic operations: AND, OR• Utk MIPS diperlukan 32 bit ALU– Yg mampu menambahkan besaran hingga32 bit dll.
  • 23. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 23BentukALU32 bitoperand32 bitoperand32 bitresultControl(operation selection)
  • 24. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 24Mesin kap.1 bit AND/OR• Merancang peralatan hitung dlm satubox menggunakan AND atau OR.• Digunakan control input utkmenentukan bentuk operasi apadihasilkan.– Nama control “Op”.• if Op==0 do an AND• if Op==1 do an OR
  • 25. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 25Truth Table For 1-bit AND/OROp A B Result0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 11 1 0 11 1 1 1ABOpResultOp=0: Result is A•BOp=1: Result is A+B
  • 26. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 26Logic utk 1-Bit AND/OR• Dapat diturunkan dari SOP atau POSdan membangun rangkaian Logika danyg berhubungan.• Dapat juga dilakukan seperti:– Masukan A dan B ke rangkaian OR gate.– Masukan A dan B ke rangkaian AND gate.– Menggunakan 2-input MUX utk menjemputsalah satu utk digunakan.• Op menseleksi masukan ke MUX.
  • 27. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 27Logic Design utk 1-BitAND/ORMux ResultABOp
  • 28. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 281 Bit ALU• Gabungan AND/OR dengan Adder.• Harus menggunakan 4-input MUXdengan 2 masukan penyeleksi.AND OR add
  • 29. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 29b02ResultOperationa1CarryInCarryOutThis is 2 bits!
  • 30. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 30Building a 32 bit ALU• 64 inputs• 3 different Operations (AND,OR,add).• 32 bit outputA0 A1 … A31 B0 B1 … B31……OpR0 R1 … R31…Result
  • 31. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 31New 32-bit ALUSeta310ALU0 Result0CarryIna0Result1a10Result2a20Operationb31b0b1b2Result31OverflowBinvertCarryInLessCarryInCarryOutALU1LessCarryInCarryOutALU2LessCarryInCarryOutALU31LessCarryIn• Masukan 0 ke Lessseluruhnya tetapiLS.• Hasil penambahanpd MS ALU akandikembalikan keLess dr LS ALU
  • 32. 06/09/13 12:58 32Organisasi Komputer by TIM DOSEN STT PLN
  • 33. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 33UNTUK LEBIH MEMAHAMI, ULANG MATERIINI DENGAN CARA MENGGUNAKAN SOALYANG ADA PADA BUKU REFERENSI.TERIMA KASIH