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Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
Introduction To Makefile
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Introduction To Makefile

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How to use makefiles in building a linux project. Basic level

How to use makefiles in building a linux project. Basic level

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  • 1. Introduction to Makefile Waqqas Jabbar
  • 2. Compiling with gcc <ul><li>Compilation and linking in a single step </li></ul><ul><ul><li>gcc file1.c file2.c -o exe </li></ul></ul><ul><li>Compilation and linking in separate steps </li></ul><ul><ul><li>gcc -c file1.c </li></ul></ul><ul><ul><li>gcc -c file2.c </li></ul></ul><ul><ul><li>gcc file1.o file2.o -o exe </li></ul></ul>
  • 3. “make” command <ul><li>Makefile is the input to “make” command. </li></ul><ul><li>Automate rebuilding software by determining the minimum set of commands that need to be called to do this </li></ul><ul><li>Install program files </li></ul><ul><li>Clean up object files </li></ul><ul><li>Reads a file named “Makefile” in the directory from which it is executed </li></ul>
  • 4. Makefile syntax <ul><li>Rules </li></ul><ul><ul><li>Target: Dependencies </li></ul></ul><ul><ul><ul><li>(tab) Command </li></ul></ul></ul><ul><ul><ul><li>(tab) Command </li></ul></ul></ul><ul><li>Target </li></ul><ul><ul><li>A file that is generated by a program </li></ul></ul><ul><ul><ul><li>Executable or object files </li></ul></ul></ul><ul><ul><li>The name of an action to carry out </li></ul></ul><ul><li>Dependencies </li></ul><ul><ul><li>Files that are used as inputs to create a Target </li></ul></ul><ul><ul><li>Space separated list </li></ul></ul><ul><ul><li>May include other targets </li></ul></ul>
  • 5. Makefile syntax <ul><li>Command </li></ul><ul><ul><li>Shell command </li></ul></ul><ul><li>If no target is specified during execution of “make” then the first target is used </li></ul>
  • 6. Make algorithm <ul><li>Build dependencies </li></ul><ul><ul><li>Determine if dependency is file or action target </li></ul></ul><ul><ul><ul><li>If file by that name exist -> File Target </li></ul></ul></ul><ul><ul><ul><li>Otherwise -> Action Target </li></ul></ul></ul><ul><ul><li>File Target </li></ul></ul><ul><ul><ul><li>Do nothing </li></ul></ul></ul><ul><ul><li>Action Target </li></ul></ul><ul><ul><ul><li>Build target dependencies </li></ul></ul></ul>
  • 7. Make algorithm <ul><li>Check if at least one of the dependencies is “newer” than the target </li></ul><ul><ul><li>Execute Commands in that rule, if “newer” </li></ul></ul><ul><li>Definition “Newer” </li></ul><ul><ul><li>File Target: </li></ul></ul><ul><ul><ul><li>File Dependency: Check modification times </li></ul></ul></ul><ul><ul><ul><li>Action Dependency:Check commands (in dependency rule) is executed or not </li></ul></ul></ul><ul><ul><li>Action Target: </li></ul></ul><ul><ul><ul><li>File Dependency: Always “newer” </li></ul></ul></ul><ul><ul><ul><li>Action Dependency:Check commands (in dependency rule) is executed or not </li></ul></ul></ul>
  • 8. Makefile variable <ul><li>Define </li></ul><ul><ul><li>Variable1 = value </li></ul></ul><ul><li>Usage in Commands </li></ul><ul><ul><li>$(Variable1) </li></ul></ul><ul><li>Usage in variables </li></ul><ul><ul><li>Variable2 = $(Variable1) </li></ul></ul><ul><li>Macros </li></ul><ul><ul><li>Variable evaluated when command is executed </li></ul></ul>
  • 9. Abstract Rules <ul><li>Defines how to build a file `*.s2' from a file `*.s1', where s1 and s2 are suffixes </li></ul><ul><li>.s1.s2: </li></ul><ul><ul><li>(tab) Command </li></ul></ul><ul><ul><li>(tab) Command </li></ul></ul>
  • 10. Punctuation <ul><li>$<' </li></ul><ul><ul><li>are the dependencies that changed causing the target to need to be rebuilt </li></ul></ul><ul><li>`$@' </li></ul><ul><ul><li>is the target </li></ul></ul><ul><li>`$^' </li></ul><ul><ul><li>are all the dependencies for the current rule </li></ul></ul>
  • 11. include <ul><li>Include other Makefiles </li></ul><ul><li>Variables can be used </li></ul>
  • 12. Executing shell command to assign variables <ul><li>$(shell command) </li></ul><ul><ul><li>SVN_VERSION=$(shell if test -d .svn ; then svnversion . | sed -e 's/([1-9]*)([MS])?:?([1-9]*)[MS]?/1/' ; else echo unknown ; fi) </li></ul></ul><ul><ul><li>VERINFO=-DSVN_VERSION=&quot;$(SVN_VERSION)&quot; </li></ul></ul><ul><ul><li>ARCH=$(shell uname -p|sed s/_/' '/|awk '{print $$2}') </li></ul></ul>
  • 13. Loops in command <ul><li>You can write loops as in shell script </li></ul><ul><ul><li>@for dir in $(SUBDIRS); do </li></ul></ul><ul><ul><ul><li>$(MAKE) -w -C $$dir $(TARGET) clean || exit 1 ; </li></ul></ul></ul><ul><ul><li>done </li></ul></ul>
  • 14. Wildcard and patsubst <ul><li>SRCS := $(wildcard *.cc) $(wildcard *.c) $(wildcard *.cpp) </li></ul><ul><li>OBJS := $(patsubst %.cc, %.o,$(wildcard *.cc)) $(patsubst %.c, %.o,$(wildcard *.c)) $(patsubst %.cpp, %.o,$(wildcard *.cpp)) </li></ul>
  • 15. Environment variable checking <ul><li>ifeq, else,endif </li></ul><ul><ul><li>ifeq ($(LIB_TYPE), static) </li></ul></ul><ul><ul><ul><li>LIBEXT = a </li></ul></ul></ul><ul><ul><ul><li>COMPILE_LIB = $(AR) -ruv $(TOP)/lib/$(LIBNAME).$(LIBEXT) $(OBJS) </li></ul></ul></ul><ul><ul><li>else </li></ul></ul><ul><ul><ul><li>LIBEXT = so </li></ul></ul></ul><ul><ul><ul><li>COMPILE_LIB = $(CC) -fPIC -shared -Wl,-soname,$(LIBNAME).$(LIBEXT) -o $(TOP)/lib/$(LIBNAME).$(LIBEXT) $(OBJS) $(LIBS) </li></ul></ul></ul><ul><ul><li>endif </li></ul></ul>
  • 16. Thank you

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