Reconfigurable computing: lock and load DRESD Team [email_address] P artial D ynamic R econfiguration W orkshop
In recent years, a lot of work has been done in the so called reconfigurable computing area and the evolution of reconfigurable devices has brought to significantly increase their size, capacity and performance.
Nowadays, the most commonly used reconfigurable devices are Field Programmable Gate Arrays (FPGAs), employed both as a component of more complex systems (playing the role of a co-processor), and as System-on-Programmable-Chip (SoPC), integrating all system components.
This first set of talks will guide you through the basic definition and idea in the reconfigurable computing area, introducing a short historical overview of this field, presenting an overall and comprehensive state of the art of reconfigurable architecture, trying to motivate the reason behind the choice of FPGA as target-architecture.
Finally, the last talk will present the different scenarios (i.e. flexibility, resource lack…) where the reconfiguration can be effective showing also the drawbacks introduced by this new feature. We will show the presence of two different kinds of limits, theoretical and physical ones, trying to highlight possible solutions to both of these