SyCERS a SystemC Design Exploration Framework for SoC Reconfigurable Architecture Monte Carlo Resort, Lav Vegas - Nevada J...
Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li><...
Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li><...
The problem <ul><li>Increasing the complexity of the design provides to the designers much more flexibility in their decis...
SyCERS - Objectives <ul><li>Define a novel model to describe reconfigurable systems </li></ul><ul><ul><li>Based on know HD...
SoA <ul><li>J. Stockwood and P. Lysaght.  A simulation tool for dynamically reconfigurable field programmable gate arrays ...
SystemC class library <ul><li>We can create a simulation model for both the hardware and the software components </li></ul...
TLM e SystemC <ul><li>In TLM the system is first described at an high level of abstraction where communication details are...
Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li><...
The SyCERS methodology Specification Model Component Assembly Model Bus Functional Model <ul><li>Define the system functio...
Reconfiguration Control Interfaces Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Str...
A reconfigurable component using  SystemC <ul><li>It’s not possible to instantiate an sc_module during the simulation phas...
Reconfigurable component behavior Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Stru...
Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li><...
Caronte -  Objectives <ul><li>Propose a novel embedded partial reconfigurable architecture (RSoC) </li></ul><ul><li>Define...
Caronte Models Control Code (SystemC) Compiler GCC Configurations BlackBox (SystemC) Configuration Control  Process Schedu...
Caronte Functional View Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: ...
Canny Edge Detector <ul><li>Caronte Component assembly </li></ul><ul><li>System characterized by 4 functionalities </li></...
Adaptive Filter <ul><li>Caronte Component assembly </li></ul><ul><li>System characterized by 5 functionalities </li></ul><...
SyCERS Performances <ul><li>Memory usage for the model </li></ul><ul><ul><li>150 KB for each reconfigurable components </l...
Concluding Remarks <ul><li>Conclusion </li></ul><ul><ul><li>Preliminary results show that the SyCERS framework enables the...
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3DD 1e SyCers

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3DD 1e SyCers

  1. 1. SyCERS a SystemC Design Exploration Framework for SoC Reconfigurable Architecture Monte Carlo Resort, Lav Vegas - Nevada June 29th, 2006 Carlo Amicucci: carlo.amicucci@microlab-mi.net Fabrizio Ferrandi: ferrandi@elet.polimi.it Marco D. Santambrogio: marco.santambrogio@polimi.it Donatella Sciuto: donatella.sciuto@elet.polimi.it
  2. 2. Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li></ul></ul><ul><ul><li>State of the Art </li></ul></ul><ul><ul><li>SystemC </li></ul></ul><ul><ul><ul><li>Reasons </li></ul></ul></ul><ul><ul><ul><li>TLM </li></ul></ul></ul><ul><li>SyCERS </li></ul><ul><ul><li>Methodology </li></ul></ul><ul><ul><li>Structure </li></ul></ul><ul><ul><ul><li>Reconfiguration Control Interfaces </li></ul></ul></ul><ul><ul><ul><li>A reconfigurable component using SystemC </li></ul></ul></ul><ul><ul><ul><li>SyCERS behavior </li></ul></ul></ul><ul><li>Case Study </li></ul><ul><ul><li>The Caronte Architecture </li></ul></ul><ul><ul><li>The SyCERS Caronte model </li></ul></ul><ul><ul><li>Application </li></ul></ul><ul><ul><ul><li>Canny Edge Detector </li></ul></ul></ul><ul><ul><ul><li>Adaptive Filter </li></ul></ul></ul><ul><ul><li>SyCERS Performances </li></ul></ul><ul><li>Concluding Remarks </li></ul>
  3. 3. Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li></ul></ul><ul><ul><li>State of the Art </li></ul></ul><ul><ul><li>SystemC </li></ul></ul><ul><ul><ul><li>Reasons </li></ul></ul></ul><ul><ul><ul><li>TLM </li></ul></ul></ul><ul><li>SyCERS </li></ul><ul><ul><li>Methodology </li></ul></ul><ul><ul><li>Structure </li></ul></ul><ul><ul><ul><li>Reconfiguration Control Interfaces </li></ul></ul></ul><ul><ul><ul><li>A reconfigurable component using SystemC </li></ul></ul></ul><ul><ul><ul><li>SyCERS behavior </li></ul></ul></ul><ul><li>Case Study </li></ul><ul><ul><li>The Caronte Architecture </li></ul></ul><ul><ul><li>The SyCERS Caronte model </li></ul></ul><ul><ul><li>Application </li></ul></ul><ul><ul><ul><li>Canny Edge Detector </li></ul></ul></ul><ul><ul><ul><li>Adaptive Filter </li></ul></ul></ul><ul><ul><li>SyCERS Performances </li></ul></ul>
  4. 4. The problem <ul><li>Increasing the complexity of the design provides to the designers much more flexibility in their decisions but imply that the time to market of the final solution is also dramatically increasing. </li></ul><ul><li>The possibility of testing dynamic reconfigurable architectures and of validating dynamic reconfigurable systems build on top of these architectures becomes more relevant </li></ul><ul><li>The “problem” can be formulated in many ways: </li></ul><ul><ul><li>Given an architecture, maximize the system throughput </li></ul></ul><ul><ul><li>Given the system throughput find, the “correct” architecture </li></ul></ul><ul><li>Or under the reconfiguration point of view: </li></ul><ul><ul><li>Minimizing the number of reconfigurations </li></ul></ul><ul><ul><li>Minimizing the reconfiguration overhead </li></ul></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  5. 5. SyCERS - Objectives <ul><li>Define a novel model to describe reconfigurable systems </li></ul><ul><ul><li>Based on know HDL (no new languages) </li></ul></ul><ul><ul><li>To be used in the early first stage of the project; to consider the reconfiguration at the system level </li></ul></ul><ul><li>Propose a complete framework for the simulation and the design of reconfigurable systems </li></ul><ul><ul><li>Providing system specification that can be simulated </li></ul></ul><ul><ul><li>Allowing fast parameters setting, e.g. number of reconfigurable blocks, reconfigurable time </li></ul></ul><ul><ul><li>Taking into account the software side of the final system </li></ul></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  6. 6. SoA <ul><li>J. Stockwood and P. Lysaght. A simulation tool for dynamically reconfigurable field programmable gate arrays . In IEEE Transactions on VLSI systems, Vol. 4, No. 3, September 1996 </li></ul><ul><ul><li>I. Robertson and J. Irvine. A design flow for partially reconfigurable hardware . In ACM Transactions on Embedded Computing Systems, Vol. 3, No. 2, May 2004 </li></ul></ul><ul><ul><li>G. Habay P. Butel and A. Rachet. Managing partial dynamic reconfiguration in virtex-II Pro FPGAs . In Xilinx Xcell Journal, Fall 2004 – RECONF2 European Project </li></ul></ul><ul><li>Brad Hutchings, Peter Bellows, Joseph Hawkins, Scott Hemmert, Brent Nelson, and Mike Rytting. A cad suite for high-performance FPGA design . In FCCM '99, pag. 12, Washington, DC, USA, 1999 </li></ul><ul><li>K. Masselos A. Pelkonen. System-level modelling of dynamically reconfigurable hardware with SystemC . In The 10th Reconfigurable Architectures Workshop, Nice, France, April 22, 2003 </li></ul><ul><li>Tero Rissa, Adam Donlin, and Wayne Luk. Evaluation of SystemC modelling of reconfigurable embedded systems . In DATE '05, pages 253--258, Washington, DC, USA, 2005 </li></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  7. 7. SystemC class library <ul><li>We can create a simulation model for both the hardware and the software components </li></ul><ul><li>SystemC is just a C++ class library we can still exploit all the language features: </li></ul><ul><ul><li>Function pointers </li></ul></ul><ul><ul><li>Dynamic object instantiation </li></ul></ul><ul><ul><li>… </li></ul></ul><ul><li>Using master-slave communication library, complex system models can be built as an interconnection of sequentially communicating functional blocks where unnecessary implementation detail is abstracted. </li></ul><ul><li>A system description is basically a C/C++ program </li></ul><ul><li>The execution of a program, basically correspond to the system behavior simulation </li></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  8. 8. TLM e SystemC <ul><li>In TLM the system is first described at an high level of abstraction where communication details are hidden </li></ul><ul><li>The key concept of TLM is the separation of functionality definitions from communication details </li></ul><ul><ul><li>to achieve this TLM uses through the concept of channel </li></ul></ul><ul><ul><ul><li>DEF.: SystemC channel is a class that implements one or more SystemC interface classes. A channel implements all the methods of the inherited interface classes. </li></ul></ul></ul><ul><ul><ul><li>DEF.: A SystemC port is a class template with and inheriting from a SystemC interface. Ports allow access of channels across module boundaries. </li></ul></ul></ul><ul><ul><ul><li>DEF.: A SystemC interface is an abstract class that provides only pure virtual declarations of methods referenced by SystemC channels and ports. </li></ul></ul></ul><ul><li>SystemC, starting from the 2.0 version, support TLM using the following structures: </li></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions write() read() module A pA->write(v) module B v=pB->read() channel pA pB sc_interface sc_port
  9. 9. Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li></ul></ul><ul><ul><li>State of the Art </li></ul></ul><ul><ul><li>SystemC </li></ul></ul><ul><ul><ul><li>Reasons </li></ul></ul></ul><ul><ul><ul><li>TLM </li></ul></ul></ul><ul><li>SyCERS </li></ul><ul><ul><li>Methodology </li></ul></ul><ul><ul><li>Structure </li></ul></ul><ul><ul><ul><li>Reconfiguration Control Interfaces </li></ul></ul></ul><ul><ul><ul><li>A reconfigurable component using SystemC </li></ul></ul></ul><ul><ul><ul><li>SyCERS behavior </li></ul></ul></ul><ul><li>Case Study </li></ul><ul><ul><li>The Caronte Architecture </li></ul></ul><ul><ul><li>The SyCERS Caronte model </li></ul></ul><ul><ul><li>Application </li></ul></ul><ul><ul><ul><li>Canny Edge Detector </li></ul></ul></ul><ul><ul><ul><li>Adaptive Filter </li></ul></ul></ul><ul><ul><li>SyCERS Performances </li></ul></ul>
  10. 10. The SyCERS methodology Specification Model Component Assembly Model Bus Functional Model <ul><li>Define the system functionality </li></ul><ul><ul><li>No information regarding the final implementation </li></ul></ul><ul><li>Solution space exploration </li></ul><ul><ul><li>Provides the functionalities implementation details </li></ul></ul><ul><ul><li>No information regarding the communication </li></ul></ul><ul><li>Computed solution validation via the simulation </li></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  11. 11. Reconfiguration Control Interfaces Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  12. 12. A reconfigurable component using SystemC <ul><li>It’s not possible to instantiate an sc_module during the simulation phase </li></ul><ul><li>It’s possible to modify the SC_THREAD and the SC_METHOD via: </li></ul><ul><ul><li>function pointer </li></ul></ul><ul><ul><li>sc_mutex </li></ul></ul><ul><li>Configuration </li></ul><ul><ul><ul><li>Combined with the reconfiguration time </li></ul></ul></ul><ul><li>Elaboration </li></ul><ul><ul><ul><li>Provided with the elaboration time </li></ul></ul></ul>*g() Reconfigurable Component (sc_module) Configuration (function pointer) mutex Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  13. 13. Reconfigurable component behavior Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  14. 14. Outline <ul><li>Introduction </li></ul><ul><ul><li>Problem definition </li></ul></ul><ul><ul><li>SyCERS: objectives </li></ul></ul><ul><ul><li>State of the Art </li></ul></ul><ul><ul><li>SystemC </li></ul></ul><ul><ul><ul><li>Reasons </li></ul></ul></ul><ul><ul><ul><li>TLM </li></ul></ul></ul><ul><li>SyCERS </li></ul><ul><ul><li>Methodology </li></ul></ul><ul><ul><li>Structure </li></ul></ul><ul><ul><ul><li>Reconfiguration Control Interfaces </li></ul></ul></ul><ul><ul><ul><li>A reconfigurable component using SystemC </li></ul></ul></ul><ul><ul><ul><li>SyCERS behavior </li></ul></ul></ul><ul><li>Case Study </li></ul><ul><ul><li>The Caronte Architecture </li></ul></ul><ul><ul><li>The SyCERS Caronte model </li></ul></ul><ul><ul><li>Application </li></ul></ul><ul><ul><ul><li>Canny Edge Detector </li></ul></ul></ul><ul><ul><ul><li>Adaptive Filter </li></ul></ul></ul><ul><ul><li>SyCERS Performances </li></ul></ul>
  15. 15. Caronte - Objectives <ul><li>Propose a novel embedded partial reconfigurable architecture (RSoC) </li></ul><ul><li>Define a complete methodology to port a generic application on the proposed architecture </li></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod- > Aps > SyCERS perf. .:: Conclusions
  16. 16. Caronte Models Control Code (SystemC) Compiler GCC Configurations BlackBox (SystemC) Configuration Control Process Scheduler and Controller Memory Model Cross Compiler GCC Control Code (C/C++) Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions Modello Memoria BlackBoxes Model CoreConnect PowerPC ISS Open SystemC PowerPC core models
  17. 17. Caronte Functional View Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  18. 18. Canny Edge Detector <ul><li>Caronte Component assembly </li></ul><ul><li>System characterized by 4 functionalities </li></ul><ul><li>System evaluation according to: </li></ul><ul><ul><li># BlackBoxes </li></ul></ul><ul><ul><li>Reconfiguration Time </li></ul></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  19. 19. Adaptive Filter <ul><li>Caronte Component assembly </li></ul><ul><li>System characterized by 5 functionalities </li></ul><ul><li>System evaluation according to: </li></ul><ul><ul><li>Reconfiguration Time </li></ul></ul><ul><ul><li>Scheduling Policy </li></ul></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  20. 20. SyCERS Performances <ul><li>Memory usage for the model </li></ul><ul><ul><li>150 KB for each reconfigurable components </li></ul></ul><ul><li>The increment of the number of reconfigurable components does not affect the performances </li></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  21. 21. Concluding Remarks <ul><li>Conclusion </li></ul><ul><ul><li>Preliminary results show that the SyCERS framework enables the exploitation of all benefits of a reconfigurable architecture </li></ul></ul><ul><li>Future Works </li></ul><ul><ul><li>Fully support for the master-slave communication library </li></ul></ul><ul><ul><li>From UML to SyCERS </li></ul></ul><ul><ul><li>Automatic generation of the SyCERS simulation model starting from a C/C++ specification </li></ul></ul><ul><ul><li>Bus Functional Model, i.e. MP4FREE, GRAPES </li></ul></ul><ul><ul><li>SyCERS V2 – completely documented for a free distribution </li></ul></ul>Status: .:: Intro > Problem > Objectives > SoA > SystemC .:: SyCERS > Methodology > Structure .:: Case Study > Caronte > SyCERS mod. > Aps > SyCERS perf. .:: Conclusions
  22. 22. Questions
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