Right-Sizing Precision forSpeed and Power EfficiencyDr. John L. Gustafson, Director, Intel Labs ACAS002
Agenda    • The need for right-sized precision    • Introduction to IEEE half-precision floating-point    • Examples of ea...
Agenda    • The need for right-sized precision    • Introduction to IEEE half-precision floating-point    • Examples of ea...
Terminology reminders    • Precision = Digits available to store a number      (“32 bit” or “4 decimal”, for example)    •...
“How do you know your answer is    correct?”    • “(Laughter) “What do you mean?”(This is the      most common response)  ...
The Need for Right-Sized Precision    • Excess precision wastes       – Energy       – Bandwidth       – Power       – Mem...
Benefits of efficient math reach across a    wide range of applications    Angry              Page Rank for Searches    Bi...
Sources of numerical inaccuracy    • Machine-caused errors     •   Cumulative rounding     •   Left-digit destruction (sub...
Quick Tutorial on Rounding Error    “0.1” in binary is not exact. It’s 0.10000002384185791015625, rounded.    Programmers ...
Excess precision burdens DRAM energy, which is improving slowly        Operation                              Energy consu...
32-bit FLOPS save energy, time…                                 60                                      Workloads from the...
Experimental Results     • Speech recognition (sphinx3, from SPECfp suite,       uses 22 bits more than needed for require...
Agenda     • The need for right-sized precision     • Introduction to IEEE half-precision floating-point     • Examples of...
Introduction to 16-bit Floating Point                       ± 2–14 to 2+15 ×(0.5+ 0 to 1023/2048)                     sign...
IEEE-style floating point at any     precision (using Mathematica*)                                        float          ...
Agenda     • The need for right-sized precision     • Introduction to IEEE half-precision floating-point     • Examples of...
Principles for Roundoff Control-1     • Use high-precision accumulators when summing;       this may allow reduced-precisi...
Principles for Roundoff Control-2     • If calculus is needed, don’t differentiate numerically.                           ...
Principles for Roundoff Control-3     • For Monte Carlo methods,       use a “leapfrog” parallel       pseudorandom number...
Plausible Schemes (Kahan)-1     1. Repeat the computation in arithmetics of        increasing precision, increasing it unt...
Plausible Schemes (Kahan)-2     3. Repeat the computation a few times in arithmetic        of the same precision rounding ...
How to Set Rounding Modes-1     C99 allows fine-grained control of floating point     environment. In fenv.h header (cfenv...
How to Set Rounding Modes-2     • In addition, Microsoft has some functions for this       purpose, defined in float.h:   ...
Agenda     • The need for right-sized precision     • Introduction to IEEE half-precision floating-point     • Examples of...
A Developer Scenario• Developer compiles graphics  app with tool to track  accuracy, display results  with “± n.nn” output...
Summary     • Many applications use too much precision     • Reducing precision can increase speed and reduce       memory...
Next Steps     • Try selectively reducing precision on your codes to       see if it improves performance.     • Try the r...
Additional Sources of Information                 on This Topic:     Web-based information that is accessible for non-expe...
Legal DisclaimerINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED...
Risk Factors     The above statements and any others in this document that refer to plans and expectations for the first q...
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Half size precision for speed & power efficiency (Intel Ivy Bridge)

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Half size precision for speed & power efficiency (Intel Ivy Bridge)

  1. 1. Right-Sizing Precision forSpeed and Power EfficiencyDr. John L. Gustafson, Director, Intel Labs ACAS002
  2. 2. Agenda • The need for right-sized precision • Introduction to IEEE half-precision floating-point • Examples of easy things you can do now • Future possible programming environments The PDF for this Session presentation is available from our Technical Session Catalog at the end of the day at: intel.com/go/idfsessionsBJ URL is on top of Session Agenda Pages in Pocket Guide2
  3. 3. Agenda • The need for right-sized precision • Introduction to IEEE half-precision floating-point • Examples of easy things you can do now • Future possible programming environment3
  4. 4. Terminology reminders • Precision = Digits available to store a number (“32 bit” or “4 decimal”, for example) • Accuracy = Number of valid digits in a result (“to three significant digits”, for example) • ULP = Unit of Least Precision. Precision is not a goal. Precision is the means, accuracy is the end.4
  5. 5. “How do you know your answer is correct?” • “(Laughter) “What do you mean?”(This is the most common response) • “We used double precision.” • “It’s the same answer we’ve always gotten.” • “It’s the same answer others get.” • “It agrees with special-case analytic answers.” Almost no one has the resources for detailed numerical analysis. So we use excess precision.5
  6. 6. The Need for Right-Sized Precision • Excess precision wastes – Energy – Bandwidth – Power – Memory space – Time • Right-Sized Precision is not just for High-Performance Computing. It can help: – Graphics – Financial calculations – Speech recognition, face recognition – Page rank for web search6
  7. 7. Benefits of efficient math reach across a wide range of applications Angry Page Rank for Searches Birds* (box3d games) Financial iTunes* Models7
  8. 8. Sources of numerical inaccuracy • Machine-caused errors • Cumulative rounding • Left-digit destruction (subtracting similar numbers) • Operations on very different magnitudes; for example,1016 + 3.14 evaluates to 1016.) • I/O; conversion of decimal to binary numbers and back • Programmer-caused errors • Naïve algorithms • Poor guarding of user input, for example, sin(x) allowing x = 10+300 as an input value • Nature-caused errors (soft errors)8
  9. 9. Quick Tutorial on Rounding Error “0.1” in binary is not exact. It’s 0.10000002384185791015625, rounded. Programmers and disk archives use decimal, creating rounding error Clock example: accumulating seconds, 0.1 at a time, for 100 hours, will be off by at least three minutes! (a + b) + c is NOT the same as a + (b + c) Wrong bits in floating-point math. a = 1.0 (a + b) rounds down to = 100000000. Add c, get 0.0. b = 100000000. (b + c) = 0 exactly, with no rounding. Add a, get 1.0. c = –100000000. So floating point math fails algebra! This is a problem for parallel programmers. Are different answers a bug or a rounding error?9
  10. 10. Excess precision burdens DRAM energy, which is improving slowly Operation Energy consumed 64-bit multiply-add 64 pJ Read/store register data 6 pJ Read 64 bits from DRAM 4200 pJ Read 32 bits from DRAM 2100 pJ Using single precision in DRAM instead of double saves as much energy as 30 floating-point operations. Source: S. Borkar, Intel. Data is for 32 nm technology ca. 201010
  11. 11. 32-bit FLOPS save energy, time… 60 Workloads from the CoreStat* data set 50 % Energy saved replacing 64-bit with 32-bit flops 40 30 20 10 0 1 2 3 4 5 6 7 8 LS-DYNA* HPL Monte Carlo Black-Scholes CPU06-Cactus E3D_segsalt NAMD GAMESS11 Source: Internal Intel research study by Timothy Mattson
  12. 12. Experimental Results • Speech recognition (sphinx3, from SPECfp suite, uses 22 bits more than needed for required accuracy • Computational fluid dynamics (lBM, from SPECfp) uses 19 bits more precision than needed • Shock hydrodynamics (from DARPA Challenge Problems) uses 15 bits more precision than needed (see https://computation.llnl.gov/casc/ShockHydro/) This is the uniform amount we can reduce precision, safely. More improvement is possible for operation-by-operation trimming.12
  13. 13. Agenda • The need for right-sized precision • Introduction to IEEE half-precision floating-point • Examples of easy things you can do now • Future possible programming environment13
  14. 14. Introduction to 16-bit Floating Point ± 2–14 to 2+15 ×(0.5+ 0 to 1023/2048) sign binary point exponent fraction (10 bit) 15 10 0 • Intel® Microarchitecture Codename Ivy Bridge will support 16- bit floating point format • Native operations will still be 32-bit and 64-bit • 50% reduction in bandwidth and memory use, versus 32-bit • Three decimals of accuracy (0 to 2048 are exact) • Dynamic range of 12 orders of magnitude (6x10–8 to 6x104) • 4x savings over 64-bit if it can be made numerically safe • Graphics, seismic, medical imaging are good candidates, but there may be many more uses14
  15. 15. IEEE-style floating point at any precision (using Mathematica*) float 30 20 10 mbits = 8; 50 100 150 200 250 int imax = 2^mbits - 1; –10 expobits = 3; fracbits = mbits - 1 - expobits; –20 hidden = 2^fracbits; signmask = 2^(mbits - 1); –30 fracmask = hidden - 1; expomask = (signmask - 1) - fracmask; sign[b_] := BitAnd[Floor[b], signmask]/signmask; expo[b_] := BitAnd[Floor[b], expomask]/hidden; frac[b_] := BitAnd[Floor[b], fracmask]; bias = 2^(expobits - 1) - 1; ftox[b_] := N[(-1)^sign[b] Which[ expo[b] == 0, frac[b]*2^(1 - bias - fracbits), expo[b] > 0, 2^(expo[b] - bias) (1 + frac[b]/hidden)]]15
  16. 16. Agenda • The need for right-sized precision • Introduction to IEEE half-precision floating-point • Examples of easy things you can do now • Future possible programming environment16
  17. 17. Principles for Roundoff Control-1 • Use high-precision accumulators when summing; this may allow reduced-precision data in DRAM /* inside a loop: */ Try x[i] in 32-bit, but Sum is Sum += (double)x[i]; double or even quad precision. • To get bitwise identical results in serial and parallel, consider always using the same binary tree collapse. x[0] x[1] x[2] x[3] x[4] x[5] x[6] x[7] + + + + + + + Sum • Or use a high-quality library. This improves17 maintainability of the software as well.
  18. 18. Principles for Roundoff Control-2 • If calculus is needed, don’t differentiate numerically. Numerically unstable. Large h  discretization error f ( x + h) - f ( x ) Small h  roundoff error f ¢( x) » h • Find an integral formulation of the problem if possible! a+nh n-1 ò f ( x) » å f ( a + jh) a j=0 Numerically stable. Can find rigorous bounds on error if f is monotone.18
  19. 19. Principles for Roundoff Control-3 • For Monte Carlo methods, use a “leapfrog” parallel pseudorandom number generator to get parallel results that are bitwise identical to serial results. • If Monte Carlo method only is accurate to ~3 decimals, consider reduced-precision arithmetic! See: http://www.netlib.org/utk/lsi/pcwLSI/text/node141.html19
  20. 20. Plausible Schemes (Kahan)-1 1. Repeat the computation in arithmetics of increasing precision, increasing it until as many as desired of the results’ digits agree. 2. Repeat the computation in arithmetic of the same precision but rounded differently, say Down, and then Up, and maybe Towards Zero too, besides To Nearest, and compare three or four results.20
  21. 21. Plausible Schemes (Kahan)-2 3. Repeat the computation a few times in arithmetic of the same precision rounding operations randomly, some Up, some Down, and treat results statistically. 4. Repeat the computation a few times in arithmetic of the same precision but with slightly different input data each time, and see how widely results spread. Note: These techniques can help but they are not foolproof.21
  22. 22. How to Set Rounding Modes-1 C99 allows fine-grained control of floating point environment. In fenv.h header (cfenv in C++): feclearexcept Clears exceptions fegetenv Stores current f.p. environment fegetexceptflag Stores current status flags fegetround Retrieves current rounding direction feholdexcept Saves environment, clears exceptions feraiseexcept Raises floating point exceptions fesetenv Sets current f.p. environment fesetexceptflag Sets current status flags fesetround Sets current rounding direction fetestexcept Tests if exceptions have been raised feupdateenv Restores environment, keeps exceptions fesetprec Sets the precision mode22
  23. 23. How to Set Rounding Modes-2 • In addition, Microsoft has some functions for this purpose, defined in float.h: _clear87, _clearfp _control87, _controlfp _status87, _statusfp • In Fortran, Intel supports control via a function called IEEE_FLAGS.23
  24. 24. Agenda • The need for right-sized precision • Introduction to IEEE half-precision floating-point • Examples of easy things you can do now • Future possible programming environment24
  25. 25. A Developer Scenario• Developer compiles graphics app with tool to track accuracy, display results with “± n.nn” outputs• “Delta debugging” methods discover that 95% of app only needs 16-bit ops; tool identifies 5% where 32-bit needed.• Developer rewrites app for 16-bit ops, removes accuracy tracking for production version• 4x speed from removing bandwidth bottleneck• More frames per second, longer battery life for app25
  26. 26. Summary • Many applications use too much precision • Reducing precision can increase speed and reduce memory requirements • It also saves energy (battery life) and power (which often limits data center capability) • Half-precision floating-point arithmetic is coming, for even more savings • Simple tools let you test the safety of lower precision without having to be a numerical expert26
  27. 27. Next Steps • Try selectively reducing precision on your codes to see if it improves performance. • Try the rounding mode controls presented here as a quick check for accuracy and stability. • Think about how you might use half-precision floating point, perhaps as first step to a more refined answer later.27
  28. 28. Additional Sources of Information on This Topic: Web-based information that is accessible for non-experts: http://floating-point-gui.de/ http://en.wikipedia.org/wiki/Kahan_summation_algorithm http://www.cs.berkeley.edu/~wkahan/Mind1ess.pdf http://ta.twi.tudelft.nl/users/vuik/wi211/disasters.html http://en.wikipedia.org/wiki/IEEE_754-200828
  29. 29. Legal DisclaimerINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT ASPROVIDED IN INTELS TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVERAND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDINGLIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANYPATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.• A "Mission Critical Application" is any application in which failure of the Intel Product could result, directly or indirectly, in personal injury or death. SHOULD YOU PURCHASE OR USE INTELS PRODUCTS FOR ANY SUCH MISSION CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD INTEL AND ITS SUBSIDIARIES, SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OF EACH, HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES, AND EXPENSES AND REASONABLE ATTORNEYS FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY, PERSONAL INJURY, OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION, WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN, MANUFACTURE, OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS.• Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined". Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information.• The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.• Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. Go to: http://www.intel.com/products/processor_number.• Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.• Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to: http://www.intel.com/design/literature.htm• Ivy Bridge and other code names featured are used internally within Intel to identify products that are in development and not yet publicly announced for release. Customers, licensees and other third parties are not authorized by Intel to use code names in advertising, promotion or marketing of any product or services and any such use of Intels internal code names is at the sole risk of the user• Intel, Sponsors of Tomorrow and the Intel logo are trademarks of Intel Corporation in the United States and other countries.• *Other names and brands may be claimed as the property of others.• Copyright ©2012 Intel Corporation.29
  30. 30. Risk Factors The above statements and any others in this document that refer to plans and expectations for the first quarter, the year and the future are forward-looking statements that involve a number of risks and uncertainties. Words such as “anticipates,” “expects,” “intends,” “plans,” “believes,” “seeks,” “estimates,” “may,” “will,” “should” and their variations identify forward-looking statements. Statements that refer to or are based on projections, uncertain events or assumptions also identify forward-looking statements. Many factors could affect Intel’s actual results, and variances from Intel’s current expectations regarding such factors could cause actual results to differ materially from those expressed in these forward-looking statements. Intel presently considers the following to be the important factors that could cause actual results to differ materially from the company’s expectations. Demand could be different from Intels expectations due to factors including changes in business and economic conditions, including supply constraints and other disruptions affecting customers; customer acceptance of Intel’s and competitors’ products; changes in customer order patterns including order cancellations; and changes in the level of inventory at customers. Uncertainty in global economic and financial conditions poses a risk that consumers and businesses may defer purchases in response to negative financial events, which could negatively affect product demand and other related matters. Intel operates in intensely competitive industries that are characterized by a high percentage of costs that are fixed or difficult to reduce in the short term and product demand that is highly variable and difficult to forecast. Revenue and the gross margin percentage are affected by the timing of Intel product introductions and the demand for and market acceptance of Intels products; actions taken by Intels competitors, including product offerings and introductions, marketing programs and pricing pressures and Intel’s response to such actions; and Intel’s ability to respond quickly to technological developments and to incorporate new features into its products. Intel is in the process of transitioning to its next generation of products on 22nm process technology, and there could be execution and timing issues associated with these changes, including products defects and errata and lower than anticipated manufacturing yields. The gross margin percentage could vary significantly from expectations based on capacity utilization; variations in inventory valuation, including variations related to the timing of qualifying products for sale; changes in revenue levels; product mix and pricing; the timing and execution of the manufacturing ramp and associated costs; start-up costs; excess or obsolete inventory; changes in unit costs; defects or disruptions in the supply of materials or resources; product manufacturing quality/yields; and impairments of long- lived assets, including manufacturing, assembly/test and intangible assets. The majority of Intel’s non-marketable equity investment portfolio balance is concentrated in companies in the flash memory market segment, and declines in this market segment or changes in management’s plans with respect to Intel’s investments in this market segment could result in significant impairment charges, impacting restructuring charges as well as gains/losses on equity investments and interest and other. Intels results could be affected by adverse economic, social, political and physical/infrastructure conditions in countries where Intel, its customers or its suppliers operate, including military conflict and other security risks, natural disasters, infrastructure disruptions, health concerns and fluctuations in currency exchange rates. Expenses, particularly certain marketing and compensation expenses, as well as restructuring and asset impairment charges, vary depending on the level of demand for Intels products and the level of revenue and profits. Intel’s results could be affected by the timing of closing of acquisitions and divestitures. Intels results could be affected by adverse effects associated with product defects and errata (deviations from published specifications), and by litigation or regulatory matters involving intellectual property, stockholder, consumer, antitrust and other issues, such as the litigation and regulatory matters described in Intels SEC reports. An unfavorable ruling could include monetary damages or an injunction prohibiting us from manufacturing or selling one or more products, precluding particular business practices, impacting Intel’s ability to design its products, or requiring other remedies such as compulsory licensing of intellectual property. A detailed discussion of these and other factors that could affect Intel’s results is included in Intel’s SEC filings, including the report on Form 10-Q for the quarter ended Oct. 1, 2011. Rev. 1/19/1230

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