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Flash 101

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An explanation of how silicon-wafer-totting droids translate to a read+write operation of an SSD device. Presented at Sydney VMUG 2012Q2. …

An explanation of how silicon-wafer-totting droids translate to a read+write operation of an SSD device. Presented at Sydney VMUG 2012Q2.

Best downloaded and played with Keynote for animations.


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  • Transcript

    • 1. Flash 101roman tarnavski - @romant
    • 2. • iPods• Laptops• Cameras• Enterprise Arrays• Embedded Devices
    • 3. why?• computer buses and networks are faster• electromechanical disk drives are slower• colder to run• faster to execute• slower to die*
    • 4. What’s inside?
    • 5. • NAND Memory• Controller• Interface
    • 6. NAND Memory
    • 7. NAND Memory
    • 8. NAND Memory Plane Plane Die
    • 9. Plane Plane Die
    • 10. PlaneBlock
    • 11. Plane Block ... BlockPage RegisterCache Register
    • 12. Plane BlockPage Page Page Page ...Page Page Page Page ... BlockPage Page Page Page ...Page Page Page Page Page Register Cache Register
    • 13. whoa ?!
    • 14. SLC / MLC / eMLC / TLC … Features SLC MLCBits per cell 1 2Endurance (erase/write cycles) 100,000 10,000Read service time (max) 25µs 50µsWrite service time (typical) 200–300µs 600–900µsBlock Erase (typical) 1.5 - 2 ms 2 ms
    • 15. hold on to your helmets!
    • 16. Tunnel OxideFloating Gate Fresh Cell N- N+
    • 17. Programmed Tunnel OxideFloating Gate Programming puts electrons on Floating Gate N- N+ Floating Gate can Permanently Store the Charge
    • 18. Erase Tunnel OxideFloating Gate Erase takes electrons off the Floating Gate N- N+
    • 19. Terminology Update
    • 20. Terminology Update• Cell = basic memory unit• Level = logical method to define the value of a bit
    • 21. cell threshold
    • 22. cell threshold
    • 23. cell threshold
    • 24. SLC
    • 25. SLC MLC Equivalent Scale
    • 26. more == better ?
    • 27. Endurance Performance * FTL Capability72nm 50nm 34nm 25nm Xnm
    • 28. Flash Translation Layer - FTL• The secret sauce - i.e: • RAID / RAISE (Redundant Array of Independent Silicon Elements) • GC algorithms
    • 29. controller
    • 30. controller
    • 31. controllerFlash Translation Layer
    • 32. controllerFlash Translation Layer Block Manager
    • 33. controllerFlash Translation Layer Block Manager Garbage Collector
    • 34. controllerFlash Translation Layer Block Manager Garbage Collector Wear Leveler
    • 35. controllerFlash Translation Layer Block Manager Garbage Collector Wear Leveler ECC Buffer / Cache
    • 36. controllerFlash Translation Layer Block Manager Garbage Collector Wear Leveler ECC Buffer / Cache
    • 37. controllerFlash Translation Layer Garbage Collector Wear Leveler ECC Buffer / Cache
    • 38. controllerFlash Translation Layer Garbage Collector Wear Leveler ECC Buffer / Cache
    • 39. Erased Valid Invalid
    • 40. write *Erased Valid Invalid
    • 41. write *Erased Valid Invalid
    • 42. write *Erased Valid Invalid
    • 43. write *Erased Valid Invalid
    • 44. write * (re) - ReadErased Valid Invalid
    • 45. write / erase / TRIM write * (re) - ReadErased Valid Invalid
    • 46. write / erase / TRIM write * (re) - ReadErased Valid Invalid
    • 47. Blocks vs. Pages Block• Made up of • Basic storage unit • 32 / 64 / 128 pages • Has no standard capacity• Assembled in RAM Block and written whole • 4 / 8 / 16 KB
    • 48. Blocks vs. Pages Block Page Page Page Page• Made up of • Basic storage unit ... • • Page Page Page Page 32 / 64 / 128 pages Has no standard capacity• Assembled in RAM Block and written whole Page Page Page Page • 4 / 8 / 16 KB Page Page ... Page Page
    • 49. Erased New Used
    • 50. Erased New Used Invalid Written-to / Erased
    • 51. New Data• Whole blocks must be erased & written• Writes Speed is affected
    • 52. By Example - Efficiency 101 • Writing 4 K will at• 25nm die, 8GB chip worst:• Page Size: 8 KB • Read ~2 MB• Block Size: 256 pages • Append 4K = 2048 KB • Write 2 MB
    • 53. Endurance• User Created• Internal Activity • GC, Wear Leveling, Page Remapping• Overprovisioning• Write Amplification
    • 54. ssd latency over time • source : tintri
    • 55. interface• Yesterday : SATA / SAS• Today : PCIe• Tomorrow : SCSI Express
    • 56. thank younow ask me something … please