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TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
TSMC/Solido Webinar
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TSMC/Solido Webinar

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This presentation covers: …

This presentation covers:
Variation challenges in custom IC design
Variation-aware solutions available in the TSMC AMS reference flow
Methods to develop and verify designs over PVT corners in less time
How to efficiently apply Monte Carlo techniques in design sign-off
How Monte Carlo is really possible up to 6-sigma
Customer case studies of the above methods

Presenters:
- Nigel Bleasdale, Director of Product Management, Solido Design Automation
- Jason Chen, Design Methodology and Service Marketing, TSMC

Published in: Technology, Design
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  • With the march of progress pushing for higher integration on smaller and smaller geometries the variation in a designs performance is increasing dramatically and managing that variation is becoming more of a challenge.Solido is dedicated to providing the solutions to help designers manage the variation effects during the design process, while keeping the designer in full controlWe augment the designers existing flow with additional analysis capabilities to understand how their design’s performance may change after layout, after manufacture and after being installed in the final application.Instead of taking control and trying to optimize the design automatically, Solido tools give insight into where a design fits and what choices will increase it’s robustness.We empower designers with the information needed to make choices and to understand their consequence.We inform the designer of the design margin, so overdesign is not necessary, often freeing up area or reducing powerWith insight into how a design fits within the targeted process and end application, we help the designer understand the risks earlyBy managing the unpredictable variations, we reduce ECOs and interations through layout, and reduce time to completion on each designOnly with a clear understanding of a designs margin to the target process and application can you better predict the final design qualityLastly, with understanding of what a design can and cannot do, along with the tradeoffs, is it possible to find the optimum design
  • Transcript

    • 1. Variation Webinar for Optimal Yield in Memory, Analog, & Custom Digital Design
      October 12, 2011
      All audio is presented through the telephoneDial-up information is available in your Webinar invitation base on your location
    • 2. Achieving optimal Yield in Memory, Analog, and Custom Digital Design
      Presenters
      Jason Chen
      Design Methodology and Service MarketingTSMC
      Nigel Bleasdale
      Director of Product ManagementSolido Design Automation
      Copyright Solido Design Automation Inc. All rights reserved
    • 3. Agenda
      Introductions
      Variation Design Challenges
      TSMC AMS Reference Flow 2.0
      Advanced PVT Flow
      Advanced Monte Carlo Flow
      Customers succeeding with Solido
      Closing comments
      SC_T
      SC_R
      SC_L
      SC_B
      Copyright Solido Design Automation Inc. All rights reserved
    • 4. Variation ImpactsBecoming critical at smaller process nodes
      Shrinking geometries drive increasing levels of integration with higher levels of variation risk
      65% of engineers surveyed see variation as their top priority in the next 2 years
      Source: 2011 Independent Survey
      Copyright Solido Design Automation Inc. All rights reserved
    • 5. Many Types of Variation to Consider
      Implementation
      Layout
      Dependent
      Effects
      Parasitic
      Dependent
      Effects
      Power
      Dependent
      Effects
      Operational
      Fabrication
      Environmental
      Global
      Loading
      Local
      Design Challenges
      Over or under
      design
      Increased
      validation costs
      Less
      predictability
      Copyright Solido Design Automation Inc. All rights reserved
    • 6. Agenda
      Introductions
      Variation Design Challenges
      TSMC AMS Reference Flow 2.0
      Advanced PVT Flow
      Advanced Monte Carlo Flow
      Customers succeeding with Solido
      Closing comments
      SC_T
      SC_R
      SC_L
      SC_B
      Copyright Solido Design Automation Inc. All rights reserved
    • 7. Variation-Aware SolutionsinTSMC Analog and Mixed Signal (AMS) Reference Flow 2.0
      Jason Chen
      Oct, 2011
    • 8. Agenda
      Design Challenges at Advanced Nodes
      General Concepts for Open Innovation PlatformTM (OIP) and AMS Ref 2.0
      Advanced Monte Carlo in TSMC AMS Ref 2.0
    • 9. Design Challenges at Advanced Nodes
      The design variations are NOT only from devices/process
      Not cost-effective to over budget all variations in design margins
      Monte Carlo verification to manage risks in variations
      Trade-off between runtime and accuracy
      Debugging capability
      Physical Effects are more significant in advanced nodes
      Layout Dependent Effects (LDE), depends upon layout placement
      Interconnect RC, depends upon placement & routing
      EM/IR drop, depends upon power planning
    • 10. EDA/IP/Service
      Partners
      Innovations
      Customer
      Innovations
      Open Innovation PlatformTM (OIP)
      Requirements
      Product
      Tape out
      OIP
      AAA
      TSMC
      Innovations
      Earlier Technology Access via Earlier Ecosystem Readiness
    • 11. Through Resource Sharing and Early Engagement
      Tools, IP
      Design Kit
      Flow and Methodology
      Services
      Design Investment
      Original
      Investment
      Actual Investment
      Collaboration Optimizes ROI
    • 12. TSMC AMS Ref 2.0 General Concept
      AMS2.0 Plug-Ins
      LDE
      RC
      IR/EM
      Real-time
      Solver
      Enables designer to iterate between design spec and layout
      within mini-loop
      Design
      Constraints
      Circuit Design Spec.
      Circuit to device level
      Mini-Loop
      Pre-Layout
      Circuit Schematic
      Layout
      Post-Layout
      Verification
      Traditional
      TSMC PDK & models as foundation
    • 13. Design-Spec Driven Design Flow
      Variation
      Analysis
      Circuit Design Spec
      Electrical Constraints  Physical Constraints
      1st Physical Layer
      2ndAPI Layer
      3rd Application Layer
      (Database level)
      (Interface level)
      (EDA Tools Application)
      Design Constraints
      (LDE, RC, EM/IR)
      RCX-API
      SIM-API
      LDE-API
      Optimize-API

      LDE Aware
      ….
      Power Aware
      Parasitic Aware
    • 14. Advanced Monte Carlo Methodology
    • 15. Applying Advanced Monte Carlo Methodologyin TSMC AMS Ref 2.0
      Analyze
      Analyzed low yield with only 46 Monte Carlo samples
      Identify
      Generate 3-sigma corners and locate design sensitivities
      Fix
      Iterated executions to reduce design sensitivities
      Verify
      Verified yield to 3-sigma on “Charge Pump”, 4-sigma on “VCO”, 5-sigma on “Sense Amp” and 6-sigma on “bit cell”
    • 16. TSMC AMS Ref 2.0 Sample Results, after Applying Advanced Monte Carlo Methodology
    • 17. Summary
      The collaboration between TSMC and Solido is one of the successful examples of TSMC’s Open Innovation Platform
      TSMC Analog Mixed-Signal Reference Flow 2.0 provides an alternative solution to the existing traditional design flow
      Solido’s solutions of Advanced Monte Carlo and High-Sigma Monte Carlo show better yield and centering results with less Monte Carlo samples
      TSMC customers enjoy the benefits with minimized challenges for their designs in advanced nodes
    • 18. Agenda
      Introductions
      Variation Design Challenges
      TSMC AMS Reference Flow 2.0
      Advanced PVT Flow
      Advanced Monte Carlo Flow
      Customers succeeding with Solido
      Closing comments
      SC_T
      SC_R
      SC_L
      SC_B
      Copyright Solido Design Automation Inc. All rights reserved
    • 19. The Solido Mission
      Established in 2005, Solido is a recognized leader in managing the impact of variations on design
      Solido solutions are used in production
      for 130nm to 28nm nodes
      Copyright Solido Design Automation Inc. All rights reserved
    • 20. Solido Products and Partner Integration
      High-Sigma Monte Carlo+
      Future Apps&
      Customer Apps
      PVT+
      Monte Carlo+
      Run PVT+
      Run Fast PVT+ (beta)
      Run High Sigma Monte Carlo
      Run Monte Carlo +
      Run Monte Carlo +
      Packages
      Run DesignSense
      Run DesignSense
      Run DesignSense
      New App
      Run Extracted Corners
      Run Extracted Corners
      Run Extracted Corners
      Customer App
      Solido Variation Designer
      Simulator Independent Interface
      PDK interface
      Design & Test Interface
      HSPICE
      Spectre/APS
      ADE (5.1 & 6.1)
      TSMC
      Netlist
      CustomSim
      AFS
      Eldo
      FineSim
      Copyright Solido Design Automation Inc. All rights reserved
    • 21. Advanced PVT Solution
      PVT+
      20x faster finding development corners
      8X faster for full corner verification
      Any failing corners are found even faster
      30% reduction in design debug time
      Manage a history of design changes
      Run PVT+
      Run Fast PVT+ (beta)
      Run DesignSense
      Run Extracted Corners
      Solido Variation Designer
      Simulator Independent Interface
      PDK interface
      Design & Test Interface
      HSPICE
      Spectre/APS
      ADE (5.1 & 6.1)
      TSMC
      Netlist
      CustomSim
      AFS
      Eldo
      FineSim
      Copyright Solido Design Automation Inc. All rights reserved
    • 22. Advanced PVT Sub-FlowTSMC AMS Reference Flow 2.0
      Advanced PVT overcomes key drawbacks of traditional PVT analysis, providing:
      More coverage with fewer simulations
      Awareness of environmental variable sensitivity
      Key design variable contributions to PVT variation
      30% less time to debug and fix PVT problems
      Advanced PVT includes the following technologies:
      Design of Experiments: Orthogonal, Fractional, or Sweep
      Sensitivity analysis across worst-case corners
      Insights into optimal design changes
      Full interactive control
      Copyright Solido Design Automation Inc. All rights reserved
    • 23. Advanced PVT Sub-FlowOverview
      Save Worst-CaseCorners (WCC)
      Run Corners
      Using DoE
      Run sensitivity across WCC
      Validate across
      all Corners
      x
      o
      o
      x
      Managedesign changes
      Explore designs over WCC
      Update design
      Initial
      Updated
      Copyright Solido Design Automation Inc. All rights reserved
    • 24. Advanced PVT Sub-FlowNew – Automated Fast PVT Analysis
      New PVT solution since AMS 2.0 release
      Corner extraction for design debug
      Automated DOE based solution to quickly find design specific representative corners for development
      Very quickly explores across all corner combinations
      Design Verification
      Runs only the simulations needed to verify the design
      Fast verification with auto-stop
      Optional stopping criteria: Simulation limit, time limit, margin limit
      All methods take advantage of LSF and SGE
      Copyright Solido Design Automation Inc. All rights reserved
    • 25. Video Demonstration of Fast-PVT
      Video
      Copyright Solido Design Automation Inc. All rights reserved
    • 26. Advanced PVT Sub-FlowWith Solido Variation Designer
      Run DesignSense
      Run Extracted Corners
      Run PVT+
      Run PVT+
      Benefits to TSMC 28nm Reference Flow
      TSMC 28nm PDK
      Solido PVT+ Package
      Analyze
      Identify
      Fix
      Verify
      Variation Designer Platform
      (Simulator independent)
      Solido’s advanced PVT analysis brings cornerdebug earlier in the design flow, reducinglate stage verification failures
      High Yield Designs
      Copyright Solido Design Automation Inc. All rights reserved
    • 27. Agenda
      Introductions
      Variation Design Challenges
      TSMC AMS Reference Flow 2.0
      Advanced PVT Flow
      Advanced Monte Carlo Flow
      Customers succeeding with Solido
      Closing comments
      SC_T
      SC_R
      SC_L
      SC_B
      Copyright Solido Design Automation Inc. All rights reserved
    • 28. Advanced Monte Carlo Solution
      Monte Carlo+
      Monte Carlo+
      Quality-driven analysis
      3X faster convergence to target yield with OSS
      Generate 3-sigma corners
      30% reduction in design debug time
      Manage a history of design changes
      Run Monte Carlo +
      Run Monte Carlo +
      Run DesignSense
      Run DesignSense
      Run Extracted Corners
      Run Extracted Corners
      Solido Variation Designer
      Simulator Independent Interface
      PDK interface
      Design & Test Interface
      HSPICE
      Spectre/APS
      ADE (5.1 & 6.1)
      TSMC
      Netlist
      CustomSim
      AFS
      Eldo
      FineSim
      Copyright Solido Design Automation Inc. All rights reserved
    • 29. Advanced Monte Carlo Sub-FlowTSMC AMS Reference Flow 2.0
      Advanced Monte Carlo overcomes key drawbacks of traditional Monte Carlo analysis, providing:
      Fewer simulations
      Accurate, defendable results
      Guidance to debug or fix variation problems
      Advanced Monte Carlo includes these technologies:
      Accuracy-aware Monte Carlo
      Optimal Spread Sampling +LHS and regular MC
      Statistical corner extraction
      Statistical impact analysis
      DesignSense variation-aware sensitivity analysis
      Copyright Solido Design Automation Inc. All rights reserved
    • 30. High Sigma Monte Carlo SolutionFast, Accurate, Scalable and Verifiable
      High-Sigma Monte Carlo+
      High-Sigma Monte Carlo+
      Runs Monte Carlo up to 5 billion samples
      >1,000,000 times faster than Monte Carlo at 6σ
      Spice accurate verification
      Scalable up to 1000 variables
      Includes auto-stop and visual verification
      Run High Sigma Monte Carlo
      Run Monte Carlo +
      Run High Sigma Monte Carlo
      Run Monte Carlo +
      Run DesignSense
      Run DesignSense
      Run Extracted Corners
      Run Extracted Corners
      Solido Variation Designer
      Simulator Independent Interface
      PDK interface
      Design & Test Interface
      HSPICE
      Spectre/APS
      ADE (5.1 & 6.1)
      TSMC
      Netlist
      CustomSim
      AFS
      Eldo
      FineSim
      Copyright Solido Design Automation Inc. All rights reserved
    • 31. Advanced Monte Carlo Sub-Flow4, 5, and 6-sigma verification
      High Sigma Monte Carlo, addresses the requirement to be Fast, Accurate, Scalable, and Verifiable:
      6-sigma verification (5B samples) in several hours
      Reduced to minutes in next release
      Scales better than other High-Sigma solution to 100s of variables
      Visual verification of the complete flow
      Advanced Monte Carlo includes these technologies:
      Intelligent algorithm to focus attention only on the tails of the statistical distribution
      Very efficient distributed simulation across LSF or SGE
      QQ plot visualization of results
      Multi-thread and multi-machine being added to core engine innext release
      Copyright Solido Design Automation Inc. All rights reserved
    • 32. Video Demonstration of High-sigma MC
      Video
      Copyright Solido Design Automation Inc. All rights reserved
    • 33. Advanced Monte Carlo Sub-FlowWith Solido Variation Designer
      Run High-Sigma Monte Carlo+
      Run High-Sigma Monte Carlo+
      Run DesignSense
      Run Extracted Corners
      Run Monte Carlo+
      Run Monte Carlo+
      Benefits to TSMC 28nm Reference Flow
      TSMC 28nm PDK
      Solido MC+ and HSMC+ Package
      Analyze
      Identify
      Fix
      Verify
      Variation Designer Platform
      (Simulator independent)
      High Yield Designs
      Solido Variation Designer makes Monte Carloanalysis viable in design analysis and verification
      Copyright Solido Design Automation Inc. All rights reserved
    • 34. Agenda
      Introductions
      Variation Design Challenges
      TSMC AMS Reference Flow 2.0
      Advanced PVT Flow
      Advanced Monte Carlo Flow
      Customers succeeding with Solido
      Closing comments
      SC_T
      SC_R
      SC_L
      SC_B
      Copyright Solido Design Automation Inc. All rights reserved
    • 35. Customer Case Study #1- 28nmQualcomm: HSPICE Statistical Simulation for Memory
      Full video: http://www.synopsys.com/Tools/Verification/AMSVerification/Pages/DAC2011-AMS-Video.aspx?cmp=VDAC2011AMS-AMS-HL
      Design goals
      28nm LP process
      Verify write to 5.8 sigma
      Validate Vccminoperation
      Solution
      HSPICE
      Variation Designer
      100 cpu LSF cluster
      Mohamed Abu-Rahma
      Memory Design Group, Qualcomm Incorporated
      Copyright Solido Design Automation Inc. All rights reserved
    • 36. Customer Case Study #2 - 28nm NVIDIA
      Design goals
      28nm process
      Verify memory to6-sigma
      Verify standard cells to >4-sigma
      PLL verification pre and post layout
      Power-analysis across 1000s of corners
      Solution
      HSPICE
      Variation Designer
      >200 cpu LSF cluster
      Ting Ku
      NVIDIA Corporation
      Full article: http://www.deepchip.com/items/0492-10.html
      Copyright Solido Design Automation Inc. All rights reserved
    • 37. Customer Case Study #3 - 65nm Hauwei-HiSilicon
      Full article: http://www.deepchip.com/items/0492-05.html
      Corner analysis
      Design over 45 corners (5 process x 3 voltage x 3 temperature)
      We used Solido's PVT+ DoE to narrow the 45 corners to our 8 worst corners.
      Found and extracted 4 failing corners
      Solido'ssensitivity analysis suggested fixes to adjust two transistor lengths. After making the changes, we re-ran the simulations across the 4 failing corners. The design now passed spec.
      We ran a final check with Solido PVT+ across all 45 corners. It passed specs at all the corner conditions.
      Statistical analysis
      Solido made measuring non-linearity at 3-sigma practical.
      Design goals
      65nm process
      Validate design across 45 corners
      Validate designs to3-sigma
      Reduce debug time
      Validate DAC non-linearity over statistical variations
      Solution
      Spectre/APS
      Virtuoso ADE
      Variation Designer
      Jun ChenHuawei-HiSilicon
      Copyright Solido Design Automation Inc. All rights reserved
    • 38. Agenda
      Introductions
      Variation Design Challenges
      TSMC AMS Reference Flow 2.0
      Advanced PVT Flow
      Advanced Monte Carlo Flow
      Customers succeeding with Solido
      Closing comments
      SC_T
      SC_R
      SC_L
      SC_B
      Copyright Solido Design Automation Inc. All rights reserved
    • 39. Variation Analysis is a Collaborative Effort
      Customer
      PDKs
      130nm-28nm
      Variation Challenges
      Variation Designer
      + Apps
      EDA Partners
      Copyright Solido Design Automation Inc. All rights reserved
    • 40. A Collaborative SolutionAddressing Layout Dependent Effects at 28nm
      Flow presentation at TSMC’s Open Innovation Platform,October 18th at the San Jose Convention Center
      Copyright Solido Design Automation Inc. All rights reserved

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