1206 Interrupts Of 8085


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  • 1206 Interrupts Of 8085

    1. 1. Interrupts of 8085
    2. 2. Interrupt I/O <ul><li>Memory-mapped & Peripheral-mapped I/O </li></ul><ul><ul><li>process of data transfer b/w 8085 & I/O devices i nitiated by processor </li></ul></ul><ul><li>Interrupt I/O </li></ul><ul><ul><li>process of data transfer b/w 8085 & I/O devices initiated by an external device </li></ul></ul><ul><ul><li>allows an input/output device to inform the processor that it is ready for communication & requests attention. </li></ul></ul>
    3. 3. 8085 Interrupts <ul><li>8085 has five interrupt inputs </li></ul><ul><li>TRAP </li></ul><ul><li>RST7.5 </li></ul><ul><li>RST 6.5 </li></ul><ul><li>RST5.5 </li></ul><ul><li>INTR </li></ul>
    4. 4. Interrupt pins of 8085
    5. 5. Types of Interrupts <ul><li>Interrupts of 8085 can be classified as </li></ul><ul><ul><li>Maskable (RST 7.5, RST 6.5, RST 5.5, INTR) </li></ul></ul><ul><ul><li>Non-maskable (TRAP) </li></ul></ul><ul><li>An interrupt is a request for attention/service </li></ul><ul><li>8085 may choose to service/not-service a maskable interrupt </li></ul><ul><li>8085 cannot ignore a service request from a non-maskable interrupt </li></ul>
    6. 6. Interrupt process <ul><li>8085 is executing its main program </li></ul><ul><li>an interrupt is generated by an external device </li></ul><ul><li>8085 pauses execution of main program </li></ul><ul><li>8085 calls the Interrupt service routine </li></ul><ul><li>8085 executes the Interrupt service routine </li></ul><ul><li>8085 returns to execution of main program (from where it was paused) </li></ul>
    7. 7. Example: Blinking LED Display with Interrupt-based Display-Pattern change 8085 Input Switches LED Display RST 7.5 (Display-Pattern ) Interrupt Switch Peripheral-mapped I/O Interrupt I/O
    8. 8. Interrupt Service Routine (ISR) <ul><li>It is a subroutine </li></ul><ul><li>8085 calls an ISR in response to an interrupt request by an external device </li></ul><ul><li>ISRs must be located in memory at pre-determined addresses known as Interrupt Vectors </li></ul>
    9. 9. Interrupt Vector Table of 8085 Please Note: INTR is a non-vectored interrupt 002CH RST 5.5 0034H RST 6.5 003CH RST 7.5 0024H TRAP Interrupt Vector Interrupt
    10. 10. Using Vectored Interrupts of 8085 <ul><li>By default, all the vectored interrupts (except TRAP) of 8085 are disabled </li></ul><ul><li>8085 vectored interrupts are enabled with two instructions: EI and SIM </li></ul><ul><li>EI (Enable Interrupt) : 1-byte instruction that sets the Interrupt Enable flip-flop </li></ul><ul><ul><li>It is internal to the processor & can be set or reset by using software instructions </li></ul></ul>
    11. 11. Using Vectored Interrupts <ul><li>Step-1 </li></ul><ul><li>Set Interrupt Enable flip-flop by using EI instruction to enable the interrupt process </li></ul><ul><li>Step-2 </li></ul><ul><li>Use SIM (Set Interrupt Mask) instruction to set mask for RST 7.5, 6.5 and 5.5 interrupts </li></ul>
    12. 12. SIM Instruction <ul><li>It is a 1-byte instruction </li></ul><ul><li>Reads Accumulator contents </li></ul><ul><li>Enables/Disables interrupts accordingly </li></ul><ul><li>Used for three different functions </li></ul><ul><ul><li>Set mask for RST 7.5, 6.5, 5.5 interrupts </li></ul></ul><ul><ul><li>Additional control for RST 7.5 </li></ul></ul><ul><ul><li>Implement serial I/O </li></ul></ul>
    13. 13. Accumulator bit pattern for SIM 0 = Available , 1 = Masked Mask Set Enable, 0 = bits 0-2 ignored 1 = mask is set IF 1, RESET RST 7.5 If 1, bit 7 is output to serial output data latch Serial Output Data, ignored if bit 6 = 0 M5.5 M6.5 M7.5 MSE R7.5 XXX SDE SOD D0 D1 D2 D3 D4 D5 D6 D7
    14. 14. 8085 Interrupt process for Vectored-Interrupts <ul><li>Enables Interrupt process by writing the EI instruction in the main program </li></ul><ul><li>Set interrupt mask using SIM instruction </li></ul><ul><li>8085 monitors the status of all interrupt lines during the execution of each instruction </li></ul>
    15. 15. <ul><li>When 8085 detects an interrupt signal from an external device </li></ul><ul><ul><li>It completes execution of current instruction </li></ul></ul><ul><ul><li>Disables the Interrupt Enable flip-flop </li></ul></ul><ul><li>Executes a CALL to Interrupt Vector location for that interrupt </li></ul><ul><ul><li>Before the CALL is made, 8085 stores return address in main program on stack </li></ul></ul>8085 Interrupt process for Vectored-Interrupts (Cont.)
    16. 16. <ul><li>8085 executes the ISR written at the specified interrupt vector location </li></ul><ul><ul><li>ISR should include the EI instruction to Enable Interrupt again </li></ul></ul><ul><ul><li>At the end of ISR, RET instruction transfers the program control back to the main program </li></ul></ul>8085 Interrupt process for Vectored-Interrupts (Cont.)
    17. 17. Interrupt Programming <ul><li>Problem statement: </li></ul><ul><li>Write a program for blinking a LED display (port address 80H) with interrupt-based display pattern change . </li></ul><ul><li>Write a subroutine to generate a delay of 50ms with 1MHz clock to set the blink rate. </li></ul><ul><li>Write a Interrupt Service Routine for vectored interrupt RST6.5 to read the display pattern for blinking from an input port with address 8000H </li></ul>