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3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
3. op amp
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3. op amp

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  • 1. CHAPTER 3OPERATIONAL AMP
  • 2. OPERATIONAL AMPLIFIERLearning Objectives: To understand the general Op-amp circuit design To understand the differential amplifier To understand more stages in gain amplifier To understand the push pull amplifier To understand the ideal op-amp To understand the op-amp configurations
  • 3. INTRODUCTION• Op-amp has high gain amplifier and able to amplify signal with frequency ranging from 0 to 1MHz.• designed to perform mathematical operations like summation, subtraction, multiplication, differential and integration etc in analogue computer• has 2 input terminal : - Inverting input terminal - Non inverting input terminal
  • 4. • only has 1 output terminal• a complete amplifier electronic circuit may contains transistor, diode, resistor, capacitor and others components and constructed on a single silicon ship.• the area is 5mm2 and thickness is less than 0.5mm, it is protected by lace plastic.
  • 5. - SYMBOL Construction: - 2 input terminal - 1 output terminal
  • 6. CONFIGURATION
  • 7. TYPE & EXAMPLES• Common usage – Have range from 0 to 1 MHz – Examples: µA709 , 101, 741, 301• For DC usage and low achievement – Have high input impedance – Low offset input voltage – Examples : h0052, 108
  • 8. • For AC usage and high achievement – Have wide range – Example: H0063• For high power and voltage – Use single line power supply and can trigger load directly – Examples ; H0004, H0021, M124• Programmable – Special op-amp that can be programmable – Example: 4250
  • 9. OP-AMP APPLICATIONS• As mathematic operation in analogue/calculator - Summation, multiplication, division, integration and differentiation.• Waveform generator – Uses in Wein Bridge Oscillator for generate sinus waveform. – Use differential and integrator circuit to produce square wave and triangular waveform.
  • 10. • RC active filter – To filter signal which allow signal pass at certain frequency only.• Signal gain – To amplify audio/radio frequency @ signal – To amplify digital signal that send across long distance• Op-amp IC 741 is considered as industry standard op-amplifier.
  • 11. DIFFERENTIAL AMP• Differential Amplifier - BJT Type - Re function as high impedance to input signal at input terminal. (Re = ideal) - If there are same input ,Vin1 =Vin2 , amplifier produce small gain, Av=0 - If the input different, Vin1 ≠ Vin2 , amplifier have high gain, Av = high. - Output id depended on differentiate for 2 input.
  • 12. • Differential Amplifier – FET Type
  • 13. Differences Between FET & BJT FET BJT Both as amplifier Connection : Common Base Similarity Gate / Base – as input Drain / Collector – as output FET with common base connection has high input resistance almost 100MΩ Differences FET - low internal noise rate compare to common transistor. It always use in hi-fi amplifier and receiver in FM radio Control voltage controlled current controlledDifferences Current only 1 majority current both current carrier Carrier carrier
  • 14. CONFIGURATION IN OP-AMP CIRCUIT• Dledintbnou o eepacut u ndulaet b , p• Dledintuacut o eepnlaetu u ndubno b , p• Sedintbnou ineepacut gndulaet l , p• Sedintuacut ineepnlaetu gndubno l , p
  • 15. DEFFERENTIATE THE CONFIGURATION• Ecfgtostgeadsefcs aouinc ossoerlar: c nr i ar benvat h i a ei o i. Intsautttasnc piglqnhuicu un ayt eirit i cnto oen nc; i Ip:2psaudois nt intiglisest u un s, i ce2p a int ld u Ip1psaudois ceinint nt intiglisest aslep u un s, i ldg u :
  • 16. DEFFERENTIATE THE CONFIGURATIONi. Iteltgseube2 cer,tetuilbac fhoemrdt e otshutwbn. vai aee n lc o elae s w o p Iteltgseuacer arfrtgntetuiln bn. fhoemrdalc neood otwt ac vai aet ot de ru,hu o lae s o p
  • 17. OP AMP INTERNAL BLOCK DIAGRAM• Csf3v: oitolel n e s – 1st level – input level – 2nd level – Centre level – 3rd level – output level• Iissenlelsaidomneniseaaidmecsainfrn,satrecrmeuly t digd3vt vplewt sawnvfon shsictreciglinfrnfoprsp eni eoorb hhigl ador ouatt eeen eee o p. e k is w
  • 18. OP AMP INTERNAL BLOCK DIAGRAM• Optralodrm p innbkia . -m l c g ae a
  • 19. High Input Impedance Differential Amplifier• 2pbnou int acut u laet . , p• Himntehpsn ig pae aintigl h ecoc u a d• LgtCooRtoa(Mshhmno. oaoo ndeinto Ruauin dis win mM je RCRcsmane mec i ) g• Hgtuflsn igaoe igl hin su a• Rcoepvtg eesintoe d f t ula u• Rc‘dtinruysgrcolin eerf’ c itb iniecpg d i ic u dt u . u• ‘Disnsdgltamdgeituflsn rf’ ueeinhalifeot rwsuigl it dir sa t p t e he a i h• TlelmmabaeepaerintisenMaoeogsde h v oi ptneut imnf p saCRdsvt er ud ise s ot csh eco u t d Rnf t lai ec. t r d
  • 20. High Gain Voltage Amplifier (More stage of gain)• 2pbnou int acut ulaet . , p• Hoga iglt ein hag v• Hreregttigrounounint igivcnaogutanbeop h ut inr et dt r t u d p d .
  • 21. Low Output impedance Differential Amplifier• Kncsphlalifephletelor n alaB pmr@pmoe o ss uu p uu i rf w w s i s .• Csfslepbnou oitoinintacut n g ulaet s - p• Asurtcnt2lelaoumrdrnlalifeofedlo. c be oenvnutalifeifetamrnacba taf oncdedt p e p t t yd p i i i e• Paeucettigrloauttrin rp ngunrgatoum er ohr to ed t ea e p l• Palomnou rp wecut er ipaet . e d p
  • 22. DIFFERENTIAL AMPLIFIER INTERGRATED CIRCUIT
  • 23. • Csf4sdmr oitoccep. n a alife s a i• Deamrwoledou ifetlalifeit‘D eeut rn p hu ndt ’ i i b p – Av1 formed by Q1 and Q2 while Q3 is used as ‘constant-current’ terminal for supply ‘high common mode rejection’ – Q3 is stable from temperature effect by 2 resistors and 2 diodes.
  • 24. • Deamrwineeut ifetlalifeitsledou rn p hgndt i i p – Output from differential amplifier Q1 and Q2 will trigger both Q4 and Q5 – Q4 and Q5 have emitter source.• Sedouosop(rmwgroutghg6 ineeutfmnafoQiltigutseruQ gndt r edir 5 r et atoh. l p c ) p
  • 25. • Fbksaersleetuogesgn eariscotbt otvarfrt ru. ecetnf ahu lt eeood d p• Qd8eioshelitergmuvaolanlmaaulyltgoinizutimn) 7 Qrtnpsprf iva mgstoaosespoermetupae a oaaas oex oeci ( sm pvaf imp ec np imlt i t s o d• Tso8laliften rntrQ mhigl. ais wp sa i y
  • 26. TERM DEFINITION• Open Loop Gain – Amplifier gain without feedback. – Ideal Op-amp in open loop gain = ∞ , Vo for op-amp is too large compare to Vid – Vid normally too small and practically can assume no different between inverting and non- inverting input.
  • 27. Common Mode Gain – Gain – when both input terminal have same signal – Should be when Vid =0, Vo= 0 – Practically, when Vo have value Acm will have small value. – Knows as CMRR, Common Mode Rejection Ratio – CMRR = Closed loop gain, Av• Common mode gain, Acm – Normally Acm << 1 – CMRR larger is better – Unit : dB – Av CMRR (dB) = 20 lg Acm• = 20 lg CMRR – For op-amp 741, CMRR = 90dB
  • 28. • Offset Voltage – undesired small signal – Generate by amplifier and voltage is produces between input terminals even though the input is connected to 0 volt. – It happen due to unsuccessful matching between basic transistor in op amp circuit.• Vawv. ofm s eilo – lt
  • 29. • Offset Current – Different between current is needed by two input transistor in op amp – It happen due to unsuccessful matching between transistor β – input transistor,• ββ 1≠2• I = -I os I β2 β1
  • 30. • Virtual Ground – Both op amp input terminal always refer as adder point or virtual ground – It happen/occur due to :• Cnlwlo u taa w re y s• Vgsptrintowpeoltgtorwomeitofea.Tlovtgsrdesptrintaoedgu. oeinte a loc advaate h pp dhtebkh wai picdinte a tcnt t rn lt a umo o r t oe hse au wu dc is oe et a umh nc ood a l m n s l l e – Virtual ground is a point where the current flow and voltage at that point is zero.
  • 31. • Maximum rate for Op-Amp• Opldaifteaurtisxed p wmh xm e d: a i ag m a ce m e ime e – Power supply ± 18V – Operating temperature range, 0-700C – Input voltage, maximum different between +ve and –ve terminal : 30V – Common mode input voltage, 12V, at power supply 15V – Internal power dissipation, 310mW – Saving temperature range, 55-1250C
  • 32. Ideal and ActualCharacteristic of Op Amp
  • 33. OP-AMP CONFIGURATIONS• Ivtnmr(ru) nrigp GI e alife o i p• Nnrinmr(ru) ovtgp GH ne alife o - i p i• Sinmr(ru) u gp GG malife o mi p• Deamrastaraliferu) ifetlalifenuc mr(oF rn p dbt p G i i ro i p• Itgoru) nrtr(oE eGa p• Dea(ru&u) ifettrGCrp rno o GD i po• Caoru&u) ortr(oArp m G GB p po a
  • 34. Understand the Op-Amp configurationsa) Inverting amplifier
  • 35. • Wnaeea(2)tpdecsloorto itagvf dcRoocaodopan het ebk r u l e pei . i• Se+ isrue0,te-mskpegvintaruaestahsanhe+ ~(oaoadfeavtg(out)hpsotnahamneh inVgndV oatieoeheteptgnsl,ottisit to eV=sslcpeodcoeV aeso t titacma.T c od( )hpp t et na u odw h u w 0 mm t ebkla, pn feh s oo me r i , i r r n inrinnttrinisoedgu,isadvirtual ground. vtgpe acnt t rn ce e i um nc ood l a l e
  • 36. • TidlOmsfninput impedance (i)nunileritinvtnnttrinF Kh’snou he p p init ea - h i e Aa Zorewn sinrigpe armhf jutnle ; c t t e i um oir o c r : e l. c i• Stttnrm.1dn uiugoe ae.2 b i f q nq s n
  • 37. • Tnaeghtegltansepwe hetvsna snhert int ilb i e it 1°) eg i t thi a t t h u inverted (hd0 .IRRhais.Itisaitisaduyainreranrinur sfe8 f 1=2,tein- n ce ce n- invtronvtgfe g 1 h s l aitg e i e b .
  • 38. b) Non-Inverting Amplifier
  • 39. • Fdcctoftenvtnmriscedalygsaaoetuogiglbktevtn-inttrinva2ltgiveeoainocg ebkolo n-nrigpeaivbpin mrft o tvt enat hnrig)pe aiaR addn r,gpdin ea n hoi e alif heyp a lpt hu lasaco i e ( um v ei r t k aru r i p l o w negative feedback.• Tcs-ocfganocanvtnmrcuitvyofeeytbyehintimn. hlodooutorden-nrigpeiritwegdqnsilit,vyigp pae is el pnri pus oi e alif c hr or uca r hu ec i i d• Iidlcdnpimn(i)arainnit,aorefointesvinttrinaawtupaeout)ainitonoa neoitoI upae pohifn s c nwt hoiepe anloo timn( nfn plog. ani ,nt ecZ pcgi y nu tl so pit um d u ecR di ee pin d l, p d
  • 40. • V= id• V= id 0• S- =,Tweutenoftepafeasn(-aaemtnlinhwsenos"iruet"smo.Buoisiruetneestr,Rn2 o Vha cshutnhntnebkiglVr tt seeaorot jutnataa uin inesft vaa ot riss1 aR ,V+ iss ae j c o i uddc a ) ehap t te r h c i v l rhmpt ceh t l rhdheo d b i oi d i g a framotaiveeoastenvtnmrwhogaoeruedrinbhasfRn1 o sppnlddn r cs n-nrigpeittelt eint c itbgtm yeto 2 aR m let i i r t kr hoi e alif h vag fhic ine e t ri o d i e wo i ed
  • 41. • S- = . oV ,V in• Touinawtint hutispsitisp ist heh u p .
  • 42. c) Summing Amplifier
  • 43. • Wnaeea(3)Trdecsloinrinmrorto itagvf dcRoocaodovtgpepan het ebk . pu l e pe alif ei . i i• Vgue0,scaRaeaineruSa+V0Hepimnarainnit(i)aorefointegvinttrin(dlcdnaloou +rndVin n3 isf dc t c it otV -=. e,I upaepcgfnZs c nwt hetepe aieoito)nwt t isod( ) ed ebk hic. t , = Vn nt ecpohi i y , nu tl so na um ani s d u h c d i l, p imn. pae ec d
  • 44. • Ayirhf’la pKh w p co : l• IRRR f 1 =2 =,
  • 45. d) Differential Amplifier and Subtractor Amplifier
  • 46. • Wnaeea(2)Trdecsloinrinmrorto itagvf dcRoocaodovtgpepan het ebk . pu l e pe alif ei . i i• Tvtgttenvtnntbsgeltgiveeio(dlOporeertepbaepaepinit) hoehoinrigpyinhoeidrlanIe pmc nnhnteuimnint fn. elaa n- e i u u t vad r t . a A,nu t t i ucs ec ui y e d
  • 47. • Ayhirhf’sunno pTKh cejutn p eco r t c , l i I +=sI =. 1 I 01 I 2 ,o 2• VV0+Vutttte+rin- +-=V -ssuh tm, - , =, b e V V i e
  • 48. • IysRRhV = –1,sitbossuaomr foe1 =2,teout VVoem stcnpe ut n 2 ce bt alif . a ri i
  • 49. e) Integrator • Tcupaininrinoganitcaoseacpe hiritortsavtgnuto hpitraebkoon isc ee ne cf ri wac f dc m t i n. • Wfnintimn(i)V0sV0aeSeceertepon itinit p pae ,+V -isVw innunns intfa hi eu ecZ =,o sl. cor t t h u d e om pp a.
  • 50. • Trfr, hee eo
  • 51. • Tn h, e ,s o• Dtn-dlcrcrssfrapmuaogfssniaunhuttntd,enittepgue uonehaitcoeoascslt e eabcetetu doif vwhntr nd e oi aat i l - p hvaot dsr t o es rt e h i uod. e s , p• Helaestrweadrstepitrcpvefeafrsbbin e,ar ris ilblca s caoaridc dcot leag n geo pec hac no debk a is. c o
  • 52. f) Differentiator • DeaisnpitotgtrTcuacaivintaastvfea. ifentr aps finro hirithapitepnrisedc rt o ooe ea. ec sac udei ebk i • VV0 -==. +V • S o,
  • 53. • TceI isuughsw hun f ns Ola er tR odin m: ’
  • 54. • Tn ,s h, o e :• Iisuebtneetea’sigca t sctle odt hppha in sp oisuo om hg. i• TfeanooefentraanC-afltrtaoibs9hegitineonaaeaitpbs hebker ft drta c s Rwsiehct uapsla ht loamusbyr le. edc t k hi e ot a lops t n t 0a w h pdy st il om w i s re c
  • 55. g) Comparator• Appscbsacpa. n aa aeesoatr O lonudamo m r• Tcusstdchginltgel. hiriti ud etcnsvalv isc eot ae oee e• Itispciote-mudteeocfganittepvtgsoedointaafrnvtgneh. n alian oaissin onooutowhntoecnt onpnrecoet or h pt ,hpp e hpl pnri , h i ulai nc neudeeelaohte i e• Catracmudalot-iglcvsntplypcioigboncmtcpeorptdeantooatrdinocunt. o ror oo sina-oit oeoAic alian hecntaaet enroh iot npfcpa,rvggiritae m semlye ngdanri . ya pt m t oe gi ass o doi u mo i l icc dc pa n t n o r
  • 56. • Asaliciosdrinhantvtgxearalel.Catrcbaoentop: bicpant em enpoecdctinv o roaetgizit we a pt i ot e ni ulaeese e m ncer do t s ew pa y – Zero level detection – Non-Zero level detection• Zleldcn e v eto r et i o e – Can be used to produce a square wave. – The inverting input is grounded and the input signal voltage is applied to non-inverting input. – Because of high open loop voltage gain, a very small difference voltage between the two inputs drive the op-amp into saturation causing voltage to go to its limit.
  • 57. • Tsuidintvtgpeonvtnfzovdcr. hinol poepdn-nrig elel ets e sa ulaali t oi e or et o e• Whinanaeetuasaunaev. hteevetvt o tistitmmtvlel e s w g ,hu x ei e n e i p im g• Whinacss,tepedeoooeaatetuotit hteevrs0 alifrisrvtit psst nhutgs s e s w oe hm i n spit ted o eo n e i p mupitvlel. a miev x o e im s
  • 58. • NZleldcn oe v eto nr et i -o e – Two types of non-zero level comparator: • Non-Inverting comparator – The output switches from LOW to HIGH (positive saturation) when input voltage exceeds a reference voltage applied to the inverting input. • Inverting comparator – The output switches HIGH to LOW when the input exceeds the reference voltage applied to the non-inverting terminal.
  • 59. • Non-inverting • Inverting comparator comparator
  • 60. • Tivtemtragutstwteaisrisf,axraupstrcntdoasvvtgocttetuud oe cpa houtehhrnt ontnp- ris oe fm itelasrehutiss. g hoao iht a e t so e l lueonc r pi oeu o o e r p n e e o p• Tpuetraliktelerrstrintaisralife hupsoc e cc eoant mr el ris t hot is rso p . s o i• Tsetestrsubaeaidcsewispoasangoplocuissohutcpa. hizo ris hldlr t v eeivpe sannmohsp airityudtetuoatr e fheoo egooxs ordi t , d leut uly dcr en o mo i p r• Arpcaraenysgltgiveottefrnvtg mrtcanmb inoeidtsheeela. o a l ge u vad r e recoe ei t ,

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