• Save
Higher nab preparation
Upcoming SlideShare
Loading in...5
×
 

Higher nab preparation

on

  • 1,604 views

Higher Computing NAB revision slides for computer systems unit 1

Higher Computing NAB revision slides for computer systems unit 1

Statistics

Views

Total Views
1,604
Views on SlideShare
1,595
Embed Views
9

Actions

Likes
0
Downloads
0
Comments
0

2 Embeds 9

http://www.uddingstongrammar.com 8
http://hicomp.365remote.com 1

Accessibility

Categories

Upload Details

Uploaded via as Microsoft PowerPoint

Usage Rights

© All Rights Reserved

Report content

Flagged as inappropriate Flag as inappropriate
Flag as inappropriate

Select your reason for flagging this presentation as inappropriate.

Cancel
  • Full Name Full Name Comment goes here.
    Are you sure you want to
    Your message goes here
    Processing…
Post Comment
Edit your comment

    Higher nab preparation Higher nab preparation Presentation Transcript

    • Higher Computing NAB REVISION
    • Areas to review:
      • Floating Point Representation
      • Colour (Bit) Depth
      • Unicode
      • Resolution Independence
      • Processor Structure
      • Control Bus
      • Read Operations 1
      • Read Operations - animation
      • Write Operations 1
      • Write Operations - animation
      • Data Bus Width
      • Address Bus width
      • Cache Memory
      • Buffer
      • Spooler
      • Parallel Interface
      • Serial Interfaces
      • Peer to Peer Network
      • Client/Server Network
      • Router/Hub/Switch
      • Bus Network Topology
      • Star Network Topology
      • Ring Network Topology
      • Mesh Network Topology
      • Bootstrap Loader
      • Image File Types
      • Utility Programs
      • Virus Types/Characteristics
      • Anti-virus Detection Techniques
      • Solid State Storage Devices
    • Floating Point Representation
      • 0.11011 x 2 011
      • Used to store real numbers in a computer
      • MANTISSA = Determines number ACCURACY
      • EXPONENT = Determines number RANGE
      mantissa exponent
    • Colour (Bit) Depth
      • Bit-mapped Graphics
      • The number of bits used to code the colour of each pixel
      • 24 bits p/pixel – 2 24
      Examples on next page >>>
    • Table of Bit Depth 2 4 = 16 colours 2 8 = 256 colours 2 16 = 65,536 colours True Colour 2 24 = 16,777,216 colours
    • Unicode
      • 16 bits are used to encode a character (a,1,$,)
      • 2 16 = 65,536 characters can be represented
      • ASCII – Can only store 128 characters
      • Extended ASCII = 256 characters
    • Resolution Independence
      • Vector Graphics
      • Unfixed resolution
      • Resizing (scaling) does not cause an image to become pixelated
    • Processor Structure Control ALU Registers Cache Main Memory Backing Storage Address bus Data bus Control bus
    • Control Bus
      • READ line
      • WRITE line
      • CLOCK line
      • RESET line
      • INTERRUPT line
      • NMI (Non-maskable Interrupt) Line
      REFER TO P.12-13: BrightRed Higher Revision
    • READ Operation
      • 4 steps
      • Address bus loaded with address of the required memory location
      • READ line is activated on the Control Bus
      • Contents of memory location transferred along the Data Bus to the processor
      • Instructions are decoded and executed
      FETCH/EXECUTE CYCLE
    • Memory Read Operation Cache Main Memory Backing Storage Address bus Data bus Address bus loaded with address of the required memory location The processor activates the READ line on the control bus READ line activated CONTROL BUS The contents of the memory location are transferred along the data bus into the processor If it is an instruction, it is DECODED and EXECUTED in the processor FETCH/EXECUTE CYCLE ***Use arrow keys to control animations*** Control ALU Registers
    • WRITE Operation
      • 4 steps
      • Address bus loaded with address of the required memory location
      • The processor sets up the data bus with the data to be written to memory
      • WRITE line is activated on the Control Bus
      • The new data is transferred along the Data Bus to the memory location
      FETCH/EXECUTE CYCLE
    • Memory Write Operation Cache Main Memory Backing Storage Address bus Data bus WRITE line activated CONTROL BUS FETCH/EXECUTE CYCLE ***Use arrow keys to control animations*** The processor sets up the address bus with the address of the required memory location The processor sets up the data bus with the data to be written to memory The processor activates the WRITE line on the Control Bus The data is transferred along the data bus to the memory location Control ALU Registers
    • Data Bus
      • Bi-directional – data sent 2 ways
      • Transfers data between Main Memory and Processor
      • Lines = bits
      • Modern computers = 32 bit data bus width
      • Wider data bus = more data can be sent at one time
    • Address Bus
      • Uni-directional – memory location address sent 1 way
      • Processor sends address TO Main Memory
      • Lines = bits
      • Modern computers = 32/64 bit address bus width
      • Wider address bus = more memory locations can be addressed
    • Cache Memory Control ALU Registers Cache Main Memory Backing Storage Address bus Data bus Control bus ***Use arrow keys to control animations***
      • Fast-access memory
      • Stores frequently used instructions/data
      • Increase computer performance time
    • Buffer Laser Printer Data to be printed is sent by the FAST processor to the SLOWER functioning printer Buffer Data is stored in the Buffer until the printer is ready to print it. When the printer has ‘caught up’ it requests the data to be printed from the Buffer ***Use arrow keys to control animations*** Not suitable for Network Printing Computer System
    • Spooling Laser Printer File to be printed PROCESSOR HARD DISK Stored temporarily here ***Use arrow keys to control animations*** Suitable for Network Printing
    • Parallel Interfaces Many bits are send down parallel lines – faster than serial transmission ***Use arrow keys to control animations*** 0 1 0 1 0 1 1
    • Serial Transmission 0 One bit is sent down a single line – slower, but more robust than parallel ***Use arrow keys to control animations***
    • Client/Server Network All data goes through the central SERVER CLIENT CLIENT CLIENT CLIENT CLIENT SERVER
    • Peer to Peer Network Want to send a file from one computer to another? The file will go from computer to computer on the network until it reaches its destination. Computer 2 Computer 1 Computer 4 Computer 3
    • Routers/Hubs/Switches A Hub splits a signal down 2 or more channels. Hubs split the signals ‘blindly’ whilst Switches forward data packets down the exact channels more intelligently HUB/SWITCH Network 1 Network 2 Router A router sends data packets between different networks using the Internet Protocol (IP) ROUTER ***Use arrow keys to control animations***
    • Bus Topology Node 1 Node 2 Node 3 Node 4 Node 5 = main channel
      • Advantages
      • Easy to expand
      • A single computer failure will not result in the entire network failing
      • Disadvantages
      • Lots of congestions as nodes use the same channel
      • Data collisions
      • Main channel fails = whole network fails
      ***Use arrow keys to control animations*** = data packet
    • Star Topology = channel
      • Advantages
      • Direct path between nodes and servers
      • Easy to expand
      • If one channel fails, the whole network is not affected and will still operate
      • Disadvantages
      • If the central node fails, the network fails
      • High congestion of data traffic at the central node
      ***Use arrow keys to control animations*** = data packet
    • Ring Topology = channel
      • Advantages
      • If a node on the network fails, the whole network will continue to function
      • Few data collisions
      • Disadvantages
      • Complicated to expand as the whole network requires to be shut down while a new node is added and tested
      • If the main channel fails, the network will fail
      ***Use arrow keys to control animations*** = data packet
    • Mesh Topology = channel
      • Advantages
      • If a channel fails, there are alternate routes the data packets can take
      • Node failures do not result in network failure
      • Disadvantages
      • High costs of cabling i.e. Fibre Optic cabling
      ***Use arrow keys to control animations*** = data packet
    • Bootstrap Loader
      • Used during the system startup
      • Small program stored in ROM
      • Goes ‘looking’ for an Operating System on the Hard Disk
      • When found, it loads the OS into Main Memory
    • Image File Types
      • GIF
      • Graphic Interchange Format
      • Lossless Compression
      • No image detail is lost during compression
      • Supports 256 colours
      • JPEG
      • Joint Photographic Experts Group
      • Lossy compression
      • Some detail is lost when image is compressed
      • Supports millions of colours
    • Utility Programs
      • Disc Repair
      • Defragmenter
      • File Compression
      • Anti-virus
      • Example of Defragmentation
      ***Use arrow keys to control animations*** Each square represents a sector of the Hard Disk
    • Viruses, Worms & Trojans
      • Virus
      • Worm
      • Trojan Horse
      • Types of Virus:
      • File Virus
      • Macro Virus
      • Boot-sector Virus
      • Virus actions:
      • Replication
      • Camouflage
      • Watching
      • Delivery
    • Detection Techniques
      • Search for signature
      • Checksum
      • Memory-resident Monitoring
      • Heuristic Detection
      See p.22/23 of BrightRed for more detailed explanations of these areas.
    • Solid State Storage Devices
      • USB Flash Drives
      • SSD Hard Disk
      • Memory Cards – xD, sD, etc
      • No moving parts
      • Storage from 128MB to 128GB
      • Cost: £’s to £100’s