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3DIC & TSV Interconnects 2012 Business Update
 

3DIC & TSV Interconnects 2012 Business Update

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    3DIC & TSV Interconnects 2012 Business Update 3DIC & TSV Interconnects 2012 Business Update Document Transcript

    • 3DIC & TSV Interconnects 2012 Business UpdateReport Details:Published:August 2012No. of Pages: 188Price: Single User License – US$53903D TSV Chips Will Represent 9% Of The Total Semiconductors Value In 2017, growing morethan 10 times faster than global semiconductor industry!Last year, the market value of all the devices using TSV packaged in 3D in the 3DIC or 3D-WLCSP platforms (CMOS image sensors, Ambient light sensors, Power Amplifiers, RF andinertial MEMS) was worth $2.7B. It will represent 9% of the total semiconductor value by 2017,hitting almost $40B. 3DIC which typically uses TSV ‘via middle’ for memory and logic IC stackingis expected to grow the fastest in wafers as well as in overall value, whereas 3D WLCSP willcontinue growing at a 18% CAGR.3D WLCSP: THE MOST MATURE 3D TSV PLATFORM3D WLCSP is the preferred solution today for the efficient assembly of small-size optoelectronicchip like CMOS image sensors. It is also the most mature 3D TSV platform at the moment as weestimate the market to be ~ $270M in 2011 for the “middle-end” processing factories serving thisspecific market.More than 90% of the revenues in this area come from low-end and low resolution CMOS imagesensors manufacturing (typically CIF, VGA, 1MPx and 2MPx sensors). Xintec in Taiwan is theleader for 3D WLCSP packaging today, followed by China WLCSP, Toshiba and JCAP.Most of the players provide 3D WLCSP services based on a 200mm wafer-level-packagingindustrial infrastructure. Important investments are still expected from major companies to move to300mm. Indeed, this move to 12” will be necessary to move to the high-end CMOS image sensorsmarket (> 8MPx resolution) where sensors are today on the transition to move from backsideillumination to real 3DIC packaging architecture that we will soon call « 3D BSI », wherephotodiodes will be vertically stacked directly onto the DSP / ROIC wafer and connected by themean of TSVs.FUTURE 3DIC MARKET DRIVEN BY STACKED MEMORIES & LOGIC SOC
    • 3DIC technology is foreseen today as a new paradigm for the future of the semiconductor industryas it will enable several more decades of chip evolution at ever lower cost, higher performanceand smaller size features. 3D stacked DRAM and 3D Logic SOC applications are expected to bethe biggest drivers for the volume adoption of 3DIC technology in the next 5 years to come,followed by CMOS image sensors, power devices and MEMS. The market is today driven by high-end applications using 2.5D partitioning interposers. Large die FPGAs and ASICs are on the wayto be commercialized for industrial applications but are also expected to grow in the near-future inthe gaming and smart TV markets.2013 will probably be the key turning point for the first true implementation of 3DIC technology insignificant volume, driven by the commercialization of the hybrid memory cubes of Micron,Samsung, SK-Hynix and IBM in server and HPC markets.However, we may need to wait until 2014-2015 before seeing any significant volume adoption ofthe ‘wide IO interface’ concept with TSV in a 28nm application processor chip for mobile / tabletapplications. Indeed, given the complexity of the supply chain settlement to successfully deliverreal products to the market in such high volumes and complex technology node, it is expected thatsome level of industry consolidation is needed to gather the front-end, middle-end to back-endassembly & test operations under the umbrella of one unique, single player entity. Wafer foundrygiants Samsung and TSMC are clearly catching-up with this vertical integration trend to meet withthe demand from leading fabless companies such as Qualcomm, Broadcom, Marvell, nVidia, butalso with fab-light IC companies TI, STMicro and NEC / Renesas.A TRUE BATTLE IS HAPPENING IN THE MIDDLE-END AREA !Although the middle-end processing space such as bumping services is today almost a “zeromargin” business, it is becoming a strategic area to step in, especially when moving to complexchip packaging applications such as 3DIC modules. Recent interest of both wafer foundries andOSAT to invest into this space is quite clear: getting closer to the ‘virtual IDM’ business model. Ifwafer foundries will always make the biggest part of their profits in the front-end wafer processingarea, manufacturing of 3DIC modules will need a much stronger integration with middle-end toback-end assembly and test operations, either by expansion or by collaboration throughpartnership with key packaging subcontractors.The outlook is looking bright for the future ‘virtual IDM’ models that will expand into the 3DIC chipbusiness: we estimate that the global 3D TSV semiconductors packaging, assembly and testmarket will reach the $8B business value by 2017. About $3.8B of this business will be related tothe middle-end wafer processing activity such as TSV etching filling, wiring, bumping, wafer testingand wafer-level assembly. Meanwhile, the back-end operations related to the assembly and test ofsuch complex 3DIC modules will reach an impressive market value of $4.6B, representing a clearopportunity for sustainable growth in this “2.0” advanced packaging industry.KEY FEATURES OF THE REPORT
    • The main objectives of this new report are to update the business status of 3DIC & TSVtechnology in 2011, to define market forecast for the next 5 years to come and to provide a deeperunderstanding of the supply-chain challenges and moves that are currently happening in thisfascinating “middle-end” industry space. The report provides:•A full analysis of 3D TSV market through 2010 – 2017 forecast given in wafers, units and revenues•2011 installed capacities (bottom-up), cross checked with top down approach methodology•Supply chain analysis with key player investments and alliances in this emerging spaceA unique ‘top-down’ approach has been developed, screening more than 80 electronic ICs (fromGPUs, FPGAs, sensors, RF chips, power devices, etc…) used in more than 90 different end-products (smartphones, smart TV, game stations, servers, pace-makers, data centers, electricvehicles etc.). The top-down analysis derives the unit and wafer forecasts from an analysis of eachopportunity to apply 3D integration technologies application by application, taking into account thepenetration rate of each packaging technology for each product type, as well as their related yieldsand die size evolution.COMPANIES CITED IN THIS REPORTAltera, AMD, Amkor, Apple, ASE, ASET, Avago technologies, Broadcom, Dalsa / Teledyne,Dongbu Hitek, ITRI, eSilicon, Fraunhofer-IZM, Freescale, Fujitsu, Global Foundries, G-MEMS,Hua-Hong NEC, SK-Hynix, Ibiden, IBM, IMEC, IMT, Infineon, Intel, ITRI, JCAP, Leti, LSICorporation, Marvell, Micron, Murata, Nanya, Nemotek, NEC / Renesas, Nokia, Numonyx, nVidia,NXP, Oki Electric, Panasonic, Qualcomm, Samsung, Silex Microsystems, Sematech, ShinkoElectric, Sony, SPIL, StatsChipPAC, STEricsson, STMicroelectronics, SMIC, Tessera, TexasInstruments, TSMC, Tezzaron, Toshiba, TSMC, UMC, UTAC, Xintec, Xilinx, Ziptronix, ZyCubeand more…Get your copy of this report @http://www.reportsnreports.com/reports/195558-3dic-tsv-interconnects-2012-business-update.htmlMajor points covered in Table of Contents of this report includeScope of the Report & Definitions p5 Objectives of the report What has changed? Scope of the reportExecutive Summary p11Recent key press headlines p253DIC & TSV Market Forecasts p35 2011 Capacities and Market Status 2010-2017 Market Forecasts
    • 3DIC platform 2.5D interposer platform 3D-WLCSP platformInfrastructure & Supply Chain for 3DIC p85 Active Players & Geographic locations Respective market shares of maincontract 3D TSV players Supply chain perspective Middle-end infrastructure evolution3DIC Market Focus p100 Wireless market Automotive market Medical market Server / HPC market3DIC Application Focus p115 CMOS image sensors MEMS & sensor applications Power, Analog & RF applications Stacked memories (DRAM, Flash) HB-LED module Logic + memory SiP applications 2.5D SOC partitioning applications Logic 3D-SOC/SiP applications3DIC technological challenges p145TSV patent Analysis p168Conclusion & Perspectives p180Appendix p188Contact: sales@reportsandreports.com for more information.