Micro controller-8051

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Tutorial of 8051

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  • Program is to read data from P0 and then send data to P1
  • Micro controller-8051

    1. 1. Microcontroller 8051
    2. 2. CONTENTS: <ul><li>Introduction </li></ul><ul><li>Block Diagram and Pin Description of the 8051 </li></ul><ul><li>Registers </li></ul><ul><li>Memory mapping in 8051 </li></ul><ul><li>Stack in the 8051 </li></ul><ul><li>I/O Port Programming </li></ul><ul><li>Timer </li></ul>
    3. 3. <ul><li>meeting the computing needs of the task efficiently and cost effectively </li></ul><ul><ul><li>speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumption </li></ul></ul><ul><ul><li>easy to upgrade </li></ul></ul><ul><ul><li>cost per unit </li></ul></ul><ul><li>availability of software development tools </li></ul><ul><ul><li>assemblers, debuggers, C compilers, emulator, simulator, technical support </li></ul></ul><ul><li>wide availability and reliable sources of the microcontrollers . </li></ul>Introduction : Three criteria in Choosing a Microcontroller:
    4. 4. 8 bit controllers – more requirements
    5. 5. Embedded System :
    6. 6. Development process Fall 2004 Embedded Systems Planning of tasks & interactions edit taskcode1.A51 taskcode2.c Assembler C-compiler misc.LIB Linker/Locator Burn in EPROM Download to board Revise ! Debugging ???
    7. 7. 8051 Microcontroller Kit Layout
    8. 8. General Purpose Microprocessor v/s Microcontroller
    9. 9. Block Diagram : 8051
    10. 10. Block Diagram CPU On-chip RAM On-chip ROM for program code 4 I/O Ports Timer 0 Serial Port OSC Interrupt Control External interrupts Timer 1 Timer/Counter Bus Control TxD RxD P0 P1 P2 P3 Address/Data Counter Inputs PC Interface Lab. Stepper motor etc. Lab Delay Generation Labs
    11. 11. ROMLike Brain OscillatorLike Heart Data flow Like BloodFlow Ports like Hands/Legs Internal Data Bus Prepares the sequence of operations
    12. 12. 8051 Block Diagram
    13. 13.
    14. 14.
    15. 15. ROMLike Brain OscillatorLike Heart Data flow Like BloodFlow Ports like Hands/Legs Internal Data Bus Prepares the sequence of operations
    16. 16. Signal Pins Figure 8051 pinouts & Functions
    17. 17. 8051 Block Diagram
    18. 18. Fetch Cycle
    19. 19. 8051 Family State Sequence
    20. 20. 8051 Architecture: Salient features <ul><li>8 bit CPU with registers A and B </li></ul><ul><li>16 bit Program Counter and data pointer DPTR </li></ul><ul><li>8 bit Program Status Word </li></ul><ul><li>8 bit Stack Pointer </li></ul><ul><li>Internal RAM 128 bytes </li></ul><ul><li>4 Registers banks, each containing 8 Registers </li></ul><ul><li>16 bytes, may be addressed at the bit level </li></ul><ul><li>8 bytes of General Purpose memory </li></ul><ul><li>Internal ROM 4K </li></ul><ul><li>32 I/O pins as 4 eight bit ports: P0-P3 </li></ul><ul><li>2 sixteen bit timer/counters: T0 and T1 </li></ul><ul><li>Full duplex serial data receiver/transmitter: SBUF </li></ul><ul><li>Control registers: TCON, TMOD, SCON, PCON, IP AND IE </li></ul><ul><li>2 external and 3 internal interrupt sources </li></ul><ul><li>Oscillator and clock circuits. </li></ul>
    21. 21. Pin Description of the 8051 
    22. 22. 8051 Hardware Connections : Crystal Connection to 8051 <ul><li>Using a quartz crystal oscillator ( Frequency 11.0592 MHz) </li></ul><ul><li>We can observe the frequency on the XTAL2 pin. </li></ul>Pin 18 Pin 20 Pin 19 C2 30pF C1 30pF XTAL2 XTAL1 GND
    23. 23. Pins of 8051 <ul><li>Vcc ( pin 40 ): </li></ul><ul><ul><li>Vcc provides supply voltage to the chip. </li></ul></ul><ul><ul><li>The voltage source is +5V. </li></ul></ul><ul><li>GND ( pin 20 ): ground </li></ul><ul><li>XTAL1 and XTAL2 ( pins 19,18 ) </li></ul><ul><li>RST ( pin 9 ): reset </li></ul><ul><ul><li>It is an input pin and is active high ( normally low ) . </li></ul></ul><ul><ul><ul><li>The high pulse must be high at least 2 machine cycles. </li></ul></ul></ul><ul><ul><li>It is a power-on reset. </li></ul></ul><ul><ul><ul><li>Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. </li></ul></ul></ul>
    24. 24. Pins of 8051 <ul><li>/ EA ( pin 31 ): external access </li></ul><ul><ul><li>There is no on-chip ROM in 8031 and 8032 . </li></ul></ul><ul><ul><li>The /EA pin is connected to GND to indicate the code is stored externally. </li></ul></ul><ul><ul><li>/PSEN & ALE are used for external ROM. </li></ul></ul><ul><ul><li>For 8051, /EA pin is connected to Vcc. </li></ul></ul><ul><ul><li>“ /” means active low. </li></ul></ul><ul><li>/PSEN ( pin 29 ): program store enable </li></ul><ul><ul><li>This is an output pin and is connected to the OE pin of the ROM. </li></ul></ul>
    25. 25. Pins of 8051 <ul><li>ALE ( pin 30 ): address latch enable </li></ul><ul><ul><li>It is an output pin and is active high. </li></ul></ul><ul><ul><li>8051 port 0 provides both address and data. </li></ul></ul><ul><ul><li>The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. </li></ul></ul><ul><li>I/O port pins </li></ul><ul><ul><li>The four ports P0, P1, P2, and P3. </li></ul></ul><ul><ul><li>Each port uses 8 pins. </li></ul></ul><ul><ul><li>All I/O pins are bi-directional . </li></ul></ul>
    26. 26. Pins of I/O Port <ul><li>The 8051 has four I/O ports </li></ul><ul><ul><li>Port 0 ( pins 32-39 ): P0 ( P0.0 ~ P0.7 ) </li></ul></ul><ul><ul><li>Port 1 ( pins 1-8 ) : P1 ( P1.0 ~ P1.7 ) </li></ul></ul><ul><ul><li>Port 2 ( pins 21-28 ): P2 ( P2.0 ~ P2.7 ) </li></ul></ul><ul><ul><li>Port 3 ( pins 10-17 ): P3 ( P3.0 ~ P3.7 ) </li></ul></ul><ul><ul><li>Each port has 8 pins. </li></ul></ul><ul><ul><ul><li>Named P0.X ( X=0,1,...,7 ) , P1.X, P2.X, P3.X </li></ul></ul></ul><ul><ul><ul><li>Ex : P0.0 is the bit 0 ( LSB ) of P0 </li></ul></ul></ul><ul><ul><ul><li>Ex : P0.7 is the bit 7 ( MSB ) of P0 </li></ul></ul></ul><ul><ul><ul><li>These 8 bits form a byte. </li></ul></ul></ul><ul><li>Each port can be used as input or output (bi-direction). </li></ul>
    27. 27. Power-On RESET Circuit 30 pF 30 pF 8.2 K 10 uF + Vcc 11.0592 MHz EA/VPP X1 X2 RST 31 19 18 9
    28. 28. Hardware Structure of I/O Pin <ul><li>Each pin of I/O ports </li></ul><ul><ul><li>Internal CPU bus : communicate with CPU </li></ul></ul><ul><ul><li>A D latch store the value of this pin </li></ul></ul><ul><ul><ul><li>D latch is controlled by “Write to latch” </li></ul></ul></ul><ul><ul><ul><ul><li>Write to latch = 1 : write data into the D latch </li></ul></ul></ul></ul><ul><ul><li>2 Tri-state buffer : </li></ul></ul><ul><ul><ul><li>TB1: controlled by “Read pin” </li></ul></ul></ul><ul><ul><ul><ul><li>Read pin = 1 : really read the data present at the pin </li></ul></ul></ul></ul><ul><ul><ul><li>TB2: controlled by “Read latch” </li></ul></ul></ul><ul><ul><ul><ul><li>Read latch = 1 : read value from internal latch </li></ul></ul></ul></ul><ul><ul><li>A transistor M1 gate </li></ul></ul><ul><ul><ul><li>Gate=0: open </li></ul></ul></ul><ul><ul><ul><li>Gate=1: close </li></ul></ul></ul>
    29. 29. P89V51 RD2 : Electrical Specs.( Threshold Voltages)
    30. 30.
    31. 31. P89V51RD2 : Timing Specs.
    32. 32. A Pin of Port 1 8051 IC  P0.x D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X TB1 TB2
    33. 33. Writing “1” to Output Pin P1.X 8051 IC 2. output pin is Vcc 1. write a 1 to the pin 1 0 output 1 TB1 TB2 D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X
    34. 34. Writing “0” to Output Pin P1.X 8051 IC 2. output pin is ground 1. write a 0 to the pin 0 1 output 0 TB1 TB2 D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X
    35. 35. Reading “High” at Input Pin 8051 IC 2. MOV A,P1 external pin=High <ul><li>write a 1 to the pin MOV P1,#0FFH </li></ul>1 0 3. Read pin=1 Read latch=0 Write to latch=1 1 TB1 TB2 D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X
    36. 36. Reading “Low” at Input Pin 8051 IC 2. MOV A,P1 external pin=Low <ul><li>write a 1 to the pin </li></ul><ul><li>MOV P1,#0FFH </li></ul>1 0 3 . Read pin=1 Read latch=0 Write to latch=1 0 TB1 TB2 D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X
    37. 37. You can not Get Logic 1 with Heavy Load and Weak Pull-up
    38. 38. Is it too much? - it’s the beginning - LOAD LOADING EFFECT ( SOURCE IS IN PROBLEM
    39. 39. A Pin of Port 0 8051 IC  P1.x D Q Clk Q Read latch Read pin Write to latch Internal CPU bus M1 P0.X pin P1.X TB1 TB2
    40. 40. Port 0 with Pull-Up Resistors P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 DS5000 8751 8951 Vcc 10 K Port 0
    41. 41. Address Lines Bi-Directional Data Lines
    42. 42. Instruction: MOV A,# 3CH 74 3C Data 5Ch is in Flash Memory
    43. 43. Instruction: MOV A,3CH Data is 7F hex At RAM Address 3C hex - - ACC data will be 7F h E5 3C
    44. 44. 85 80 A0 Instruction: MOV p2,p0 Mov address, address 85
    45. 45. Port 3 Alternate Functions 
    46. 46. 8051 PROG. MEMORY
    47. 47. 8051 DATA MEMORY
    48. 48. Registers of 8051
    49. 49. <ul><li>RAM memory space allocation in the 8051 </li></ul>7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 (Stack) Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM
    50. 50. Address Modes <ul><li>Bit-Oriented Data Transfer – transfers between individual bits. </li></ul><ul><li>SFRs with addresses ending in 0 or 8 are bit-addressable. (80, 88, 90, 98, etc) </li></ul><ul><li>Carry flag (C) (bit 7 in the PSW) is used as a single-bit accumulator </li></ul><ul><li>RAM bits in addresses 20-2F are bit addressable </li></ul><ul><li>Examples of bit transfers of special function register bits: </li></ul><ul><li>mov C, P0.0 ; C  bit 0 of P0 </li></ul>Prof. Cherrice Traver EE/CS-152: Microprocessors and Microcontrollers
    51. 51. Bit addressable Area of RAM <ul><li>mov R5,0fah </li></ul><ul><li>ANL A,#08H </li></ul><ul><li>mov c,23h.2 ; Data from RAM location ; 23hex bit .2 is transferred to carry </li></ul><ul><li>mov 35.7,c ; Data from Carry Flag bit is transferred ; to RAM location 35 decimal bit .7 i.e. ; 23H </li></ul><ul><li>Mov p0.1 , c ; Carry bit is transferred to Port 0 bit .1 </li></ul><ul><li>End </li></ul><ul><li>( NOTE : RAM Loactions 20 hex to 2f hex are Bit Addressable Area ). </li></ul>
    52. 52. Bit Addressable Memory Prof. Cherrice Traver EE/CS-152: Microprocessors and Microcontrollers 20h – 2Fh (16 locations X 8-bits = 128 bits) 27 26 25 24 23 22 21 20 2F 2E 2D 2C 2B 2A 29 28 Bit addressing: mov C, 1Ah or mov C, 23h.2 7F 78 1A 10 0F 08 07 06 05 04 03 02 01 00
    53. 53. Stack in the 8051 <ul><li>The register used to access the stack is called SP (stack pointer) register. </li></ul><ul><li>The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07. </li></ul>7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 (Stack) Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM
    54. 54. Stacks Prof. Cherrice Traver EE/CS-152: Microprocessors and Microcontrollers push pop stack stack pointer Go do the stack exercise…..
    55. 55. Timers <ul><li>There are TWO general purpose 16 bit timers </li></ul><ul><li>TIMER MODES: </li></ul><ul><li>MODE 0 </li></ul><ul><li>MODE 1 </li></ul><ul><li>MODE 2 </li></ul><ul><li>MODE 3 </li></ul>
    56. 56. TIMER MODE 0 <ul><li>Setting timer X mode bits to 00 in the TMOD registers results in using THX register as an 8 bit counter and TLX as a 5 bit counter; pulse input is divided by 32d in TL so that TH counts the original oscillator frequency by a total 384d. </li></ul>
    57. 57. TIMER MODE 1 <ul><li>SIMILAR TO MODE 0 EXCEPT tlx IS CONFIGURED AS A FULL 8 BIT COUNTER </li></ul>
    58. 58. TIMER MODE 2 <ul><li>The TLX is used as an 8 bit counter and THX is used to hold a value that is loaded into TLX every time TLX overflows from FFH to 00H. </li></ul>
    59. 59. TIMER MODE 3 <ul><li>Timer 0 in mode 3 becomes two completely separate 8 bit counters. Time 1 may work in Mode 0, 1 and 2. </li></ul>
    60. 60.
    61. 61. TMOD Register : <ul><li>Gate : When set, timer only runs while INT(0,1) is high. </li></ul><ul><li>C/T : Counter/Timer select bit. </li></ul><ul><li>M1 : Mode bit 1 . </li></ul><ul><li>M0 : Mode bit 0. </li></ul>
    62. 62. The Timer Control (TCON), Special Function Register: <ul><li>TF1: Timer 1 overflow flag. Set when timer rolls from all 1 s to 0 </li></ul><ul><li>TR1: Timer 1 run control bit. Set to 1 by program to enable count. </li></ul><ul><li>TF0: Timer 0 overflag. Set when timer rolls from all 1 s to 0 </li></ul><ul><li>TR0: Timer 0 run control bit. Set to 1 by program to enable count. </li></ul>
    63. 63. <ul><li>IE1: External interrupt 1 edge flag. Set to 1 when H to L edge signal is received on port 3 pin 3.3 ( INT1) </li></ul><ul><li>IT1: External interrupt 1 signal type control bit. Set to 1 by program to enable external interrupt 1 to be triggered by a falling edge signal. Set to 0 by by program to enable a low level signal on external interrupt 1 to generate and interrupt. </li></ul><ul><li>IE0: External interrupt 0 edge flag. External interrupt 1 edge flag. Set to 1 when H to L edge signal is received on port 3 pin 3.2(INT0) </li></ul><ul><li>IT0: External interrupt 0 signal type control bit </li></ul>TCON
    64. 64. PCB: 89c51 Microcontroller Ports Port 3 Port 1 Port 2 Port 0 ATMEL 89c51 Microcontroller
    65. 65. PCB: 89c51 Microcontroller Card Resistor Array (10K) Micro- controller Crystal 11.0592 MHz Burge Strip Header Capacitors 30 pF Port 3 Port 1 Port 2 Port 0 ATMEL 89c51 Microcontroller
    66. 66. PCB: 89c51 Microcontroller Card Resistor Array (10K) Micro- controller Crystal 11.0592 MHz Burge Strip Header Capacitors 30 pF Port 3 Port 1 Port 2 Port 0 ATMEL 89c51 Microcontroller
    67. 67. PCB: 89c51 Microcontroller Card Pin 1 of 89c51 Pin 20 Of 89c51 Pin 21 Of 89c51 Pin 40 of 89c51 ATMEL 89c51 Microcontroller
    68. 68. Where is Clock Circuitry ? Clock Circuitry section ATMEL 89c51 Microcontroller
    69. 69. Clock circuitry components Crystal 11.0592 MHz Two Capacitors 33 pF ATMEL 89c51 Microcontroller
    70. 70. LED Array Card : To Port 0 LED Array card to PORT 0 ATMEL 89c51 Microcontroller
    71. 71. Interfacing DIP Switch & LED Array PORT 0 DIP Switch PORT 1 LED Array ATMEL Microcontroller 89c51
    72. 72. Stepper Motor Interfacing Stepper Motor Interfacing P1.0 to P1.3 PORT 1 thru’ ULN 2003 Driver Stepper Motor ATMEL 89c51 Microcontroller
    73. 73. P.C. Serial(RS-232) Interfacing with uC 89c51 Pin 10,11 to MAX232 RS232 port of P.C. ATMEL 89c51 Microcontroller
    74. 74. Embedded system-Spiral Model
    75. 75.
    76. 76. What is Embedded System?
    77. 77. <ul><li>Microcontroller W/S </li></ul><ul><li>LAB. EXPERIMENTS </li></ul>
    78. 78. OVERVIEW DATA TRANSFERS Sunday, January 8, 2012 Mahdi Hassanpour Instruction SOURCE OF DATA DESTINATION OF DATA ADDRESSING MODE MOV A,#56H FLASH MEMORY ACCUMULATOR IMMEDIATE MOV A,56H RAM LOCATION 56H ACCUMULATOR DIRECT MOV A,R1 RAM REGISTER R1 ACCUMULATOR REGISTER MOV A,@ 56H RAM LOCATION WHOSE ADDRESS IS STORED AT LOCATION 56H ACCUMULATOR REGISTER INDIRECT
    79. 79. Infinite Loops <ul><li>Start: mov C, p3.7 </li></ul><ul><li> mov p1.6, C </li></ul><ul><li> sjmp Start </li></ul>Prof. Cherrice Traver EE/CS-152: Microprocessors and Microcontrollers Microcontroller application programs are almost always infinite loops!
    80. 80. Program for Blinking LEDs on PORT 0 <ul><li>Include 89c51.mc </li></ul><ul><li>Loop: </li></ul><ul><li>Mov a,#55h </li></ul><ul><li>Mov p0,a </li></ul><ul><li>Jmp loop </li></ul>
    81. 81. LED In Sinking & Sourcing Mode
    82. 82. Lab. Experiment: Alternately Blink LEDs at PORT 1 considering Delay <ul><li>MOV A,#55H </li></ul><ul><li>MOV P1,A </li></ul><ul><li>LOOP: MOV R5,#0FFH </li></ul><ul><li>REPEAT3: </li></ul><ul><li>MOV R3,#0FFH </li></ul><ul><li>REPEAT2: Delay Loop </li></ul><ul><li>DJNZ R3,REPEAT2 </li></ul><ul><li>DJNZ R5,REPEAT3 </li></ul><ul><li>CPL A </li></ul><ul><li>MOV P1,A </li></ul><ul><li>JMP LOOP </li></ul>
    83. 83. Lab. Experiment: Connect LED Array to PORT 1. Scroll LEDs one by one , in sinking mode <ul><li>MOV A,#80H </li></ul><ul><li>MOV P1,A </li></ul><ul><li>LOOP: MOV R5,#0FFH </li></ul><ul><li>REPEAT3: </li></ul><ul><li>MOV R3,#0FFH </li></ul><ul><li>REPEAT2: Delay Loop </li></ul><ul><li>DJNZ R3,REPEAT2 </li></ul><ul><li>DJNZ R5,REPEAT3 </li></ul><ul><li>RR A </li></ul><ul><li>MOV P1,A </li></ul><ul><li>JMP LOOP </li></ul>
    84. 84. Experiment 2 : DIP Switch & LED array Interfacing <ul><li>Assumption : DIP Switch interfaced to PORT 0 & LED Array interfaced to PORT 1. </li></ul><ul><li>MOV A,#0FFH </li></ul><ul><li>AGAIN: </li></ul><ul><li>MOV A,P0 </li></ul><ul><li>MOV P1,A </li></ul><ul><li>JMP AGAIN </li></ul>
    85. 85. Lab. Experiment : Generation of Square Wave <ul><li>LOOP: </li></ul><ul><li>SETB P1.0 </li></ul><ul><li>MOV R5,#3FH </li></ul><ul><li>CALL DELAY </li></ul><ul><li>CLR P1.0 </li></ul><ul><li>MOV R5,#0FFH </li></ul><ul><li>CALL DELAY </li></ul><ul><li>JMP LOOP </li></ul>DELAY: NOP DJNZ R5,AGAIN RET
    86. 86. ULN 2003 DRIVER : For Driving Stepper Motor
    87. 87. Lab. Experiment : Stepper Motor Controller <ul><li>C1 EQU P1.0 </li></ul><ul><li>C2 EQU P1.1 </li></ul><ul><li>C3 EQU P1.2 </li></ul><ul><li>C4 EQU P1.3 </li></ul><ul><li>DATA EQU P1 </li></ul><ul><li>MOV DATA , #00H </li></ul><ul><li>MOV A,#88H </li></ul><ul><li>ENDLESS: </li></ul><ul><li>RR A </li></ul><ul><li>MOV DATA,A </li></ul><ul><li>CALL DELAY </li></ul><ul><li>JMP ENDLESS </li></ul>DELAY: MOV R7,#0FFH AGAIN: NOP NOP DJNZ R7,AGAIN RET
    88. 88.
    89. 89. A simple project using AT89C51
    90. 90.
    91. 91. Bit addressable Area of RAM <ul><li>mov R5,0fah </li></ul><ul><li>ANL A,#08H </li></ul><ul><li>mov c,23h.2 ; Data from RAM location ; 23hex bit .2 is transferred to carry </li></ul><ul><li>mov 35.7,c ; Data from Carry Flag bit is transferred ; to RAM location 35 decimal bit .7 </li></ul><ul><li>Mov p0.1 , c ; Carry bit is transferred to Port 0 bit .1 </li></ul><ul><li>End </li></ul><ul><li>( NOTE : RAM Loactions 20 hex to 2f hex are Bit Addressable Area ). </li></ul>
    92. 92. Microcontrollers
    93. 93. 8051 Pin-out <ul><li>RST – Reset </li></ul><ul><li>HIGH for 2 clock cycles </li></ul><ul><li>Resets registers and </li></ul><ul><li>program counter (to 0000h) </li></ul><ul><li>for an orderly startup. </li></ul>
    94. 94. Program Status Word (PSW)
    95. 96. Pulse width modulator <ul><li>Generates pulses with specific high/low times </li></ul><ul><li>Duty cycle: % time high </li></ul><ul><ul><li>Square wave: 50% duty cycle </li></ul></ul><ul><li>Common use: control average voltage to electric device </li></ul><ul><ul><li>Simpler than DC-DC converter or digital-analog converter </li></ul></ul><ul><ul><li>DC motor speed, dimmer lights </li></ul></ul><ul><li>Another use: encode commands, receiver uses timer to decode </li></ul>clk pwm_o 25% duty cycle – average pwm_o is 1.25V clk pwm_o 50% duty cycle – average pwm_o is 2.5V.
    96. 97. Stepper motor controller <ul><li>Stepper motor: rotates fixed number of degrees when given a “step” signal </li></ul><ul><ul><li>In contrast, DC motor just rotates when power applied, coasts to stop </li></ul></ul><ul><li>Rotation achieved by applying specific voltage sequence to coils </li></ul><ul><li>Controller greatly simplifies this </li></ul>Fall 2004 Red A White A’ Yellow B Black B’ MC3479P 1 5 4 3 2 7 8 6 16 15 14 13 12 11 10 9 Vd A’ A GND Bias’/Set Clk O|C Vm B B’ GND Phase A’ CW’/CCW Full’/Half Step
    97. 98. Stepper motor with controller (driver) Fall 2004 void main(void){ */turn the motor forward */ cw=0; /* set direction */ clk=0; /* pulse clock */ delay(); clk=1; /*turn the motor backwards */ cw=1; /* set direction */ clk=0; /* pulse clock */ delay(); clk=1; } /* main.c */ sbit clk=P1^1; sbit cw=P1^0; void delay(void){ int i, j; for (i=0; i<1000; i++) for ( j=0; j<50; j++) i = i + 0; } 2 A’ 3 A 10 7 B 15 B’ 14 MC3479P Stepper Motor Driver 8051 P1.0 P1.1 Stepper Motor CLK CW’/CCW The output pins on the stepper motor driver do not provide enough current to drive the stepper motor. To amplify the current, a buffer is needed. One possible implementation of the buffers is pictured to the left. Q1 is an MJE3055T NPN transistor and Q2 is an MJE2955T PNP transistor. A is connected to the 8051 microcontroller and B is connected to the stepper motor.
    98. 99. Stepper motor without controller (driver) Fall 2004 A possible way to implement the buffers is located below. The 8051 alone cannot drive the stepper motor, so several transistors were added to increase the current going to the stepper motor. Q1 are MJE3055T NPN transistors and Q3 is an MJE2955T PNP transistor. A is connected to the 8051 microcontroller and B is connected to the stepper motor. /*main.c*/ sbit notA=P2^0; sbit isA=P2^1; sbit notB=P2^2; sbit isB=P2^3; sbit dir=P2^4; void delay(){ int a, b; for(a=0; a<5000; a++) for(b=0; b<10000; b++) a=a+0; } void move(int dir, int steps) { int y, z; /* clockwise movement */ if(dir == 1){ for(y=0; y<=steps; y++){ for(z=0; z<=19; z+4){ isA=lookup[z]; isB=lookup[z+1]; notA=lookup[z+2]; notB=lookup[z+3]; delay(); } } } /* counter clockwise movement */ if(dir==0){ for(y=0; y<=step; y++){ for(z=19; z>=0; z - 4){ isA=lookup[z]; isB=lookup[z-1]; notA=lookup[z -2]; notB=lookup[z-3]; delay( ); } } } } void main( ){ int z; int lookup[20] = { 1, 1, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0 }; while(1){ /*move forward, 15 degrees (2 steps) */ move(1, 2); /* move backwards, 7.5 degrees (1step)*/ move(0, 1); } } Stepper Motor 8051 GND/ +V P2.4 P2.3 P2.2 P2.1 P2.0 Q2 +V 1K Q1 1K +V A B 330
    99. 100. <ul><li>4 register banks </li></ul><ul><li>General user RAM </li></ul><ul><li>Special Function Registers (SFR) </li></ul>Intel 8051 RAM
    100. 101. 8051 SFRs <ul><li>Blue: related to the I/O ports </li></ul><ul><li>Yellow: control the configuration of 8051 </li></ul><ul><li>Green: auxiliary SFRs </li></ul>
    101. 102.
    102. 103.
    103. 104. Block Diagram of 8051 Microcontroller
    104. 105. Schematic for Microcontroller Board
    105. 106.
    106. 107. 8051 Block Diagram
    107. 108. 8051 Family State Sequence
    108. 109. RAM
    109. 110.
    110. 111.
    111. 112. Using 7 Segment Display
    112. 113.
    113. 114.
    114. 115.
    115. 116. Bit addressable Area of RAM <ul><li>mov R5,0fah </li></ul><ul><li>ANL A,#08H </li></ul><ul><li>mov c,23h.2 ; Data from RAM location ; 23hex bit .2 is transferred to carry </li></ul><ul><li>mov 35.7,c ; Data from Carry Flag bit is transferred ; to RAM location 35 decimal bit .7 </li></ul><ul><li>Mov p0.1 , c ; Carry bit is transferred to Port 0 bit .1 </li></ul><ul><li>End </li></ul><ul><li>( NOTE : RAM Loactions 20 hex to 2f hex are Bit Addressable Area ). </li></ul>
    116. 117. Rotating Universal /DC Motor in Clockwise & Anticlockwise using Microcontroller by Sensing position Micro- Con- troller 89c51 T A N K 2 C.O. / DPDT Relay DC Motor REED Sensor
    117. 118. Assembly Code for Sensing Position <ul><li>MOV P1,#FFh ; port1 as a input port </li></ul><ul><li>MOV A,P1 </li></ul><ul><li>LOOP: </li></ul><ul><li>MOV R1,P1 </li></ul><ul><li>IF R1 = # FEh then ; 1111 1110 </li></ul><ul><li>SETB P2.0 </li></ul><ul><li>END IF </li></ul><ul><li>MOV R2,P1 </li></ul><ul><li>IF R2=#FDh then ; 1111 1101 </li></ul><ul><li>CLR P2.0 </li></ul><ul><li>END IF </li></ul><ul><li>JMP LOOP </li></ul>Micro- Controller 89c51 Pin 1 P1.0 Pin 2 P1.1 P 2.0 From sensor 1 st From sensor 2 nd

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