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1. International Journal of Advances in Engineering & Technology (IJAET) VOLUME-1 VOLUME- ISSUE-5 ISSUE- NOVEMBER- NOVEMBER-2011URL : http://www.ijaet.orgE-mail : email@example.com
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 Table of Content S. No. Article Title & Authors (Vol. 1, Issue. 5, Nov-2011) Page No’s 1. APPLICATION OF SMES UNIT TO IMPROVE THE VOLTAGE 1-13 PROFILE OF THE SYSTEM WITH DFIG DURING GRID DIP AND SWELL A. M. Shiddiq Yunus, A. Abu-Siada and M. A. S. Masoum 2. HYBRID MODEL FOR SECURING E-COMMERCE 14-20 TRANSACTION Abdul Monem S. Rahma, Rabah N. Farhan, Hussam J. Mohammad 3. DSSS DIGITAL TRANSCEIVER DESIGN FOR ULTRA 21-29 WIDEBAND Mohammad Shamim Imtiaz 4. INTRODUCTION TO METASEARCH ENGINES AND RESULT 30-40 MERGING STRATEGIES: A SURVEY Hossein Jadidoleslamy 5. STUDY OF HAND PREFERENCES ON SIGNATURE FOR RIGHT- 41-46 HANDED AND LEFT-HANDED PEOPLES Akram Gasmelseed and Nasrul Humaimi Mahmood , 6. DESIGN AND SIMULATION OF AN INTELLIGENT TRAFFIC 47-57 CONTROL SYSTEM Osigwe Uchenna Chinyere, Oladipo Onaolapo Francisca, Onibere Emmanuel Amano 7. DESIGN OPTIMIZATION AND SIMULATION OF THE 58-68 PHOTOVOLTAIC SYSTEMS ON BUILDINGS IN SOUTHEAST EUROPE Florin Agai, Nebi Caka, Vjollca Komoni 8. FAULT LOCATION AND DISTANCE ESTIMATION ON POWER 69-76 TRANSMISSION LINES USING DISCRETE WAVELET TRANSFORM Sunusi. Sani Adamu, Sada Iliya 9. AN Investigation OF THE PRODUCTION LINE FOR ENHANCED 77-88 PRODUCTION USING HEURISTIC METHOD M. A. Hannan, H.A. Munsur, M. Muhsin i Vol. 1, Issue 5, pp. i-iii
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 10. A NOVEL DESIGN FOR ADAPTIVE HARMONIC FILTER TO 89-95 IMPROVE THE PERFORMANCE OF OVER CURRENT RELAYS A. Abu-Siada 11. ANUPLACE: A SYNTHESIS AWARE VLSI PLACER TO 96-108 MINIMIZE TIMING CLOSURE Santeppa Kambham and Krishna Prasad K.S.R 12. FUNCTIONAL COVERAGE ANALYSIS OF OVM BASED 109-117 VERIFICATION OF H.264 CAVLD SLICE HEADER DECODER Akhilesh Kumar and Chandan Kumar 13. COMPARISON BETWEEN GRAPH BASED DOCUMENT 118-125 SUMMARIZATION METHOD AND CLUSTERING METHOD Prashant D.Joshi, S.G.Joshi, M.S.Bewoor, S.H.Patil 14. IMPROVED SEARCH ENGINE USING CLUSTER ONTOLOGY 126-132 Gauri Suresh Bhagat, Mrunal S. Bewoor, Suhas Patil 15. COMPARISON OF MAXIMUM POWER POINT TRACKING 133-148 ALGORITHMS FOR PHOTOVOLTAIC SYSTEM J. Surya Kumari, Ch. Sai Babu 16. POWER QUALITY DISTURBANCE ON PERFORMANCE OF 149-157 VECTOR CONTROLLED VARIABLE FREQUENCY INDUCTION MOTOR A. N. Malleswara Rao, K. Ramesh Reddy, B. V. Sanker Ram 17. INTELLIGENT INVERSE KINEMATIC CONTROL OF SCORBOT- 158-169 ER V PLUS ROBOT MANIPULATOR Himanshu Chaudhary and Rajendra Prasad 18. FAST AND EFFICIENT METHOD TO ASSESS AND ENHANCE 170-180 TOTAL TRANSFER CAPABILITY IN PRESENCE OF FACTS DEVICE K. Chandrasekar and N. V. Ramana 19. ISSUES IN CACHING TECHNIQUES TO IMPROVE SYSTEM 181-188 PERFORMANCE IN CHIP MULTIPROCESSORS H. R. Deshmukh, G. R. Bamnote 20. KANNADA TEXT EXTRACTION FROM IMAGES AND VIDEOS 189-196 FORVISION IMPAIRED PERSONS Keshava Prasanna, Ramakhanth Kumar P, Thungamani.M, Manohar Koli ii Vol. 1, Issue 5, pp. i-iii
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 21. COVERAGE ANALYSIS IN VERIFICATION OF TOTAL ZERO 197-203 DECODER OF H.264 CAVLD Akhilesh Kumar and Mahesh Kumar Jha 22. DESIGN AND CONTROL OF VOLTAGE REGULATORS FOR 204-217 WIND DRIVEN SELF EXCITED INDUCTION GENERATOR Swati Devabhaktuni and S. V. Jayaram Kumar 23. LITERATURE REVIEW OF FIBER REINFORCED POLYMER 218-226 COMPOSITES Shivakumar S, G. S. Guggari 24. IMPLEMENTATION RESULTS OF SEARCH PHOTO AND 227-235 TOPOGRAPHIC INFORMATION RETRIEVAL AT A LOCATION Sukhwant Kaur, Sandhya Pati, Trupti Lotlikar, Cheryl R, Jagdish T., Abhijeet D. 25. QUALITY ASSURANCE EVALUATION FOR PROGRAMS USING 236-247 MATHEMATICAL MODELS Murtadha M. Hamad and Shumos T. Hammadi 26. NEAR SET AN APPROACH AHEAD TO ROUGH SET: AN 248-253 OVERVIEW Kavita R Singh, Shivanshu Singh 27. MEASUREMENT OF CARBONYL EMISSIONS FROM EXHAUST 254-266 OF ENGINES FUELLED USING BIODIESEL-ETHANOL-DIESEL BLEND AND DEVELOPMENT OF A CATALYTIC CONVERTER FOR THEIR MITIGATION ALONG WITH CO, HC’S AND NOX. Abhishek B. Sahasrabudhe, Sahil S. Notani, Tejaswini M. Purohit, Tushar U. Patil and Satishchandra V. Joshi 28. IMPACT OF REFRIGERANT CHARGE OVER THE 267-277 PERFORMANCE CHARACTERISTICS OF A SIMPLE VAPOUR COMPRESSION REFRIGERATION SYSTEM J. K. Dabas, A. K. Dodeja, Sudhir Kumar, K. S. Kasana 29. AGC CONTROLLERS TO OPTIMIZE LFC REGULATION IN 278-289 DEREGULATED POWER SYSTEM S. Farook, P. Sangameswara Raju 30. AUTOMATIC DIFFERENTIATION BETWEEN RBC AND 290-297 MALARIAL PARASITES BASED ON MORPHOLOGY WITH FIRST ORDER FEATURES USING IMAGE PROCESSING Jigyasha Soni, Nipun Mishra, Chandrashekhar Kamargaonkar iii Vol. 1, Issue 5, pp. i-iii
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 31. REAL ESTATE APPLICATION USING SPATIAL DATABASE 298-309 M. Kiruthika, Smita Dange, Swati Kinhekar, Girish B, Trupti G, Sushant R. 32. DESIGN AND VERIFICATION ANALYSIS OF APB3 PROTOCOL 310-317 WITH COVERAGE Akhilesh Kumar and Richa Sinha 33. IMPLEMENTATION OF GPS ENABLED CAR POOLING SYSTEM 318-328 Smita Rukhande, Prachi G, Archana S, Dipa D 34. APPLICATION OF MATHEMATICAL MORPHOLOGY FOR THE 329-336 ENHANCEMENT OF MICROARRAY IMAGES Nagaraja J, Manjunath S.S, Lalitha Rangarajan, Harish Kumar. N 35. SECURING DATA IN AD HOC NETWORKS USING MULTIPATH 337-341 ROUTING R. Vidhya and G. P. Ramesh Kumar 36. COMPARATIVE STUDY OF DIFFERENT SENSE AMPLIFIERS IN 342-350 SUBMICRON CMOS TECHNOLOGY Sampath Kumar, Sanjay Kr Singh, Arti Noor, D. S. Chauhan & B.K. Kaushik 37. CHARACTER RECOGNITION AND TRANSMISSION OF 351-360 CHARACTERS USING NETWORK SECURITY Subhash Tatale and Akhil Khare 38. IMPACT ASSESSMENT OF SHG LOAN PATTERN USING 361-374 CLUSTERING TECHNIQUE Sajeev B. U, K. Thankavel 39. CASCADED HYBRID FIVE-LEVEL INVERTER WITH DUAL 375-386 CARRIER PWM CONTROL SCHEME FOR PV SYSTEM R. Seyezhai 40. A REVIEW ON: DYNAMIC LINK BASED RANKING 387-393 D. Nagamalleswary , A. Ramana Lakshmi , 41. MODELING AND SIMULATION OF A SINGLE PHASE 394-400 PHOTOVOLTAIC INVERTER AND INVESTIGATION OF SWITCHING STRATEGIES FOR HARMONIC MINIMIZATION B. Nagaraju, K. Prakash iv Vol. 1, Issue 5, pp. i-iii
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 42. ENHANCEMENT OF POWER TRANSMISSION CAPABILITY OF 401-416 HVDC SYSTEM USING FACTS CONTROLLERS M. Ramesh, A. Jaya Laxmi 43. EIGEN VALUES OF SOME CLASS OF STRUCTURAL 417-421 MATRICES THAT SHIFT ALONG THE GERSCHGORIN CIRCLE ON THE REAL AXIS T. D. Roopamala and S. K. Katti 44. TYRE PRESSURE MONITORING AND COMMUNICATING 422-428 ANTENNA IN THE VEHICULAR SYSTEMS K. Balaji, B. T. P. Madhav, P. Syam Sundar, P. Rakesh Kumar, N. Nikhita, A. Prudhvi Raj, M. Mahidhar 45. DEEP SUB-MICRON SRAM DESIGN FOR DRV ANALYSIS AND 429-436 LOW LEAKAGE Sanjay Kr Singh, Sampath Kumar, Arti Noor, D. S. Chauhan & B.K.Kaushik 46. SAG/SWELL MIGRATION USING MULTI CONVERTER 437-440 UNIFIED POWER QUALITY CONDITIONER Sai Ram. I, Amarnadh.J, K. K. Vasishta Kumar 47. A NOVEL CLUSTERING APPROACH FOR EXTENDING THE 441-446 LIFETIME FOR WIRELESS SENSOR NETWORKS Puneet Azad, Brahmjit Singh, Vidushi Sharma 48. SOLAR HEATING IN FOOD PROCESSING 447-453 N. V. Vader and M. M. Dixit 49. EXPERIMENTAL STUDY ON THE EFFECT OF METHANOL - 454-461 GASOLINE, ETHANOL-GASOLINE AND N-BUTANOL- GASOLINE BLENDS ON THE PERFORMANCE OF 2-STROKE PETROL ENGINE Viral K Pandya, Shailesh N Chaudhary, Bakul T Patel, Parth D Patel 50. IMPLEMENTATION OF MOBILE BROADCASTING USING 462-472 BLUETOOTH/3G Dipa Dixit, Dimple Bajaj and Swati Patil 51. IMPROVED DIRECT TORQUE CONTROL OF INDUCTION 473-479 MOTOR USING FUZZY LOGIC BASED DUTY RATIO CONTROLLER Sudheer H., Kodad S.F. and Sarvesh B. 52. INFLUENCE OF ALUMINUM AND TITANIUM ADDITION ON 480-491 v Vol. 1, Issue 5, pp. i-iii
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 MECHANICAL PROPERTIES OF AISI 430 FERRITIC STAINLESS STEEL GTA WELDS G. Mallaiah, A. Kumar and P. Ravinder Reddy 53. ANOMALY DETECTION ON USER BROWSING BEHAVIORS 492-499 FOR PREVENTION APP_DDOS Vidya Jadhav and Prakash Devale 54. DESIGN OF LOW POWER LOW NOISE BIQUAD GIC NOTCH 500-506 FILTER IN 0.18 µM CMOS TECHNOLOGY Akhilesh kumar, Bhanu Pratap Singh Dohare and Jyoti Athiya Members of IJAET Fraternity A-FBest Reviewers for this Issue are: 1. Dr. Sukumar Senthilkumar 2. Dr. Tang Aihong 3. Dr. Rajeev Singh 4. Dr. Om Prakash Singh 5. Dr. V. Sundarapandian 6. Dr. Ahmad Faridz Abdul Ghafar 7. Ms. G Loshma 8. Mr. Brijesh Kumar vi Vol. 1, Issue 5, pp. i-iii
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 APPLICATION OF SMES UNIT TO IMPROVE THE VOLTAGE PROFILE OF THE SYSTEM WITH DFIG DURING GRID DIP AND SWELL A. M. Shiddiq Yunus1, 2, A. Abu-Siada2 and M. A. S. Masoum2 1 Department of Mechanical Engineering, Energy Conversion Study Program, State Polytechnic of Ujung Pandang, Makassar, Indonesia 2 Departement of Electrical and Computer Engineering, Curtin University, Perth, AustraliaABSTRACTOne of the most important parameters of the system where wind turbine generators (WTGs) are connected isvoltage profile at the point of common coupling (PCC). In the earlier stage, WTGs were possible to bedisconnected from the system to avoid the damage of WTGs. Following the rapid injection of WTGs to theexisting network during last decades, the transmission line operators (TSOs) require WTGs to stay connected incertain level of fault to continue support the grid. This new requirements have been compiled in newinternational grid codes. In this paper, superconducting magnetic energy storage (SMES) is applied to improvethe voltage profile of PCC bus where WTGs equipped with doubly fed induction generator (DFIG) is connectedto meet the used gird codes of Spain and German during grid dip and swell. The voltage dip at the grid side isexamined to comply with the low voltage ride through (LVRT) while the voltage swell at the grid side isexamined to comply with the high voltage ride through (HVRT) of both Spain and German voltage ride through(VRT).KEYWORDS: Voltage Ride through (VRT), SMES, DFIG, Voltage Dip & Voltage Swell. I. INTRODUCTIONThe effect of pollution from conventional energy to the environment and the implementation ofcarbon tax have become a trigger of the increase of renewable energy utilization in the world. Inaddition, conventional energy is very limited and would soon be finished if exploited on a large scalebecause of oil, gas or coal is a material created in the process of millions of years. The limited amountand high demand for energy resources will affect the rise in oil prices from time to time. Therefore,attention is directed now onto the renewable energies which are clean and abundantly available in thenature . The first wind turbines for electricity generation had already been developed at thebeginning of the twentieth century. The technology was improved step by step from the early 1970s.By the end of the 1990s, wind energy has re-emerged as one of the most important sustainable energyresources. During the last decade of the twentieth century, worldwide wind capacity doubledapproximately every three years . The global installed capacity worldwide increased from just lessthan 2000 MW at the end of 1990 to 94000 MW by the end of 2007. In 2008, wind power alreadyprovides a little over 1% of global electricity generation and by about 2020, it is expected that windpower to be providing about 10% of global electricity . Moreover, the total 121 GW installedcapacity of wind turbine in 2008 has produced 260 TWh of electricity and has saved about 158million tons of CO2. In addition, the predication of total installed capacity of wind turbines will be573 GW in 2030 . Power quality issue is the common consideration for new construction orconnection of power generation system including WTGs installation and their connection to the 1 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963existing power system. In this paper, voltage dip (sag) and swell will be considered as the conditionsof the fault ride through capability of WTG equipped with DFIG. Voltage dip (sag) and swell are twocommon types of power quality issue. Voltage dip is a decrease to between 0.1 and 0.9 pu in rmsvoltage or current at the power frequency for durations of 0.5 cycles to 1 minute. Voltage dips areusually associated with system faults but can also be caused by switching of heavy loads or starting oflarge motors. A swell is defined as an increase in rms voltage or current at the power frequency fordurations from 0.5 cycles to 1 minute. Typical magnitudes are between 1.1 and 1.8 pu. As with dips,swells are usually associated with system fault conditions, but they are much less common thanvoltage dips. A swell can occur due to a single line-to-ground fault on the system resulting in atemporary voltage rise on the unfaulted phases. Swells can also be caused by switching off a largeload or switching on a large capacitor bank [5, 6]. Since voltage dip is a common power qualityproblem in power systems, most of studies are focused on the performance of WTGs during voltagedip [7-14]. Although it is a less power quality problem, voltage swell may also lead to thedisconnection of WTGs from the grid. In this paper, voltage dip and swell will applied on the gridside to investigate their effects on PCC which could affect the continuation of WTGs connection ifcomplying with the used grid codes in this paper as explained below with and without SMESconnected.II. SPAIN AND GERMAN GRID CODEIn the earlier stage, WTGs are possible to be disconnected from the system to avoid the damage ofWTGs. Following the rapid injection of WTGs to the existing network during last decades, thetransmission line operators (TSOs) require WTGs to stay connected in certain level of fault tocontinue support the grid. This new requirements have been compiled in new grid codes. However,most of grid codes are only providing low voltage ride through (LVRT) in their codes without anyrestriction information regarding the high voltage ride through (HVRT) which might be can leadinstability in the PCC. The following figures are the international grid codes of Spain and Germanwhich used in this study. Figure 1a and 1b show the voltage ride through (VRT) of Spain and Germanrespectively. The selection of these grid codes is based on their strictness in low voltage ride through(LVRT), meanwhile providing complete voltage ride through (VRT) with their HVRT. (a) (b) Figure 1. (a) FRT of Spain grid code and (b) FRT of German grid code In Figure 1 (a), the FRT of Spain is divided by three main blocks. “A” block is representing the highvoltage ride through (HVRT) of Spain grid code. The maximum allowable high voltage in the vicinityof PCC is 130% lasts for 0.5 s. After that the maximum high voltage is reduced to 120% until next0.5 s. All high voltage profiles above “A” block will lead the disconnection of WTGs from thesystem. The normal condition of this grid code is laid on “B” block. All voltage profiles within thisblock range are classified as a normal condition (90% to 110%). The low voltage ride through 2 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963(LVRT) is limited in “C” block. The minimum voltage drop allows in this grid code is 50% lasts for0.15 s and increased to 60% until 0.25s. The low voltage restriction then ramp to 80% at 1 s andreaching the normal condition in 15 s since the fault occurs. The HVRT of German grid code (shownin Figure 1(b)) is much strict then Spain. The maximum allowable HVRT is 120% for 0.1 s (shown in“A” block). The normal condition that is shown in “B” block is the same with Spain grid code.However, the LVRT is allowed to reach 45% lasts for 0.15 s and should be at least 70% until 0.7 s.After that the voltage margin ramps to 85% at 1.5 s.III. SYSTEM UNDER STUDYThere are two major classifications of wind turbine generator, fixed-speed turbine and variable-speedturbines. One of the most popular variable speed wind turbine is doubly fed induction generator(DFIG). About 46.8 % of this type has been installed in 2002 . A doubly fed induction generator(DFIG) using a medium scale power converter. Slip rings are making the electrical connection to therotor. If the generator is running super-synchronously, electrical power is delivered to the grid throughboth the rotor and the stator. If the generator is running sub- synchronously, electrical power isdelivered into the rotor from the grid. A speed variation of + 30% around synchronous speed can beobtained by the use of a power converter of 30% of nominal power. The stator winding of thegenerator is coupled to the grid, and the rotor winding to a power electronic converter, nowadaysusually a back-to-back voltage source converter with current control loops. In this way, the electricaland mechanical rotor frequencies are decoupled, because the power electronic converter compensatesthe different between mechanical and electrical frequency by injecting a rotor current with variablefrequency. Variable speed operation thus became possible. The typical of generic model of DFIG isshown in Figure 1. Figure 2. Typical configuration of WTG equipped with DFIGThe system under study shown in Figure 3 consists of six-1.5 MW DFIG connected to the AC grid atPCC via Y/∆ step up transformer. The grid is represented by an ideal 3-phase voltage source ofconstant frequency and is connected to the wind turbines via 30 km transmission line. The reactivepower produced by the wind turbine is regulated at 0 Mvar at normal operating conditions. For anaverage wind speed of 15 m/s which is used in this study, the turbine output power is 1 pu and thegenerator speed is 1 pu. SMES Unit is connected to the 25 KV (PCC) bus and is assumed to be fullycharged at its maximum capacity of 2 MJ. Figure 3. System under study 3 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963IV. SMES CONFIGURATION AND CONTROL SYSTEMThe selection of SMES Unit in this paper is based on its advantages over other energy storagetechnologies. Compared to other energy storage options, the SMES unit is ranked first in terms ofhighest efficiency which is 90-99% [16-18]. The high efficiency of the SMES unit is achieved by itslower power loss because electric currents in the coil encounter almost no resistance and there are nomoving parts, which means no friction losses. SMES stores energy within a magnetic field created bythe flow of direct current in a coil of superconducting material. Typically, the coil is maintained in itssuperconducting state through immersion in liquid helium at 4.2 K within a vacuum - insulatedcryostat. A power electronic converter interfaces the SMES to the grid and controls the energy flowbidirectionally. With the recent development of materials that exhibit superconductivity closer toroom temperatures this technology may become economically viable . The stored energy in theSMES coil can be calculated as: 1 2 E= I L (1) 2 SM SMWhere E is the SMES energy; ISM is the SMES Current and LSM is the SMES inductor coil.The SMES unit configuration used in this paper consists of voltage source converter (VSC) andDC-DC chopper which are connected through a DC shunt capacitor. The VSC is controlled by ahysteresis current controller (HCC) while the DC-DC chopper is controlled by fuzzy logic controller(FLC) as shown in Figure 4. Figure 4. SMES configurationDC-DC Chopper along with FLC is used to control charging and discharging process of the SMEScoil energy. The generator active power and the current in the superconductor coil are used as inputsto the fuzzy logic controller to determine the value of the DC chopper duty cycle, active power ofDFIG and SMES coil current are used as inputs of the fuzzy logic controller. The duty cycle (D) iscompared with 1000 Hz saw-tooth signal to produce signal for the DC-DC chopper as can be seen inFigure 5. Figure 5. Control algorithm of DC-DC chopperCompared with pulse width modulation (PWM) technique, the hysteresis band current control has theadvantages of ease implementation, fast response, and it is not dependent on load parameters . 4 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963Hysteresis current control (HCC) is used to control the power flow exchange between the grid and theSMES unit. HCC is comparing the 3-phase line currents with the reference currents (Id* and Iq*). Thevalue of Id* and Iq* are generated through the conventional PIs controller both from the deviation ofthe capacitor voltage Vdc and system voltage Vs. To minimize the effect of phases interference whilemaintaining the advantages of the hysteresis methods, phase-locked loop (PLL) technique is appliedto limit the converter switching at a fixed predetermined frequency . The proposed controlalgorithm in this paper is much simpler and closer to realistic application compared with the controllerused in , where four PIs controller were used which complicate the process of finding the optimalparameters of the PIs, moreover, only Pg was used as the control parameter of the DC-DC chopperand it ignored the energy capacity of the SMES coil. The detailed VSC control scheme used in thispaper is shown in Figure 6. The rules of duty cycles D and the corresponding SMES action are shownin Table I. When D is equal to 0.5, SMES unit is in idle condition and there is no power exchangebetween the SMES unit and the system. When there is any voltage drop because of fault, thecontroller generates a duty cycle in the range of 0 to 0.5 according to the value of the inputs andpower will be transferred from SMES coil to the system. The charging action (corresponding to theduty cycle higher than 0.5) will take place when SMES coil capacity is dropped and power will betransferred from the grid to the SMES unit. Figure 6. Control algorithm of VSC Table 1. Rules of duty cycle Duty cycle (D) SMES coil action D = 0.5 standby condition 0 ≤ D < 0.5 discharging condition 0.5 < D ≤ 1 charging conditionThe variation range in SMES current and DFIG output power and the corresponding duty cycle are used todevelop a set of fuzzy logic rules in the form of (IF-AND-THEN) statements to relate the input variables tothe output. The duty cycle for any set of input date (Pg and ISM) can be evaluated from the surface graphshown in Figure 7. 5 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 Figure 7. Surface graph- Duty cycle V. SIMULATION RESULTSIn this paper, two grid disturbances will be applied. The first disturbance would be a voltage dip of20% and the second is a voltage swell of 135%. Both of disturbances are applied at 0.5 s and last for 5cycles.5.1. Voltage Dip Figure 8. Complying voltage profile at PCC with Spain VRT during grid dip Figure 9. Complying voltage profile at PCC with German VRT during grid dipAs can be seen in Figures 8 and 9, during voltage dip at the grid side, voltage profile at the PCC willbe dropped about 0.35 pu without SMES connected. This value is beyond the LVRT of both Spainand German, therefore in this case, the DFIGs have to be disconnected from the system. However,when SMES is connected voltage drop at the PCC can be significantly corrected to about 0.8 pu far 6 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963from the lowest limit of LVRT of both Spain and German. When fault is cleared, it is naturally thatthere is a spark which forces the overshoot voltage, however, the overshoot is still under the safetymargin of both Spain and German HVRT. Figure 10. Shaft speed during grid dipDuring voltage dip, the speed of shaft will increase at the time when the grip dip occurs to compensatethe power drop due to the voltage drop at the PCC as shown in Figure 10. In some severe grid dipcases the extreme oscillation on shaft speed will lead to instability of the system. With SMESconnected to the PCC, the oscillation, settling time and the overshoot of the shaft speed aresignificantly reduced if compared with the system without SMES. Figure 11. Current behaviour of SMES coil during grid dip Figure 12. Stored energy behaviour of SMES coil during grid dip 7 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 Figure 13. Voltage behaviour across the SMES coil during grid dip Figure 14. Duty cycle of DC-DC chopper during grid dipThe behavior of the SMES coil during the fault can be investigated through Fig 11 to Fig.13 whichrespectively show the SMES coil current, SMES stored energy and the voltage across the coil. TheSMES coil energy is 2 MJ during normal operating conditions, when voltage dip occurs, SMES coilinstantly discharges its energy into the grid as shown in Figure 11. The characteristic of SMEScurrent shown in Figure 12 is similar to the energy stored in the coil. The charging and dischargingprocess of SMES coil can also be examined from the voltage across SMES coil (VSM) shown inFigure 13. During normal operating conditions, VSM is equal to zero, it goes to negative value duringdischarging process and will return back to zero level after the fault is cleared. As mentioned before,the duty cycle of DC-DC chopper play important role to determine the charging and dischargingprocess of SMES coil energy. As shown in Figure 14, when voltage dip occur, power produced byDFIG will also reduced, hence the FLC will see this reduction and act according to the membershipfunction rules shown in Figure 7, the duty cycle will in the range between 0 to 0.5 at this stage andonce the fault is cleared, the control system will act to charging the SMES coil. In this stage, dutycycle will be in the range of 0.5 to 1 and will be back to its idle value of 0.5 once the SMES coilenergy reach its rated capacity. 8 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-19635.2. Voltage Swell Figure 15. Complying voltage profile at PCC with Spain and German HVRT during grid swellThe grid swell is started at 0.5 s and lasts for 5 cycles. As can be observed in Figure 15, withoutSMES unit connected, during grid swell, voltage profile at the PCC will rise above 130 % and in thiscondition, DFIGs that connected at the PCC have to be disconnected from the grid if complying withboth HVRT of Spain and German, however when fault is cleared out, the voltage profile can be soonrecovered and remains in the safety margin of both LVRT of Spain and German. When SMES unit isconnected, the voltage at the PCC is corrected to the safety margin of both HVRT of the grid codes ofSpain and German, hence avoid the disconnection of DFIGs from the grid. Figure 16. Shaft speed during grid swellVoltage swell at the grid side will force the voltage at the PCC will increase accordingly depends onthe percentage level of the swell. Hence, the power will be forced to level above the pre determinedrated, the speed control in this condition will limit the speed to avoid over-speeding of the shaft,however in certain level of swell, the over speed protection may work and lead the generator to beshut down. As described in Figure 16, with SMES connected to the PCC, the settling time andoscillation of the shaft speed can be considerably reduced compared with the system without SMES. 9 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 Figure 17. Current behaviour of SMES coil during grid swell Figure 18. Stored energy behaviour of SMES coil during grid swell Figure 19. Voltage behaviour across the SMES coil during grid swell 10 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 Figure 20. Duty cycle of DC-DC chopper during grid swellBehaviours of SMES unit can be seen in Figures 17 to 20. Because the voltage swell at the grid sidecausing short overshoot of power produced by DFIGs, current in the SMES coil will rise slightly andlikewise the energy in the SMES coil following the control regulation of FLC to damp the highvoltage at the PCC. When voltage swell is cleared out, voltage at the PCC will slightly drop causingthe power produced by DFIGs will drop either. This small amount of power drop is seen by thecontroller and taking action to discharging the small amount of energy and improve the voltage at thePCC, this can be justified in Figure 15, where voltage drop is lesser and voltage recovery is quickerwith SMES unit connected if compare with the system without SMES.VI. CONCLUSIONSThis paper investigates the use of SMES unit to enhance the VRT capability of doubly fed inductiongenerator to comply with the grid codes of Spain and German grid codes. Results show that, withoutthe use of SMES unit, DFIGs must be disconnected from the grid because the voltage drop duringgrid dip and voltage rise during grid swell at the PCC will cross beyond the safety margin of both theLVRT and HVRT of Spain and German, therefore in this condition wind turbines equipped withDFIG must be disconnected from the power system to avoid the turbines from being damaged.However, using the proposed converter and chopper of the SMES unit which are controlled using a hysteresiscurrent controller (HCC) and a fuzzy logic controller (FLC), respectively, both the LVRT and HVRTcapability of the DFIGs can significantly improve and their connection to the grid can be maintainedto support the grid during faulty condition and to ensure the continuity of power supply.ACKNOWLEDGEMENTThe first author would like to thank the Higher Education Ministry of Indonesia (DIKTI) and the StatePolytechnic of Ujung Pandang for providing him with a PhD scholarship at Curtin University,Australia.REFERENCES L. Freris and D. Infield, Renewable Energy in Power System. Wiltshire: A John Wiley & Sons, 2008. T. Ackerman, Wind Power in Power System. West Sussex: John Wiley and Sons Ltd, 2005. P. Musgrove, Wind Power. New York: Cambridge University Press, 2010. "Global wind energy outlook 2010," Global Wind Energy Council, 2010. A. N. S. (ANSI), "IEEE Recommended Practice for Monitoring Electric Power Quality," 1995. E. F. Fuchs and M. A. S. Masoum, "Power Quality in Power Systems and Electrical Machines," Elsevier, 2008. R. K. Behera and G. Wenzhong, "Low voltage ride-through and performance improvement of a grid connected DFIG system," in Power Systems, 2009. ICPS 09. International Conference on, 2009, pp. 1- 6. 11 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 S. Hu and H. Xu, "Experimental Research on LVRT Capability of DFIG WECS during Grid Voltage Sags," in Power and Energy Engineering Conference (APPEEC), 2010 Asia-Pacific, pp. 1-4. K. Lima, A. Luna, E. H. Watanabe, and P. Rodriguez, "Control strategy for the rotor side converter of a DFIG-WT under balanced voltage sag," in Power Electronics Conference, 2009. COBEP 09. Brazilian, 2009, pp. 842-847. L. Trilla, O. Gomis-Bellmunt, A. Junyent-Ferre, M. Mata, J. Sanchez, and A. Sudria-Andreu, "Modeling and validation of DFIG 3 MW wind turbine using field test data of balanced and unbalanced voltage sags," Sustainable Energy, IEEE Transactions on, vol. PP, pp. 1-1, 2011. Y. Xiangwu, G. Venkataramanan, P. S. Flannery, and W. Yang, "Evaluation the effect of voltage sags due to grid balance and unbalance faults on DFIG wind turbines," in Sustainable Power Generation and Supply, 2009. SUPERGEN 09. International Conference on, 2009, pp. 1-10. Y. Xiangwu, G. Venkataramanan, P. S. Flannery, W. Yang, D. Qing, and Z. Bo, "Voltage-Sag Tolerance of DFIG Wind Turbine With a Series Grid Side Passive-Impedance Network," Energy Conversion, IEEE Transactions on, vol. 25, pp. 1048-1056. A. M. Shiddiq-Yunus, A. Abu-Siada, and M. A. S. Masoum, "Effects of SMES on Dynamic Behaviours of Type D-Wind Turbine Generator-Grid Connected during Short Circuit," in IEEE PES meeting Detroit, USA: IEEE, 2011. A. M. Shiddiq-Yunus, A. Abu-Siada, and M. A. S. Masoum, "Effects of SMES Unit on the Perfromance of Type-4 Wind Turbine Generator during Voltage Sag," in Renewable Power Generation RPG 2011 Edinburgh, UK: IET, 2011. Alt, x, M. n, Go, O. ksu, R. Teodorescu, P. Rodriguez, B. B. Jensen, and L. Helle, "Overview of recent grid codes for wind power integration," in Optimization of Electrical and Electronic Equipment (OPTIM), 2010 12th International Conference on, pp. 1152-1160. R. Baxter, Energy Storage: A Nano Technical Guide. Oklahoma: PenWell Corporation, 2006. F. A. Farret and M. G. Simoes, Integration of Alternative Source of Energy. New Jersey: John Wiley & Sons, 2006. E. Acha, V. G. Agelidis, O. Anaga-Lara, and T. J. E. Miller, Power Electronic Control in Electrical System. Oxford: Newnes, 2002. M. Milosevic. vol. 2011. L. Malesani and P. Tenti, "A novel hysteresis control method for current-controlled voltage-source PWM inverters with constant modulation frequency," Industry Applications, IEEE Transactions on, vol. 26, pp. 88-92, 1990. M. H. Ali, P. Minwon, Y. In-Keun, T. Murata, and J. Tamura, "Improvement of Wind-Generator Stability by Fuzzy-Logic-Controlled SMES," Industry Applications, IEEE Transactions on, vol. 45, pp. 1045-1051, 2009.AuthorsA. M. Shiddiq Yunus was born in Makassar, Indonesia. He received his B.Sc fromHasanuddin University in 2000 and his M.Eng.Sc from Queensland University ofTechnology (QUT), Australia in 2006 both in Electrical Engineering. He recently towardshis PhD study in Curtin University, WA, Australia. His employment experience includedlecturer in the Department of Mechanical Engineering, Energy Conversion Study Program,State Polytechnic of Ujung Pandang since 2001. His special fields of interest includedsuperconducting magnetic energy storage (SMES) and renewable energy.A. Abu-Siada received his B.Sc. and M.Sc. degrees from Ain Shams University, Egypt andthe PhD degree from Curtin University of Technology, Australia, All in ElectricalEngineering. Currently, he is a lecturer in the Department of Electrical and ComputerEngineering at Curtin University. His research interests include power system stability,condition monitoring, superconducting magnetic energy storage (SMES), power electronics,power quality, energy technology, and system simulation. He is a regular reviewer for theIEEE Transaction on Power Electronics, IEEE Transaction on Dielectric and ElectricalInsulations, and the Qatar National Research Fund (QNRF). 12 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963Mohammad A. S. Masoum received his B.S., M.S. and Ph.D. degrees in Electrical andComputer Engineering in 1983, 1985, and 1991, respectively, from the University of Colorado,USA. Dr. Masoums research interests include optimization, power quality and stability of powersystems/electric machines and distributed generation. He is the co-author of Power Quality inPower Systems and Electrical Machines (New York: Academic Press, Elsevier, 2008).Currently, he is an Associate Professor and the discipline leader for electrical power engineeringat the Electrical and Computer Engineering Department, Curtin University, Perth, Australia and asenior member of IEEE. 13 Vol. 1, Issue 5, pp. 1-13
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 HYBRID MODEL FOR SECURING E-COMMERCE TRANSACTION Abdul Monem S. Rahma1, Rabah N. Farhan2, Hussam J. Mohammad3 1 Computer science Dept. University of Technology, Iraq 2 &3 Computer science Dept., College of Computer, Al-Anbar University, IraqABSTRACTThe requirements for securing e-commerce transaction are privacy, authentication, integrity maintenance andnon-repudiation. These are the crucial and significant issues in recent times for trade which are transacted overthe internet through e-commerce channels. In this paper suggest cipher method that is improves the Diffie-Hellman key exchange by using truncated polynomial in discrete logarithm problem ( DLP ) to increases thecomplexity of this method over unsecured channel, also combines the hashing algorithm of MD5, the symmetrickey algorithm of AES and the asymmetric key algorithm of Modification of Diffie-Hellman (MDH).KEYWORDS: key exchange, Securing E-commerce Transaction, Irreducible Polynomial I. INTRODUCTIONAs an electronic commerce exponentially grows, the number of transactions and participants who usee-commerce applications has been rapidly increased. Since all the interactions among participantsoccur in an open network, there is a high risk for sensitive information to be leaked to unauthorizedusers. Since such insecurity is mainly created by the anonymous nature of interactions in e-commerce,sensitive transactions should be secured. However, cryptographic techniques used to secureecommerce transactions usually demand significant computational time overheads, and complexinteractions among participants highly require the usage of network bandwidth beyond themanageable limit .Security problems on the Internet receive public attention, and the media carry stories of high-profilemalicious attacks via the Internet against government, business, and academic sites .Confidentiality, integrity, and authentication are needed. People need to be sure that their Internetcommunication is kept confidential. When the customers shop online, they need to be sure that thevendors are authentic. When the customers send their transactions request to their banks, they want tobe certain that the integrity of the message is preserved .From above discussions, it is clear that we must pay careful attention to security in E-commerce.Commonly, the exchange of data and information between the customers and the vendors and thebank must rely on personal computers that are available worldwide and based on central processingunits (CPU) with 16-bit or 32-bit or 64-bit and operating systems that commonly used such as(windows) that running on the same computer. Communication security requires a period of time toexchange information and data between the customers and the vendors and the bank in such a waythat no one can break this communication during this period. Irreducible truncated polynomialmathematics was adopted since 2000, which was developed for use in modern encryption methods,such as AES. Irreducible truncated polynomial mathematics we can use to build the proposed systembecause it is highly efficient and compatible with personal computers.As a practical matter, secure E-commerce may come to mean the use of information securitymechanisms to ensure the reliability of business transactions over insecure networks . 14 Vol. 1, Issue 5, pp. 14-20
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 II. RELATED WORKSIn the following review, different methods were used in order to increase the e-commerce security:Sung W. T, Yugyung L., and et al (2001) this research proposed an adaptive secure protocol tosupport secure e-commerce transactions. This adaptive Secure Protocol dynamically adapts thesecurity level based on the nature and sensitivity of the interactions among participants. The securityclass incorporates the security level of cryptographic techniques with a degree of informationsensitivity. It forms implements Adaptive Secure Protocol and measures the performance of AdaptiveSecure Protocol. The experimental results show that the Adaptive Secure Protocol providesecommerce transactions with high quality of security service .Also Ganesan R and Dr. K. Vivekanandan (2009) proposed a software implementation of a digitalenvelope for a secure e-commerce channel that combines the hashing algorithm of MD5 for integrity,the symmetric key algorithm of AES and the asymmetric key algorithm of Hyperelliptic CurveCryptography (HECC). The algorithm tested for various sizes of files. The digital envelope combiningAES and HECC is the better alternative security mechanism for the secure e-commerce channel toachieve Privacy, Authentication, Integrity maintenance and Non-Repudiation .Also H. K. Pathak , Manju Sanghi  proposed a new public key cryptosystem and a KeyExchange Protocol based on the generalization of discrete logarithm problem using Non-abeliangroup of block upper triangular matrices of higher order. The proposed cryptosystem is efficient inproducing keys of large sizes without the need of large primes. The security of both the systems relieson the difficulty of discrete logarithms over finite fields .III. AES ALGORITHMThe Advanced Encryption Standard AES is a symmetric block cipher. It operates on 128-bit blocks ofdata. The algorithm can encrypt and decrypt blocks using secret keys. The key size can either be 128-bit, 192-bit, or 256-bit. The actual key size depends on the desired security level.The algorithm consists of 10 rounds (when the key has 192 bits, 12 rounds are used, and when the keyhas 256 bits, 14 rounds are used). Each round has a round key, derived from the original key. There isalso a 0th round key, which is the original key. The round starts with an input of 128 bits andproduces an output of 128 bits. There are four basic steps, called layers that are used to form therounds :The ByteSub Transformation (SB): This non-linear layer is for resistance to differential and linearcryptanalysis attacks.The ShiftRow Transformation (SR): This linear mixing step causes diffusion of the bits over multiplerounds.The MixColumn Transformation (MC): This layer has a purpose similar to ShiftRow.AddRoundKey (ARK): The round key is XORed with the result of the above layer.IV. BASICS OF MD5MD5 (Message-Digest algorithm 5), is an Internet standard and is one of the widely usedcryptographic hash function with a 128-bit message digest. This has been employed in a wide varietyof security applications. The main MD5 algorithm operates on a 128-bit, divided into four 32-bitwords . V. MODIFICATION OF DIFFIE-HELLMAN (MDF)The idea is improves the Diffie-Hellman key exchange by using truncated polynomial in discretelogarithm problem ( DLP ) to increases the complexity of this method over unsecured channel. TheDLP of our cipher method is founded on polynomial arithmetic, whereas the elements of the finitefiled G are represented in polynomial representations. The original DLP implies a prime number forits module operation, and the same technique is used in proposal method but considering anirreducible (prime) polynomial instead of an integer prime number. Before offering the method, wewill offer Discrete Logarithm Problem ( DLP ) in polynomialsi. Discrete Logarithm Problem (DLP) in polynomials 15 Vol. 1, Issue 5, pp. 14-20
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 In our method (DLP) involve raising an polynomial to an polynomial power, mod irreduciblepolynomial .The algorithm to compute offer as following :Where:F (a) = polynomial value, F (x) = polynomial value. F (g) = irreducible polynomial value.ii. The solution steps for this method Algorithm 1: Modular Exponentiation Algorithm in Polynomial. Input: . Output: F ( z ) = Value in polynomial . Process: Step1: Convert the F(x) to binary and put the value in K as Kn , Kn-1 , Kn-2 , ..... k0 . Step2: Select F (z ) polynomial variable first equal to one F (z) = 1 . Step3: apply following For i = n down to 0 F ( z ) = F ( z ) ⊗ F ( z ) mod F( g ) If Ki = 1 then F ( z ) = F ( z ) ⊗ F ( a ) mod F( g ) Step4: return F ( z ) Step5: End.We suppose there are two sides want to exchange key (Client and Server) the Client side encryptmessage and Server side decrypt its, as following:1. Key generationThere are two publicly known numbers: irreducible polynomial F( p ) and a polynomial value F( a )that is a primitive root of F( p ).Client SideThe client side select a random polynomial value F( XC ) < F( p ) and computes:F( YC )= ( mod F( p )…………..(1)Server SideThe server side select a random polynomial value F( XS ) < F( p ) and computes:F( YS )= ( mod F( p ) ………….. (2) Each side keeps the F(X) value private and makes the F(Y) value available publicly to the other side.Client SideThe client side compute shared key by return the F( YS ) from server side :Key = ( mod F( p ) ………….. (3)Server SideThe server side compute shared key by return the F ( Yc ) from client side :Key = mod F( p ) ………….. (4)Now the two sides have same Secret key (SK): ………….. (5) 16 Vol. 1, Issue 5, pp. 14-20
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-19632. Encryption MessageTo encrypt the message firstly convert each letter from message to polynomial, secondly apply thefollowing equation to find cipher ( C ):Ci = ( Mi Sk) mod F(g) ………….. (6)3. Decryption MessageTo decrypt message firstly compute the multiplicative inverse for secret key(Sk), secondly apply the following equation to find message:Mi = (Ci Sk) mod F (g) ………….. (7) Figure (1): Modification of Diffie Hellman (MDF)VI. IMPLEMENTATION DETAILSWe present here combines the best features of both symmetric and asymmetric encryption techniques.The data (plain text) that is to be transmitted is encrypted using the AES algorithm. The data (plaintext) used input to MD5 to generate AES key. This key encrypted by using modification of diffie-hellman (MDF). The using of MD5 useful in two directions, firstly to ensure integrity of the data thatis transmitted, secondly to easy generate secret key that used in AES algorithm. Thus the client sendscipher text of the message, and ciphertext of the AES key also its represent ciphertext of the message 17 Vol. 1, Issue 5, pp. 14-20
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963digest. The server upon receiving ciphertext of the message, and ciphertext of the AES key. Firstdecrypts the Ciphertext of the AES key by (MDH) to obtain the AES key. This is then used to decryptthe cipher text of the message by AES decryption to obtain the plain text. The plaintext is againsubjected to MD5 hash algorithm to compare with decrypted message digest to ensure integrity ofdata. Client Side Server Side Plain Text Plain AES Text AES MD5 MD5 Servers Servers Private key Public key Compare MDHSymmetric MDH Key If same ACCEPT Symmetric , else REJECT Key Figure (1): implementation details of modelVII. RESULTSThe hybrid algorithm execute on PC computer of CPU Intel Pentium 4 2.2 MHz Dual Core 2. Theprograms implemented using Microsoft Visual Studio 2008 (C#). Its tested with three messagesdifferent in length (1000 char, 3000 char, 5000 char) .The key sizes that used for AES (128 bit) .thetable 1 provides details on the time taken for encryption, decryption for (AES,MDH) and Calculationof MD5 Message Digest.Table 1: Time in (Second: Milliseconds) for AES, MDH Encryption and Decryption and Calculation of MD5Message DigestMessage length AES Enc AES Dec MDH Enc MDH Dec MD51000 char 0:30 0:17 0:700 0:500 0:203000 char 0:93 0:62 1: 500 1: 300 0:355000 char 0:187 0:109 2:800 2:400 0:52 18 Vol. 1, Issue 5, pp. 14-20
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963VIII. ANALYSISWith any cryptographic system dealing with 128 bit key, the total number of combination is .The time required to check all possible combinations at the rate of rate 50 billion keys / second isapproximately ( 5 * ) years thus AES is very strong and efficiency to used in e-commerce .Randomness of Modification of Diffie-Hellman (MDH) is very high whatever the irreduciblepolynomial because the result is always unexpected, also the complexity is always complex because itdepends on irreducible truncated polynomial. IX. CONCLUSIONSatisfying security requirements is one of the most important goals for e-commerce system securitydesigners; in this paper we give the protocol design for securing e-commerce transaction by usinghybrid encryption technique. This hybrid encryption method surely will increase the performance ofcryptographic algorithms. This protocol will ensure the confidentiality, integrity and authentication.The AES algorithm provides confidentiality, the MD5 hash function provides the integrity and themodification of Diffie-Hellman will ensure the authentication. We have tested the algorithm forvarious sizes of messages. The experimental results showed that the model be improved theinteracting performance, while providing high quality of security service for desired e-commercetransactions.REFERENCE Sung W. T., Yugyung L., Eun K. P., and Jerry S. ," Design and Evaluation of Adaptive Secure Protocol for E-Commerce " , 0-7803-7128-3/01/$10.00 (C) | 2001 IEEE. Abeer T. Al-Obaidy , " Security Techniques for E-Commerce Websites ", Ph. Thesis, The Department of Computer Science , University of Technology, 2010. Oppliger R.,"Security Technologies for the World Wide Web, Second Edition", Library of Congress, © ARTECH HOUSE, Inc., USA, 2003. Wooseok Ham, “Design of Secure and Efficient E-commerce Protocols Using Cryptographic Primitives", MSc. Thesis , School of Engineering , Information and Communications University 2003. Ganesan R. , Dr. Vivekanandan K., " A Novel Hybrid Security Model for E-Commerce Channel" , © 2009 IEEE. Pathak H. K. , Manju S. , " Public key cryptosystem and a key exchange protocol using tools of non-abelian group" , (IJCSE) International Journal on Computer Science and Engineering , Vol. 02, No. 04, 2010 . Oswald E., " Encrypt: State of the Art in Hardware Architectures", Information Society Technologies, UK, 2005. Trappe W., Washington L.,"Introduction to Cryptography with Coding Theory, Second Edition", ©PearsonEducation, Inc. Pearson Prentice Hall, USA, 2006. Sung W. T., Yugyung L., et al," Design and Evaluation of Adaptive Secure Protocol for E-Commerce”, , ©IEEE, 2005.AuthorsAbdul Monem Saleh Rahma awarded his MSc from Brunel University and his PhD fromLoughborough University of technology United Kingdom in 1982, 1985 respectively. Hetaught at Baghdad university department of computer science and the Military Collage ofEngineering, computer engineering department from 1986 till 2003.He fills the position ofDean Asst. of the scientific affairs and works as a professor at the University of TechnologyComputer Science Department .He published 82 Papers in the field of computer science andsupervised 24 PhD and 57 MSc students. His research interests include Cryptography,Computer Security, Biometrics, image processing, and Computer graphics. And heAttended and Submitted in many Scientific Global Conferences in Iraq and Many othercountries.Rabah Nory Farhan has received Bachelor Degree in Computer Science, AlmustanseriaUniversity, 1993, High Diploma in Data Security/Computer Science, University ofTechnology, 1998. Master Degree in Computer Science, University of Technology,2000.PHD Degree in Computer Science, University of Technology, 2006. Undergraduate 19 Vol. 1, Issue 5, pp. 14-20
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963Computer Science Lecturer, University of Technology, 2002 to 2006. Undergraduate and postgraduateComputer Science Lecturer, Graduate Advisor, Computer College, University of Al-Anbar,2006 -till now.Hussam Jasim Mohammed Al-Fahdawi has received B.Sc in Computer Science, Al-AnbarUniversity, Iraq, (2005-2009). M.Sc student (2010- tell now) in Computer Science Department,Al-Anabar University. Fields of interest: E-Commerce Security, cryptography and relatedfields. Al-Fahdawi taught many subjects such as operation system, computer vision, imageprocessing. 20 Vol. 1, Issue 5, pp. 14-20
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 DSSS DIGITAL TRANSCEIVER DESIGN FOR ULTRA WIDEBAND Mohammad Shamim Imtiaz Part-time Lecturer, Department of EEE, A.U.S.T, Dhaka, BangladeshABSTRACTDespite the fact ultra-wideband technology has been around for over 30 years, there is a newfound excitementabout its potential for communications. In this paper we are specifically focused on a software radio transceiverdesign for impulse-based UWB with the ability to transmit a raw data rate of 100 Mbps yet encompass theadaptability of a reconfigurable digital receiver. Direct sequence spread spectrum has become the modulationmethod of choice for wireless local area networks, because it’s numerous advantages such as jammersuppression, code division multiple access and ease of implementation. We also observe its characteristics andcomplete the modulation techniques with MATLAB Simulink. The latter includes bit error rate testing for varietyof modulation schemes and wireless channels using pilot-based matched filter estimation techniques.Ultimately, the transceiver design demonstrates the advantage and challenge of UWB technology while boastinghigh data rate communication capability and providing the flexibility of a research test bed.K EY WORDS: Ultra-wideband (UWB), direct sequence spread spectrum (DSSS), wireless local areanetworks (WLAN’s), personal communication systems (PCS), code division multiple access (CDMA). I. INTRODUCTIONUltra wideband (also known as UWB or as digital pulse wireless) is a wireless technology fortransmitting large amount of digital data over a wide spectrum of frequency bands with very lowpower for a short distance. Ultra wideband radio can carry a huge amount of data over a distance up to230 feet at very low power (less than 0.5 mW) and it has the ability to carry signals through doors andother obstacles that tend to reflect signals at more limited bandwidths and higher power . Theconcept of UWB was formulated in the early 1960s through research in time-domain electromagneticand receiver design, both performed primarily by Gerald F. Ross . Through his work, the firstUWB communications patent was awarded for the short-pulse receiver, which he developed whileworking for Sperry Rand Corporation. Throughout that time, UWB was referred in broad terms as“carrier less” or impulse technology. After that UWB was coined in the late 1980s to describe thedevelopment, transmission, and reception of ultra-short pulses of radio frequency (RF) energy. Forcommunication applications, high data rates are possible due to the large number of pulses that can becreated in short time duration . Due to its low power spectral density, UWB can be used inmilitary applications that require low probability of detection . UWB also has traditionalapplications in non cooperative radar imaging, target sensor data collection, precision locating andtracking applications . A significant difference between traditional radio transmissions and UWBradio transmissions are that traditional systems transmit information by varying the power level,frequency, and/or phase of a sinusoidal wave. UWB transmissions transmit information by generatingradio energy at specific time instants and occupying large bandwidth thus enabling a pulse-position ortime-modulation .UWB communications transmit in a way that doesnt interfere largely with othermore traditional narrow band and continuous carrier wave uses in the same frequency band .However first studies show that the rise of noise level by a number of UWB transmitters puts a burdenon existing communications services . This may be hard to bear for traditional systems designsand may affect the stability of such existing systems. The design of UWB is very different from thatof conventional narrow band. In the conventional narrow band, frequency domain should be 21 Vol. 1, Issue 5, pp. 21-29
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963considered to design the filter or mixer because the signals are in narrow frequency band. On the otherhand, in UWB, time domain should be also considered to design especially for miser because thecarrier less signals possess wide frequency-band and using short pulse means discontinuous signal.The Federal Communications Commission has recently approved use of Ultra Wideband technology,allowing deployment primarily in frequency band not only from 3.1 GHz, but also below 960 MHzfor imaging applications . Hence, pulse width should be about 2 ns in order to be used below 960MHz frequency band.Recently there has been a burst of research about UWB; hence more and more papers are beingpublished. However, many papers have been found on the transceiver circuit description for UWBwith different technology but here we propose a system model of UWB Transceiver with DirectSequence Spread Spectrum technology. In this paper we focused on a software based radiotransceiver design for impulse-based UWB with the ability to transmit a raw data rate of 100 Mbpsyet encompass the adaptability of a reconfigurable digital receiver. Here we also introduce atransmitter and receiver of pulse based ultra wideband modulation. Direct sequence spread spectrum(DSSS) has become the modulation method of choice for wireless local area networks (WLAN’s), andpersonal communication systems (PCS), because it’s numerous advantages, such as jammersuppression, code division multiple access (CDMA), and ease of implementation. As with otherspread spectrum technologies, the transmitted signal takes up more bandwidth than the informationsignal that is being modulated. The name spread spectrum comes from the fact that the carrier signalsoccur over the full bandwidth (spectrum) of a devices transmitting frequency.This paper is structured as follows: Section 2 briefly introduces system blocks that have used todesign the DSSS Digital Transceiver. Section 3 and 4 present the design of DPSK Transmitter andDPSK Receiver respectively. Section 5 exhibits the results taken by oscilloscopes and demonstratesthe discussion of finding such results. Section 6 suggests the future work and modification of thispaper. Section 7 concludes the paper.II. SYSTEM MODELThe designed model for the transceiver is shown in Fig-1, consists of a hierarchical system whereblocks represent subsystems and oscilloscopes are placed along the path for display purposes.The main components or blocks of this design are PN sequence generator, XOR, Unite delay, Switch,Pulse generator, Derivative, Integer delay, Digital Filter, Product, Gain and oscilloscope. The PNSequence Generator block generates a sequence of pseudorandom binary numbers. A pseudo noisesequence generator which uses a shift register to generate sequences, can be used in a pseudorandomscrambler, descrambler and in a direct-sequence spread-spectrum system . The PN SequenceGenerator block uses a shift register to generate sequences. Here, PN sequence generator uses forgenerating both incoming message and high speed pseudo random sequence number for spreadingpurpose. XOR block work as a mixer, it mixes two different inputs with each other as digital XORdoes and gives the output. The Unit Delay block holds and delays its input by the sample period youspecify. This block is equivalent to the discrete-time operator. The block accepts one input andgenerates one output. Each signal can be scalar or vector. If the input is a vector, the block holds anddelays all elements of the vector by the same sample period. Pulse generator capable of generating avariety of pulses with an assortment of options.Switch uses for switching the two different input and direct it to the output as per requirement.Derivative block basically differentiate the input data. The pulse generator and sequentially twoderivatives are used for performing Bi-phase modulation as per requirement. Integer delay use todelay the 63 chip incoming data. Digital filter has its special use. It uses for creating digital filter forrecovering purpose. Gain blocks use for amplifying process. Oscilloscopes are placed along the pathfor display purpose.Direct-sequence spread spectrum (DSSS) is a modulation technique. The DPSK DSSS modulationand dispread techniques are mainly use for designing the whole transceiver with the exception ofreceiving the signal using Bi-phase modulation. The design for pulse based UWB is divided into threeparts as DSSS DPSK transmitter where transmitter part is separately designed, DPSK DSSStransceiver where received signal has dispread with some propagation delay, DPSK DSSS transceiverwith Bi-phase modulator and matched filter where original signal has recovered. 22 Vol. 1, Issue 5, pp. 21-29
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 2231 Figure 1: Simulink model of DPSK DSSS Transceiver :The data signal, rather than being transmitted on a narrow band as is done in microwavecommunications, is spread onto a much larger range of frequencies (RF bandwidth) using a specific muchencoding scheme. This encoding scheme is known as a Pseudo-noise sequence, or PN sequence. Pseudo noiseDirect sequence spread spectrum has become the modulation method of choice for wireless local areanetworks, and personal communication systems. Direct works, Direct-sequence spread-spectrum transmissions spectrummultiply the data being transmitted by a "noise" signal. This noise signal is a pseudorandom sequenceof 1 and −1 values, at a frequency much higher than that of the original signal, thereby spreading the originalenergy of the original signal into a much wider band. The resulting signal resembles white noise, like noisean audio recording of "static". However, this noise-like signal can be used to exactly reconstruct the th likeoriginal data at the receiving end, by multiplying it by the same pseudorandom sequence  Thisprocess, known as "de-spreading", mathematically constitutes a correlation of the transmitted PN spreading",sequence with the PN sequence that the receiver believes the transmitter is using. For de de-spreading towork correctly, transmit and receive sequences must be synchronized. This requires the receiver tosynchronize its sequence with the transmitters sequence via some sort of timing search process.However, this apparent drawback can be a significant benefit: if the sequences of multiple transmittersare synchronized with each other, the relative synchronizations the receiver must make between themcan be used to determine relative timing, which, in turn, can be used to calculate the receiversposition if the transmitters positions are known . This is the basis for many satellite navigationsystems.The resulting effect of enhancing signal to noise ratio on the channel is called process gain. This gaineffect can be made larger by employing a longer PN sequence and more chips per bit, but physicaldevices used to generate the PN sequence impose practical limits on attainable processing gain . heIII. DPSK TRANSMITTERDPSK DSSS transmitter consists of PN Sequence generator which generates a sequence of pseudorandom binary numbers using a linear linear-feedback shift register, XOR used for mixing data, Unite delayused for delayed data and oscilloscopes are placed along the path for display purposes. Here, PN
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231 2231-1963Sequence generator is used as both generating message and a sequence of pseudo random binarynumbers for spreading process. Figure 2 is the Simulink model of DPSK DSSS Transmitter. TransmitterWhen differentially encoding an incoming message, each input data bit must be delayed until the nextone arrives. The delayed data bit is then mixed with the next incoming data bit. The output of themixer gives the difference of the incoming data bit and the delayed data bit. The differentiallyencoded data is then spread by a high speed pseudo noise sequence (PN).This spreading process high-speedassigns each data bit its own unique code, allowing only a receiver with the same spreading to ts withdispread the encoded data.The 63-bit pseudo noise sequences (PN) used in this papers are generated by a 6th order maximal bitlength sequence shown in equation one one, (1) Figure 2: Simulink model of DPSK DSSS TransmitterThe maximal length spreading sequence uses a much wider bandwidth than the encoded data bitstream, which causes the spread sequence to have a much lower power spectral density . Thetransmitted signal is then given by, (2)Where is the differentially encoded data, and is the 63 chip PN spreading code. Forrecovering of message sequence, we XOR the modulated signal with same type of 63 bit pseudo noise 63-bitsequences (PN). Here we also use a unite delay to find the original signal. The signal recovering findprocess is successfully done with some propagation delay which was obvious because of some noise& losses.IV. DPSK RECEIVERBefore dispreading, the receiving signal is modulated by Bi phase modulation technique then signal is Bi-phasesplit into two parallel paths and fed into two identical matched filters with the input to one having adelay of 63 chips. Figure 3 is the Simulink model of DPSK DSSS Receiver.The BPSK modulation technique is mathematically described as: (3)Where, is a data bitsCertain advantage of Bi-phase modulation is its improvement over OOK and PPM in BER phaseperformance, as the is 3 dB less than OOK for the same probability of bit error.
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963The probability of bit error for Bi-phase modulation assuming matched filter reception is: (4) Figure 3: Simulink model of DPSK ReceiverAnother benefit of Bi-phase modulation is its ability to eliminate spectral lines due to the change inpulse polarity. This aspect minimizes the amount of interference with conventional radio systems. A decrease in the overall transmitted power could also be attained, making Bi-phase modulationa popular technique in UWB systems when energy efficiency is a priority.Special type of Digital Matched Filter have used for recovering the transmitted message. This Digitalmatched filtering is a data processing routine which is optimal in term of signal-to-noise ratio (SNR).Specifically, it can be shown for an additive white Gaussian noise (AWGN) channel with nointerference that the matched filter maximizes the SNR for a pulse modulated system. To perform thisoperation, the received waveform is over sampled to allow for multiple samples per pulse period.Over sampling gives a more accurate representation of the pulse shape, which then produces betterresults using a digital matched filter . Correlation processing, another form of matched filtering, isoften used in the digital domain when dealing with white noise channels. The method for calculatingthe correlation output is the following: h (5)Where: Is the resulting correlation value Is the pulse periodN Is the number of samples in one pulse width Is the received sampled waveformh Is the known pulse waveformOne of the primary drawbacks of the matched filter receiver topology is the lack of knowledge of thepulse shape at the receiver due to distortion in the channel. Imperfect correlations can occur byprocessing the data with an incorrect pulse shape, causing degradation in correlation energy. There arenumerous ways to correct this problem, including an adaptive digital equalizer or matching a templateby storing multiple pulse shapes at the receiver. A more accurate approach is to estimate the pulseshape from the pilot pulses, which will experience the same channel distortion as the data pulses .This estimation technique is a promising solution to UWB pulse distortion.The outputs of the two matched filters are denoted by and are given by
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 = (6) = (7)Where the data is bit period, and is the autocorrelation function of the 63-chip pseudorandomsequence. Since there are exactly 63 chips per data bit the PN sequence is periodic with so (8)The two outputs of the matched filters are then mixed and then low pass filtered and the originalmessage is recovered. V. RESULTS AND DISCUSSIONFollowing the analytical approach presented in section 3 and 4, we evaluate the simulation result ofUWB technology. The simulations are performed using MATLAB , and the proof-of-concept isvalid as the BER curves are slightly worse than theoretical values for a perfectly matched receiver dueto the imperfections in the template caused by noise and aperture delay variation. Figure 4 shows theoriginal input message sequence that is generated from a PN sequence generator. Then, the incomingmessage are differentially encoded by using mixer and unite delay where each input data bit hasdelayed with Unit delay until the next one arrives where the delayed data bit is then mixed with thenext incoming data bit. Figure 5 shows such a differential output of the original message signal.Eventually the mixer will give the difference of the incoming data bit and the delayed data bit. Thedifferentially encoded data is then spread by a high-speed 63-bit pseudo noise (PN) Sequencegenerator which is generated by a 6th order maximal length sequence. This spreading process assignseach data bit its own unique code which is shown in Figure 6 allowing only a receiver with the samespreading to dispread the encoded data. Figure 4: Original Input message signal
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 Figure 5: Differential output of message signal Figure 6: Output waveforms of Simulink DPSK DSSS Transmitter Figure 7: Received Signal into DPSK DSSS Receiver after Dispreading
International Journal of Advances in Engineering & Technology, Nov 2011. ©IJAET ISSN: 2231-1963 Figure 8: Original recovered output signal For recovering of message sequence in the receiving part of DPSK DSSS transceiver, the modulated signal has been dispread using same type of 63-bit pseudo noise sequences and also use a unite delay to find the original signal. Before dispreading, the receiving signal is modulated by Bi-phase modulation technique then signal is split into two parallel paths and fed into two identical matched filters with the input to one having a delay of 63 chips. Among two split signal, one is spreading received message and another is Bi-phase modulated signal. The signal recovering process is successfully done with some propagation delay which was obvious because of some noise & losses. Figure 7 represented the received signal into DPSK DSSS receiver after dispreading and Figure 8 denoted original recovered messages.VI. FUTURE MODIFICATION AND WORK Designing of Transceiver was difficult and it took time to resolve the obstacles. The transmitter side was easy to build but it was hard to recover it in the receiver side due to spreading process. The recovered massage came with unwanted delays after dispreading it into DPSK DSSS receiver with the same 63-bit PN Sequence generator. To remove the delay a BPSK modulator and two special matched filters were used. This Matched filters are usually FIT filters which are designed in a special way to recover the original signal. Its have used for detecting the 6th order maximal length sequence and recovering the transmitted message. In the first matched filter the input signal was delayed due to correlating purpose. It was obtained by correlating the delayed signal with the received signal to detect the presence of the template in the received signal. This is equivalent to convolving the unknown signal with a conjugated time-reversed version of the template. As it is known that matched filter is the optimal linear filter for maximizing the signal to noise ratio in the presence of additive stochastic noise, use of more matched filter increase the possibilities of recovering the original signal and maximizing the signal to noise ratio depending on signal that is being transmitted. In this whole work we have discussed about UWB basics, modulation technique and transmitter circuits but all of those were limited in the design and system level. Though we have included some present important features and applications of UWB but implementation or circuit level simulation has not been done here. People who are interested in analyzing UWB technology can work on circuit level simulation.VII. CONCLUSIONS We have analyzed the performance of UWB technology using Time Hopping (TH) technique. The results from the system simulation were very encouraging for the UWB receiver design presented in this paper. It was also shown by increasing the number of averaged pilot pulses in the pilot-based matched filter template, better performance can be obtained, although the data rate will suffer. Performance for multipath was also examined (albeit for perfect synchronization) and was close to the theoretical values. Finally, use of the template sliding matched filter synchronization routine led to worse BER performance when compared with perfect synchronization results. Although these
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963simulations were specific in terms of data bits and number of multipath, other simulations weresuccessfully run on a smaller-scale varying these two parameters. The results of the system simulationgive a solid foundation for the design as a whole, but also will assist in the future with issues such asthe implementation of receiver algorithms within the PGA and determining timing limitations whenthe receiver is being constructed.REFERENCES . G. F. Ross, “Transmission and reception system for generating and receiving base-band duration pulse signals without distortion for short base-band pulse communication system,” US Patent 3,728,632, April 17, 1973. . Authorization of Ultra wideband Technology, First Report and Order, Federal Communications Commission, February 14, 2002. . C. R. Anderson, “Ultra wideband Communication System Design Issues and Tradeoffs,” Ph.D. Qualifier Exam, Virginia Polytechnic Institute and State University, May 12, 2003. . J. R. Foerster, “The performance of a direct-sequence spread ultra-wideband system in the presence of multipath, narrowband interference, and multiuser interference,” IEEE Conference on Ultra Wideband Systems and Technologies, May 2002. . C. R. Anderson, A. M. Orndorff, R. M. Buehrer, and J. H. Reed, “An Introduction and Overview of an Impulse-Radio Ultra wideband Communication System Design,” tech. rep., MPRG, Virginia Polytechnic Institute and State University, June 2004 . J. Han and C. Nguyen, “A new ultra-wideband, ultra-short monocycle pulse generator with reduced ringing,” IEEE Microwave and Wireless Components Letters, Vol. 12, No. 6, pp. 206-208, June 2002. . S. Licul, J. A. N. Noronha, W. A. Davis, D. G. Sweeney, C. R. Anderson, T. M. Bielawa, “A parametric study of time-domain characteristics of possible UWB antenna architectures,” submitted to IEEE Vehicular Technology Conference, February 2003. . M. Z. Win and R. A. Scholtz, “Impulse radio: how it works,” IEEE Communications Letters, Vol. 2, No. 1, pp. 10-12, January 1998. . J. Ibrahim “Notes on Ultra Wideband Receiver Design,” April 14, 2004.. Takahide Terada, Shingo Yoshizumi,Yukitoshi and Tadahiro kuroda, “Transceiver Circuits for Pulsed- Based Ultra Wideband” Department of Electrical Engineering, Keio University, Japan, Circuits and Systems, 2004. ISCAS 04.L. W. Couch II, Digital and Analog Communication Systems, 6th Edition, New Jersey: Prentice Hall, 2001.. S.M. Nabritt, M.Qahwash, M.A. Belkerdid, “Simulink Simulation of a Direct Sequence Spread Spectrum Differential Phase Shift Keying SAW Correlator”, Electrical and Comp. Engr. Dept, University of Central Florida, Orlando FL 32816, Wireless Personal Communications, The Kluwer International Series in Engineering and Computer Science, 2000, Volume 536, VI, 239-249. Alonso Morgado, Rocio del Rio and Jose M. de la Rosa, “A Simulink Block Set for the High-Level Simulation of Multistandard Radio Receivers”, Instituto de Microelectronica de Sevilla-IMSE-CNM (CSIC), Edif. CICA-CNM, Avda Reina Mercedes s/n, 41012-Sevilla, Spain. M. I. Skolnik, Introduction to Radar Systems, 3rd Edition. New York: McGraw- Hill, 2001.. Military Applications of Ultra-Wideband Communications, James W. McCulloch and Bob Walters. Matlab, Version 7 Release 13, The Mathworks, Inc., Natick, MA.. L. W. Couch II, Digital and Analog Communication Systems, 6th Edition, New Jersey: Prentice Hall, 2001.AuthorMohammad Shamim Imtiaz was born in Dhaka, Bangladesh in 1987. He received hisBachelor degree in Electrical and Electronic Engineering from Ahsanullah University ofScience and Technology, Dhaka, Bangladesh in 2009. He is working as a Part-TimeLecturer in the same university from where he has completed his Bachelor degree. Currentlyhe is focusing on getting into MSc Program. His research interests include digital system,digital signal processing, multimedia signal processing, digital communication and signalprocessing for data transmission and storage. There are other several projects he is workingon and they are “Comparison of DSSS Transceiver and FHSS Transceiver on the basis ofBit Error Rate and Signal to Noise Ratio”, “Mobile Charging Device using Human Heart Pulse”, “Analysis ofCMOS Full Adder Circuit of Different Area and Models”.
International Journal of Advances in Engineering & Technology, Nov 2011.©IJAET ISSN: 2231-1963 INTRODUCTION TO METASEARCH ENGINES AND RESULT MERGING STRATEGIES: A SURVEY Hossein Jadidoleslamy Deptt. of Information Tech., Anzali International Branch, University of Guilan, Rasht, IranABSTRACTMetaSearch is utilizing multiple other search systems to perform simultaneous search. A MetaSearch Engine(MSE) is a search system that enables MetaSearch. To perform a MetaSearch, user query is sent to multiplesearch engines; once the search results returned, they are received by the MSE, then merged into a singleranked list and the ranked list is presented to the user. When a query is submitted to a MSE, decisions are madewith respect to the underlying search engines to be used, what modifications will be made to the query and howto score the results. These decisions are typically made by considering only the user’s keyword query,neglecting the larger information need. The cornerstone of their technology is their rank aggregation method. Inother words, Result merging is a key component in a MSE. The effectiveness of a MSE is closely related to theresult merging algorithm it employs. In this paper, we want to investigate a variety of result merging methodsbased on a wide range of available information about the retrieved results, from their local ranks, their titlesand snippets, to the full documents of these results.KEYWORDS: Search, Web, MetaSearch, MetaSearch Engine, Merging, Ranking. I. INTRODUCTIONMetaSearch Engines (MSEs) are tools that help the user identify such relevant information. Searchengines retrieve web pages that contain information relevant to a specific subject described with a setof keywords given by the user. MSEs work at a higher level. They retrieve web pages relevant to a setof keywords, exploiting other already existing search engines. The earliest MSE is the MetaCrawlersystem that became operational since June 1995 [5,16]. Over the last years, many MSEs have beendeveloped and deployed on the web. Most of them are built on top of a small number of populargeneral-purpose search engines but there are also MSEs that are connected to more specialized searchengines and some are connected to over one thousand search engines [1,10]. In this paper, weinvestigate different result merging algorithms; The rest of the paper is organized as: In Section 2motivation, In Section 3 overview of MSE, Section 4 provides scientific principles of MSE, Section 5discusses about why do we use MSE, Section 6 discusses architecture of MSE, Section 7 describesranking aggregation methods, In Section the paper expresses key parameters to evaluating the rankingstrategies, Section 9 gives conclusions and Section 10 present future works.II. MOTIVATIONThere are some primarily factors behind developing a MSE, are:• The World Wide Web (WWW) is a huge unstructured corpus of information; MSE covers a larger portion of WWW;• By MSE we can have the latest updated information;• MSE increases the web coverage;• Improved convenience for users; 30 Vol. 1, Issue 5, pp. 30-40