Package fabrication technolog ynew


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Package fabrication technolog ynew

  1. 1. PACKAGE FABRICATION TECHNOLOGYSubmitted By: Prashant singh
  2. 2. INTRODUCTION• Packaging is ‘every technology’ required between the IC and thesystem.• Packaging is basically done at three levels- chip level, board leveland system level.• The grouping or combining of components, integrated circuits orchips into a unit and through holes on a multilayer circuit board.• Purpose of packaging→To provide electrical connections.→Extend the chip electrode pitch to the next level of packaging.→To protect the chip from mechanical & environmental stress.→To provide a proper thermal path for the heat that the chipdissipates.
  3. 3. INTRODUCTIONMajor functions of Packaging. Signal distribution Power distribution Heat dissipation (cooling) Protection (mechanical,chemical, electromagnetic)
  4. 4. TYPES OF PACKAGE FABRICATIONTECHNOLOGIES• The die will be packaged in either a Through-Hole or SurfaceMount package type. The package technology will be of two type:→ Refractory ceramic technology(for mature product where lowcosts is critical but hermetic seal is still required)→ Molded plastic technology(for matured products where cost isimportant)
  5. 5. Contd…. On the basis of Package-to-Board attachment:1.In Surface mount package:→ Distance between leads are reduced.→ Over all package size reduced.→ Require skilled worker and expensive tools.2.In Through-hole package:→ Refers to the mounting scheme that involves the use of leads on thecomponents.→ That are inserted into holes drilled in (PCB) and soldered to pads onthe opposite side either by manual assembly by hand placement.
  6. 6. Contd…3. SINGLE CHIP PACKAGES→ supports a single microelectronic device→ low cost4. MULTICHIP PACKAGES→ If the package contains more than one activedevice.→ high performance→ packaging at very low cost.
  7. 7. Contd…On the basis of chip-to-packageinterconnection: Wirebond Tap automated bonded(TAB) Flip Chip Chip on board
  8. 8. Wirebond• The process of providing electrical connectionbetween the silicon chip and the external leads of thesemiconductor device using very fine bonding wires.• Wire bonding is generally considered the most cost-effective and flexible interconnect technology.• The wire used in wirebonding is usually made eitherof gold (Au) or aluminum (Al)
  9. 9. Tap automated bonded(TAB)• It is the process of mounting a die on a flexibletape made of polymer material, such aspolyimide.• The mounting is done such that the bondingsites of the die, usually in the form of bumpsor balls made of gold or solder, are connectedto fine conductors on the tape, which providethe means of connecting the die to thepackage or directly to external circuits.
  10. 10. Flip Chip• In flip-chip joining there is only one level ofconnections between the chip and the circuit board.• The length of the electrical connection between thechip and substrate can be minimized by placing solderbumps on the die.• Advantages:Smaller sizeIncreased functionalityImproved performanceLow cost
  11. 11. • Disadvantages:· Challenge for PCB technology as pitches become very fine andbump counts are high.· For inspection of hidden joints an X-ray equipment is needed.· Weak process compatibility with SMT.· Handling of bare chips is difficult.· High assembly accuracy needed.· With present day materials underfilling process with aconsiderable curing time is needed.· Low reliability for some substrates.· Repairing is difficult or impossible
  12. 12. Chip on board• It refers to the semiconductor assembly technologywherein the microchip or die is directlymounted onand electrically interconnected to its finalcircuit board, instead of undergoing traditionalassembly or packaging as an individual IC.• simplifies the over-all process of designing andmanufacturing.• The general term for COB technology isactually direct chip attachment.
  13. 13. • Advantages:1) reduced space requirements2) reduced cost3) better performance due to decreasedinterconnection lengths and resistances4) higher reliability due to better heat distributionand a lower number of solder joints5) shorter time-to-market
  14. 14. Comparision
  15. 15. 3-D Packaging Technology• A 3-D IC is a chip in which two or more layersof active electronics component areintegrated both vertically and horizontally intoa single circuit.• It saves spaces.• This is also known as system in packages(SIP)
  16. 16. There are four ways to build:• Monolithic: Electronic components and their connectionsare built in layers on a single semiconductor wafer, whichis then diced into 3D ICs. There is only onesubstrate, hence no need foraligning, thinning, bonding, or through-silicon vias.• Wafer-on-Wafer: Electronic components are built on twoor more semiconductor wafers, which are thenaligned, bonded, and diced into 3D Ics.• Die-on-Wafer: Electronic components are built on twosemiconductor wafers. One wafer is diced; thesingulated dice are aligned and bonded onto die sites ofthe second wafer.• Die-on-Die: Electronic components are built on multipledice, which are then aligned and bonded.
  17. 17. • Advantage:
  18. 18. REFRENCES•
  19. 19. Thank you