Vlsi Education In India


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Presented at Inauguration of Ganapati VLSI Laboratory at BESU, Kolkata

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  • Post Presentation: Presented to the seminar “VLSI Education & Research – The Present Perspective” at Purabi Das School of Information Technology, Bengal Engineering & Science University, Kolkata on the occasion of the inauguration of Ganapati Sengupta VLSI Laboratory on May 13, 2005. Dignitaries present included Prof. N Banerjee, VC of BESU, Prof. Barat, Prof. Hafizur Rahaman, Prof. Biplab Sikdar, Prof. P Pal Chausdhuri, Prof. Indranil Sengupta, Prof. Bhargab Bhattacharya, Prof. Susanta Sen and Mr. Ashish Auddy. Besides there were about 40-50 other teachers and students.
  • Post Presentation: Prof. Pal Chaudhuri felt this was a motivated comment.
  • Post Presentation: Some were upset with cost advantage as the first and foremost reason. Patriotically they felt, “Indian were just better”. Good to see such pride – I also wish this were true. For many, service attitude angle was a new idea.
  • Post Presentation: Explained that VLSI business has started moving to Russia and Armenia.
  • Post Presentation: Had a quick run-through on SMDP. Most people were already aware.
  • Post Presentation: Most people found it difficult to believe these projections. We need to figure out (possibly publish) a report with some detailed analysis of where these high numbers are coming from.
  • There were questions on what VSI sees as “Talent in VLSI” and we came up with this list jointly.
  • Post Presentation: Some of the senior professors wanted to rank Research above Pool Generation. I defended that both are important and the quantity is needed in the industry to support quality.
  • On March 12, 2005, we had a 2.5-hr debate on the topic of talent generation at the VSI Workshop on VLSI Education at Jaipur. I gave a background on the survey we are conducting – one survey has gone out to educational departments and another has gone out to industry. We are also doing an electronic poll.
  • There was some heated debate on what universities can do in this direction and several people asked what “industry ready” means. I took a shot on what “industry ready” means for the industry. An interesting item that came from a Professor from Cochin. He said – up to class 12, they are in a competition mode and it is not easy to turn them to “cooperative” mode.
  • Post Presentation: Explaining “Industry-Ready” concept to an academic crowd is a challenge. For example, someone asked what are soft skills and why should they be needed? After the talk one professor even commented that academia should not get into these nitty-gritty and rather focus on learning theory. I think VSI need to take a focused initiative to educate our friends in academia about “Industry-Readiness”.
  • Post Presentation: Teacher wanted to understand how can they learn of the Design Flow. There is good source. I agree that this is a challenge. Possibly ISA’s UGI kind of initiative can quench that.
  • We had an open debate and other than 2 Professors, everyone else took the “agree” stand. We tried to identify the reasons.
  • We had an open debate and other than 2 Professors, everyone else took the “agree” stand. We tried to identify the reasons.
  • Post Presentation: I explained that this is a sample – I am not showcasing the specific initiative. Expectedly, people wants to see more of such initiatives.
  • Post Presentation: Again this was presented as an example of change.
  • Post Presentation: There were questions on VSI and how can it help students. We need to give better shape and projection to whatever VSI does / plans.
  • Post Presentation: This was information to most. There was very high interest to know what’s really going on.
  • Post Presentation: Overall we spent about 30 minutes on UGI and there were number of queries from various quarters. I saw a high level of interest and expectation from the participants on this UGI program. We’ll need to keep this mind as and when we launch this.
  • Post Presentation: The universities that have some industry EDA tools felt that it is rather tough to keep the tools up and running. Support loops with companies are usually long. They would like to see some support infrastructure & initiative from ISA-UGI on this.
  • Post Presentation: Many universities present wanted to know of the memberships – how to start and when? I have advised them to keep an eye on the website.
  • Post Presentation: Thank you.
  • Vlsi Education In India

    1. 1. May 13, 2005 VLSI Education in India Dr. Partha Pratim Das Interra Systems (India) Pvt. Ltd.
    2. 2. “ India does not need a fabrication facility, but it does need a training program for chip design.” – Jaswinder S. Ahuja, Corporate VP & MD, Cadence India. EETimes, Nov 03, 2004
    3. 3. Agenda <ul><li>VLSI Chronology </li></ul><ul><li>India Advantage </li></ul><ul><li>Government Initiatives </li></ul><ul><li>Jaipur Workshop on VLSI Education </li></ul><ul><li>Actors for Change </li></ul>
    4. 4. VLSI Education and R&D – A Chronology <ul><li>1979-80 </li></ul><ul><ul><li>“ Introduction to VLSI System Design” by Mead and Conway in 1980 </li></ul></ul><ul><ul><li>“ VLSI Design” courses based on MC by some IITs. </li></ul></ul><ul><ul><li>Adoption of the book’s methodology by TIFR and CEERI for their design R&D work. </li></ul></ul><ul><ul><li>Concurrently, MOS technology development related R&D work was being pursued at TIFR, CEERI and IITs. </li></ul></ul>
    5. 5. VLSI Chronology <ul><li>1980-81 </li></ul><ul><ul><li>Setting up of SCL and the “VLSI Task Force” by GoI. </li></ul></ul><ul><li>1981-82 </li></ul><ul><ul><li>First commercial interactive layout design system (among academic and R&D institutes) installed at CEERI’s Delhi Centre under UNDP support. </li></ul></ul><ul><li>Mid 1980s </li></ul><ul><ul><li>Evolution of focused integrated electronics and circuits oriented ME/MTech degree programmes at IITs. </li></ul></ul>
    6. 6. VLSI Chronology <ul><li>1985-86 </li></ul><ul><ul><li>First multinational company, TI, sets up its R&D Centre in India (for EDA tool development and software verification). </li></ul></ul><ul><li>1986-87 </li></ul><ul><ul><li>First real application of Mead-Conway methodology to design a full custom LSI processor – the PWM processor for variable frequency AC drives at CEERI, Pilani together with UCL, Belgium (under UNDP support). </li></ul></ul>
    7. 7. VLSI Chronology <ul><li>1987-88 </li></ul><ul><ul><li>Setting up of Academic and R&D VLSI Design Centres at IITs and CEERI under an initiative of DoE. </li></ul></ul><ul><ul><li>Academic Centres equipped with </li></ul></ul><ul><ul><ul><li>Sun workstations </li></ul></ul></ul><ul><ul><ul><li>VTI tools (an integrated tool-set for full-custom and semi-custom logic, circuit and layout design and verification) </li></ul></ul></ul><ul><ul><ul><li>Semi-custom design tool “Vinyas” developed by ITI that ran on a particular brand of PC (the OMC PC-286 and PC-386). </li></ul></ul></ul><ul><ul><li>10 industrial VLSI Design Centres were also set up by DoE – 5 under the charge of SCL and 5 under the charge of ITI. </li></ul></ul>
    8. 8. VLSI Chronology <ul><li>1987-88 </li></ul><ul><ul><li>Start of VLSI Design Workshop and International Conference. </li></ul></ul><ul><li>1989 </li></ul><ul><ul><li>VSI Formed to foster education and research in VLSI </li></ul></ul>
    9. 9. VLSI Chronology <ul><li>Early 1990s </li></ul><ul><ul><li>Successful chip design-developments by academic-R&D design centers : </li></ul></ul><ul><ul><ul><li>CEERI (for C-DoT) using VTI tools and VTI foundry. </li></ul></ul></ul><ul><ul><ul><li>IIT-Kharagpur and Jadavpur University using Vinyas tools and ITI foundry. </li></ul></ul></ul><ul><li>1994 </li></ul><ul><ul><li>Introduction of VHDL in the Indian academia and R&D. </li></ul></ul>
    10. 10. VLSI Chronology <ul><li>1997 </li></ul><ul><ul><li>Start of the first industry-sponsored MTech programme – “VLSI Design, Tools and Technologies” (VDTT) programme at IIT-Delhi sponsored by Philips and co-sponsored by a number of other industries. </li></ul></ul><ul><ul><li>Subsequently, TCS supports a MTech degree programme at IIT-Bombay. </li></ul></ul>
    11. 11. VLSI Chronology <ul><li>1998 </li></ul><ul><ul><li>DoE/MIT project – “ Special Manpower Development for VLSI Design and Related Software ” (SMDP): 9th plan. </li></ul></ul><ul><ul><li>Start of VLSI Design & Test Workshop (VDAT). </li></ul></ul><ul><li>Around 2000 & Beyond </li></ul><ul><ul><li>Boom in Design Industry with every major setting up or trying to set up shops in India </li></ul></ul>
    12. 12. VLSI Chronology <ul><li>2002 </li></ul><ul><ul><li>Advanced VLSI Laboratory at IIT Kharagpur in collaboration with Natsem, Intel, Synopsys. </li></ul></ul><ul><li>2004 </li></ul><ul><ul><li>ISA Launched </li></ul></ul><ul><li>2005 </li></ul><ul><ul><li>Ganapati VLSI Laboratory at BESU, Kolkata </li></ul></ul><ul><ul><li>VLSI Mtech Program at Radio Physics, CU, Kolkata </li></ul></ul>
    13. 13. VLSI Challenges – Evolution of VLSI Design Scenario 1.0 Mix of all into a Complex SoC 500 200 2005+ 0.9 RF, MEMS, SoC 100-200 100-200 2000 0.7 ASP, Analog, Mixed-Signal 30-50 30-50 1995 0.4 ASP, Chip-sets 10-15 10-12 1990 0.2 ASICs for Glue Logic 3-5 2-3 1985 MDI* Nature of Product Effort (Man-Years) Team Size (At Peak) Year
    14. 14. Where are we today? <ul><li>Many major design companies (count the subsidiary industry as well) have an India Center </li></ul><ul><li>Many more are working on a plan to setup </li></ul><ul><li>Every India Center has a very aggressive growth plan </li></ul>
    15. 15. Why India? <ul><li>India Operations were fuelled by </li></ul><ul><ul><li>Cost Advantages </li></ul></ul><ul><ul><li>Availability of an English speaking, electron-aware technical community </li></ul></ul><ul><li>India Operations have been supported by </li></ul><ul><ul><li>Positive Policy adoption </li></ul></ul><ul><ul><li>Improving service attitude </li></ul></ul>
    16. 16. Why not India? <ul><li>India Operations are being deterred by </li></ul><ul><ul><li>Spiraling Costs </li></ul></ul><ul><ul><li>Weakening Infrastructure </li></ul></ul><ul><ul><li>Aggressive poaching </li></ul></ul><ul><li>India is failing to deliver in </li></ul><ul><ul><li>Quality Man-Power </li></ul></ul><ul><ul><li>Quantity Man-Power </li></ul></ul>
    17. 17. Government Initiatives
    18. 18. SMDP: Phase I <ul><li>Started 1998 </li></ul><ul><li>Goals </li></ul><ul><ul><li>Market share for VLSI design from 0.5% to 5% </li></ul></ul>
    19. 19. SMDP: Phase I <ul><li>Salient Characteristics </li></ul><ul><ul><li>19 Participating Institutes </li></ul></ul><ul><ul><ul><li>7 Resource Center (RC), 12 Participating Institutes (PI) </li></ul></ul></ul><ul><ul><li>Rs. 15 Crores budget for 5 years </li></ul></ul><ul><ul><li>Training of Faculty at PI’s </li></ul></ul><ul><ul><li>Setting up VLSI Labs </li></ul></ul><ul><ul><li>Development of learning material </li></ul></ul><ul><ul><li>Teaching courses </li></ul></ul>
    20. 20. SMDP I: Man-Power <ul><li>Type-I: </li></ul><ul><ul><li>PhD in Microelectronics. </li></ul></ul><ul><li>Type-II: </li></ul><ul><ul><li>MTech (VLSI Design / Microelectronics) graduate from PIs – 250-300 / yr. </li></ul></ul><ul><li>Type-III: </li></ul><ul><ul><li>MTech graduate of other electronics disciplines (communications, control, . . . ) with at least two relevant VLSI courses. </li></ul></ul><ul><li>Type-IV: </li></ul><ul><ul><li>BTech of EE/ECE/CS exposed to two basic VLSI design courses. </li></ul></ul>
    21. 21. SMDP I: RC & PI <ul><li>IIT, Chennai </li></ul><ul><li>IIT, Delhi </li></ul><ul><li>IIT, Kanpur </li></ul><ul><li>IIT, Kharagpur </li></ul><ul><li>IIT, Bombay </li></ul><ul><li>IISc, Bangalore </li></ul><ul><li>CEERI, Pilani </li></ul><ul><li>North </li></ul><ul><ul><li>BHU-IT, Varanasi </li></ul></ul><ul><ul><li>IIT, Roorki </li></ul></ul><ul><ul><li>Thapar Institute of Tech. Patiala </li></ul></ul><ul><li>South </li></ul><ul><ul><li>KREC, Surathkal </li></ul></ul><ul><ul><li>REC, Warangal </li></ul></ul><ul><ul><li>PSG College of Technology, Coimbatore </li></ul></ul><ul><li>West </li></ul><ul><ul><li>MREC, Jaipur </li></ul></ul><ul><ul><li>VREC, Nagpur </li></ul></ul><ul><ul><li>Shri G.S. Inst. Of Tech. & Sc., Indore </li></ul></ul><ul><li>East </li></ul><ul><ul><li>Bengal Engineering College, Howrah </li></ul></ul><ul><ul><li>Jadavpur University, Kolkata </li></ul></ul><ul><ul><li>REC, Rourkela </li></ul></ul>
    22. 22. SMDP: Phase II <ul><li>Report prepared by TCS & IIT Bombay </li></ul><ul><li>Promoting Microelectronic Education – The Indian Imperative </li></ul><ul><li>32 Institutes Identified in report </li></ul><ul><ul><li>7 RC </li></ul></ul><ul><ul><li>25 PI </li></ul></ul><ul><li>Budget: Rs. 50 Crores / 5 Years </li></ul>
    23. 23. SMDP: Phase II <ul><li>Resource Centers (7) </li></ul><ul><ul><li>IIT Chennai, Delhi, Kharagpur, Mumbai & Kanpur, IISc Bangalore, CEERI Pilani </li></ul></ul><ul><li>Participating Institutes (25) </li></ul><ul><ul><li>IIT Roorkee & Guwahati, Warangal, Surathkal, Tiruchirapalli, Rourkela, Motilal Nehru REC, Allahabad, B.R. Ambedkar REC, Jalandhar, Surat Nagpur, Hamirpur, Silchar, Kurukshetra, Calicut, Jaipur, Durgapur, Bhopal, Srinagar, Jamshedpur BEC, Jadavpur, G.S. I.T.S, Indore, Thapar, Patiala BHU-IT, PSG, Coimbatore </li></ul></ul>
    24. 24. SMDP: Phase II <ul><li>Salient Characteristics </li></ul><ul><ul><li>Continued VLSI Lab setup support (EDA SW, HW) </li></ul></ul><ul><ul><li>Support for hiring 2 faculty members / institute </li></ul></ul><ul><ul><li>Travel support for presenting papers </li></ul></ul><ul><ul><li>Leverage SCL India Chip program </li></ul></ul><ul><ul><li>Model Course Curriculum </li></ul></ul><ul><ul><li>Access to IEEE Explore </li></ul></ul><ul><ul><li>Plan for national website for public domain EDA software </li></ul></ul>
    25. 25. Academic Estimates <ul><li>Institutes offering ME/MTech degree in VLSI / Microelectronics discipline </li></ul><ul><ul><li>6 (IITs and IISc) </li></ul></ul><ul><ul><li>10 (NITs and Other) Institutes. </li></ul></ul><ul><li>Estimated Man-Power </li></ul><ul><ul><li>Total Core Faculty Pool Size : 60-70 </li></ul></ul><ul><ul><li>Type-I Manpower/year : 8-12 </li></ul></ul><ul><ul><li>Type-II Manpower/year : 250-300 </li></ul></ul><ul><ul><li>Type-III Manpower/year : 150-200 </li></ul></ul><ul><ul><li>Type-IV Manpower/year : 1,000-1,200 </li></ul></ul>
    26. 26. Widening Gap
    27. 27. VSI Opinion Polls <ul><li>How many B.Tech/B.E. students with specialization in Semiconductors/VLSI do you think will be needed on an annual basis by 2010? </li></ul><ul><ul><li>Less than 5000 </li></ul></ul><ul><ul><li>5000 – 7500 </li></ul></ul><ul><ul><li>7500 – 10000 </li></ul></ul><ul><ul><li>10,000 or more </li></ul></ul>
    28. 28. VSI Opinion Polls <ul><li>How many B.Tech/B.E. students with specialization in Semiconductors/VLSI do you think will be needed on an annual basis by 2010? </li></ul><ul><ul><li>Less than 5000: 23% </li></ul></ul><ul><ul><li>5000 – 7500: 35% </li></ul></ul><ul><ul><li>7500 – 10000: 16% </li></ul></ul><ul><ul><li>10,000 or more: 24% </li></ul></ul>
    29. 29. VSI Opinion Polls <ul><li>How many PG students with specialization in Semiconductors/VLSI do you think will be needed (annually) by 2010? </li></ul><ul><ul><li>Less than 500 </li></ul></ul><ul><ul><li>500 – 1000 </li></ul></ul><ul><ul><li>1000 – 2000 </li></ul></ul><ul><ul><li>2000 – 3000 </li></ul></ul><ul><ul><li>More than 3000 </li></ul></ul>
    30. 30. VSI Opinion Polls <ul><li>How many PG students with specialization in Semiconductors/VLSI do you think will be needed (annually) by 2010? </li></ul><ul><ul><li>Less than 500: 1% </li></ul></ul><ul><ul><li>500 – 1000: 12% </li></ul></ul><ul><ul><li>1000 – 2000: 26% </li></ul></ul><ul><ul><li>2000 – 3000: 16% </li></ul></ul><ul><ul><li>More than 3000: 43% </li></ul></ul>
    31. 31. VSI Opinion Polls <ul><li>What is the number of B.Tech students graduating today with some specialization in Semiconductors/VLSI to take up a profession in the VLSI area? </li></ul><ul><ul><li>Less than 1000 </li></ul></ul><ul><ul><li>1000 – 2000 </li></ul></ul><ul><ul><li>2000 – 3000 </li></ul></ul><ul><ul><li>3000 – 4000 </li></ul></ul><ul><ul><li>More than 4000 </li></ul></ul>
    32. 32. VSI Opinion Polls <ul><li>What is the number of B.Tech students graduating today with some specialization in Semiconductors/VLSI to take up a profession in the VLSI area? </li></ul><ul><ul><li>Less than 1000: 52% </li></ul></ul><ul><ul><li>1000 – 2000: 13% </li></ul></ul><ul><ul><li>2000 – 3000: 23% </li></ul></ul><ul><ul><li>3000 – 4000: 2% </li></ul></ul><ul><ul><li>More than 4000: 7% </li></ul></ul>
    33. 33. VSI Opinion Polls <ul><li>What is the number of M.Tech students graduating today with specialization in Semiconductors/VLSI to take up a profession in VLSI? </li></ul><ul><ul><li>Less than 500 </li></ul></ul><ul><ul><li>500 – 1000 </li></ul></ul><ul><ul><li>More than 1000 </li></ul></ul>
    34. 34. VSI Opinion Polls <ul><li>What is the number of M.Tech students graduating today with specialization in Semiconductors/VLSI to take up a profession in VLSI? </li></ul><ul><ul><li>Less than 500: 66% </li></ul></ul><ul><ul><li>500 – 1000: 27% </li></ul></ul><ul><ul><li>More than 1000: 6% </li></ul></ul>
    35. 35. Jaipur Workshop on VLSI Education Compiled by: Dr. C P Ravikumar, TI & Secy, VSI March 12, 2005
    36. 36. What constitutes “Talent in VLSI” ? <ul><li>Device Physics, VLSI Technology, Fabrication </li></ul><ul><li>Transistor-level Circuit Knowledge </li></ul><ul><li>Analog and mixed signal design, RF </li></ul><ul><li>Design Digital Design (HDL) </li></ul><ul><li>Synthesis </li></ul><ul><li>Verification (Simulation, Formal Verification, …) </li></ul><ul><li>EDA </li></ul><ul><li>DFT </li></ul><ul><li>Applications </li></ul><ul><ul><li>Signal Processing </li></ul></ul><ul><ul><li>Networks </li></ul></ul><ul><ul><li>Embedded Systems </li></ul></ul>
    37. 37. Goals of University – Industry Interaction <ul><li>Talent Pool Generation – growing the right kind of talent </li></ul><ul><ul><li>VLSI is a fast growing field and curriculum updates cannot keep pace </li></ul></ul><ul><li>Research Collaboration </li></ul><ul><ul><li>Funded projects </li></ul></ul><ul><ul><li>Start-ups </li></ul></ul><ul><ul><li>Papers </li></ul></ul><ul><ul><li>Patents </li></ul></ul>
    38. 38. What is Industry saying? <ul><li>Insufficient talent pool – quality is lacking </li></ul><ul><ul><li>Graduating students are not “industry-ready” </li></ul></ul><ul><ul><li>Productivity Issue </li></ul></ul><ul><ul><li>Related to attrition </li></ul></ul><ul><ul><li>Hiring experienced persons from outside India </li></ul></ul><ul><ul><li>Motivation factor </li></ul></ul><ul><ul><li>Should we rework the curriculum? </li></ul></ul>
    39. 39. What is Industry saying? <ul><li>Public-domain tools are enough </li></ul><ul><li>Emphasize small projects and assignments in the course </li></ul><ul><li>Placement is disorganized – students interested in electronics are getting placed in software jobs </li></ul><ul><ul><li>Target M.Tech and Ph.D. programs? </li></ul></ul><ul><ul><li>Students graduating from M.Tech programs are not industry ready </li></ul></ul>
    40. 40. VSI Surveys <ul><li>Numbers – where are we today and where are we headed? </li></ul><ul><ul><li>Electronics and Communications </li></ul></ul><ul><ul><li>Computer Science/Engineering </li></ul></ul><ul><li>Both B.Tech level and Specialized man power (M.Tech) </li></ul><ul><li>Quality of man power </li></ul><ul><li>Survey results available from vdat yahoogroups </li></ul>
    41. 41. Projected Requirements <ul><li>3000 persons required in 2006 </li></ul><ul><ul><li>500 experienced </li></ul></ul><ul><ul><li>2500 fresh engineers (100 companies) </li></ul></ul><ul><ul><ul><li>150 M.Techs from IIT </li></ul></ul></ul><ul><ul><ul><li>150 B.Techs from IIT </li></ul></ul></ul>
    42. 42. What’s “Industry Ready”? <ul><li>Fundamentals </li></ul><ul><ul><li>Frequently not answered questions: setup and hold delay, RC circuit operation, … </li></ul></ul><ul><li>Ability to grasp concepts </li></ul><ul><ul><li>If the student has understood what was taught in the curriculum, (s)he can be trained </li></ul></ul><ul><ul><li>Training is different from education </li></ul></ul><ul><ul><li>Industry does not expect VHDL and Verilog knowledge from students! That would be a bonus. </li></ul></ul>
    43. 43. What’s “Industry Ready”? <ul><li>Applying concepts </li></ul><ul><li>Basic computer skills </li></ul><ul><ul><li>At least one programming language, OS skills, … </li></ul></ul><ul><ul><li>Bonus: Exposure to TCL/TK, Perl, etc. </li></ul></ul><ul><li>Soft skills (team work, …) </li></ul>
    44. 44. What should be emphasized, what should not <ul><li>To be emphasized </li></ul><ul><ul><li>CMOS circuit design </li></ul></ul><ul><ul><li>Electronic Design Flow </li></ul></ul><ul><ul><li>Effect of Interconnects </li></ul></ul><ul><ul><li>Design Timing </li></ul></ul><ul><ul><li>Test and Verification </li></ul></ul><ul><li>Emphasize less </li></ul><ul><ul><li>BJT can be emphasized less </li></ul></ul><ul><li>Electives </li></ul>
    45. 45. Debate – “Talent that is coming out of the Universities is not industry-ready” <ul><li>Strongly Disagree </li></ul><ul><ul><li>The curriculum is already strong on fundamentals </li></ul></ul>
    46. 46. Debate – “Talent that is coming out of the Universities is not industry-ready” <ul><li>Strongly Agree </li></ul><ul><ul><li>Curriculum cannot be changed too often </li></ul></ul><ul><ul><li>Less resources are available for faculty recruitment, lab infrastructure, tools </li></ul></ul><ul><ul><li>Exposure to circuit design and semiconductors lacking (both students and faculty) </li></ul></ul><ul><ul><li>Students see more glamour in software/There are more opportunities in software </li></ul></ul><ul><ul><li>“ Readymade kits” </li></ul></ul><ul><ul><li>Less industry interaction (visits from industry and faculty internship programs) </li></ul></ul><ul><ul><li>Lack of motivation (device physics is less attractive) </li></ul></ul><ul><ul><li>Exams give little choice of learning </li></ul></ul>
    47. 47. Academia’s Concerns <ul><li>If industry wants high quality, let them pay for it </li></ul><ul><li>Indian semiconductor/VLSI industries are not coming forward for Project training, ideas, data, guidance </li></ul><ul><li>Take faculty for deputation </li></ul><ul><li>Need long-term projects </li></ul><ul><li>Does any Indian semiconductor industry even want anything from the academia (other than students?) </li></ul><ul><li>Make this a win-win situation for all concerned (students, industry AND faculty) </li></ul>
    48. 48. Actors for Change
    49. 49. Actors for Change <ul><li>Government </li></ul><ul><li>Industry </li></ul><ul><li>Academia </li></ul><ul><li>VSI – VLSI Society of India </li></ul><ul><li>ISA – India Semiconductor Association </li></ul>
    50. 50. IT WB <ul><li>VLSI Design Park </li></ul><ul><ul><li>Near Kharagpur IIT Campus, Kolkata </li></ul></ul><ul><ul><li>100 to 150 acres of land </li></ul></ul><ul><ul><li>20 to 30 million dollar in investment. </li></ul></ul><ul><ul><li>To house companies in development, manufacturing and assembly line. </li></ul></ul><ul><ul><li>Directly linked with R&D at IIT </li></ul></ul><ul><ul><li>Joint Proposer - Mr. Deb Gupta, CTO of APSTL advanced Packaging & System Technology Laboratories, USA and an IIT Alumni. </li></ul></ul><ul><ul><li>The state government is facilitating for </li></ul></ul><ul><ul><ul><li>Funds - Meetings with Consul General of Japan, Kolkata and Embassy of Japan, Delhi (by APSTL, US, IIT, Kharagpur and IT WB) have been held. </li></ul></ul></ul><ul><ul><ul><li>Land – considering favorably </li></ul></ul></ul>
    51. 51. Academia-Industry JV <ul><li>BITS-RIT APEX (Applied research and professional Excellence): </li></ul><ul><ul><li>BITS Pilani </li></ul></ul><ul><ul><li>New York based Rochester Institute of Technology (RIT) </li></ul></ul><ul><ul><li>Indian Semiconductor Association (ISA). </li></ul></ul><ul><ul><li>Applied research lab in Bangalore </li></ul></ul><ul><ul><li>Focus on cutting edge semi-conductor research and would also have basic and advanced courses. </li></ul></ul><ul><ul><li>BITS is investing around Rs 1.5 crore into the center </li></ul></ul><ul><ul><li>Come up in July. </li></ul></ul>Indicative – Several other initiatives coming up
    52. 52. VSI – VLSI Society of India
    53. 53. VSI: VLSI Society of India <ul><li>The purpose of VSI is to contribute and promote the advancement of all aspects of VLSI technology, primarily in India: </li></ul><ul><ul><li>To promote all areas relating to VLSI field - materials, technology, process, design, application CAD/Design Automation, VLSI architectures, education, policies, etc. </li></ul></ul><ul><ul><li>To bring wide class of professionals from process technologies to specialists in VLSI architectures on one platform. </li></ul></ul><ul><ul><li>To provide impetus to infrastructural growth for technology development.  </li></ul></ul><ul><ul><li>To provide impetus to human resources development. </li></ul></ul><ul><ul><li>Conduct periodic seminars/conferences/workshops in this area. </li></ul></ul><ul><ul><li>To bring out quality publications. </li></ul></ul><ul><ul><li>To continually formulate national goals for a sustained and vibrant VLSI industry. </li></ul></ul><ul><ul><li>To evolve standards and frameworks for achieving effective synergy. </li></ul></ul><ul><ul><li>To establish relations with other similar associations, national or international. </li></ul></ul>
    54. 54. VSI Activities <ul><li>Regular Activities </li></ul><ul><ul><li>VLSI Design Conference (every Jan) </li></ul></ul><ul><ul><li>VLSI Design and Test Symposium (every Aug) </li></ul></ul><ul><ul><li>VLSI Education Day (every Aug) </li></ul></ul><ul><li>Other Activities </li></ul><ul><ul><li>Curriculum Discussions, Surveys </li></ul></ul><ul><ul><li>Focused workshops (Low Power, Memory, DFT, ...) </li></ul></ul><ul><ul><li>VLSI Education Workshops </li></ul></ul><ul><li>Publications </li></ul><ul><ul><li>VSI Newsletter </li></ul></ul><ul><ul><li>Journal of the VSI </li></ul></ul>
    55. 55. VED: VLSI Education Day <ul><li>Observed as a part of VDAT every year since 2000 </li></ul><ul><li>The intent of VED is to bring together VLSI professionals in academia and industry and promote education, research and development in all aspects of VLSI in India. </li></ul><ul><li>VLSI Education Day includes programs such as: </li></ul><ul><ul><li>Keynote speeches from eminent personalities </li></ul></ul><ul><ul><li>Panel Discussion on topics related to VLSI Education </li></ul></ul><ul><ul><li>Invited talks from VLSI professionals </li></ul></ul><ul><ul><li>Short tutorials on current topics </li></ul></ul><ul><ul><li>Book Exhibition, IEEE/ACM booths, University Booth </li></ul></ul><ul><ul><li>Poster Paper presentations from Indian Colleges </li></ul></ul>
    56. 56. ISA – India Semiconductor Association
    57. 57. ISA: India Semiconductor Association <ul><li>Setup in Nov. 2004 at IT.com at Bangalore </li></ul><ul><li>ISA is the premier national-level body for the semiconductor technology-driven industry in India. It’s a new entity and truly a global body with the active participation of semiconductor companies from the leading markets, including the US, EU and Asia. </li></ul><ul><li>Vision </li></ul><ul><ul><li>To establish India as the preferred global hub for excellence in creation of semiconductor products through technology leadership </li></ul></ul>
    58. 58. ISA: Mission & Objectives <ul><li>The primary objective of ISA is to act as a catalyst for the growth of the semiconductor industry in India. Other objectives include: </li></ul><ul><li>Create global awareness for Indian semiconductor industry outside of the generic “IT” umbrella  </li></ul><ul><li>Create a win-win interaction amongst Semiconductor product and services companies, Government, Academia, VCs and Industry bodies </li></ul><ul><li>Create an enabling ecosystem that catalyzes industry’s growth and leadership </li></ul><ul><li>Enhance Operational Efficiency </li></ul><ul><li>Identification of Investment opportunities </li></ul><ul><li>Foster active collaboration between Industry and Universities to further expand the available world-class Semiconductor talent pool </li></ul><ul><li>Drive technology vision for the Semiconductor industry </li></ul>
    59. 59. ISA: University Gateway Initiative (UGI) <ul><li>Objectives </li></ul><ul><ul><li>Invigorate research in semiconductors </li></ul></ul><ul><ul><ul><li>Technology Leadership </li></ul></ul></ul><ul><ul><li>Create sustainable tread-mill for talent generation </li></ul></ul><ul><ul><ul><li>Growth of India Semiconductor Industry </li></ul></ul></ul>
    60. 60. ISA: UGI: Focus <ul><li>Focus Areas </li></ul><ul><ul><li>Research </li></ul></ul><ul><ul><li>Design Support & Fab access </li></ul></ul><ul><ul><li>Student projects </li></ul></ul><ul><ul><li>Faculty training, support, exchange </li></ul></ul><ul><ul><li>Placement </li></ul></ul><ul><ul><li>Curriculum / Course ware development </li></ul></ul><ul><ul><li>VSI, MCIT collaboration </li></ul></ul><ul><li>Membership </li></ul><ul><li>Mentorship </li></ul><ul><li>Other Items </li></ul>
    61. 61. ISA: UGI: Research <ul><li>Research papers in international conferences </li></ul><ul><ul><li>An award system to create incentives </li></ul></ul><ul><ul><li>Travel grants for international conferences </li></ul></ul><ul><li>Create a SRC like forum </li></ul><ul><ul><li>Participation from Industry & Universities </li></ul></ul><ul><ul><li>Identify key thrust areas of research </li></ul></ul><ul><ul><li>Invite & fund research proposals </li></ul></ul><ul><li>Publish a list of interesting research problems </li></ul><ul><ul><li>Similar to top 10 problems in Physical Design from ISPD </li></ul></ul><ul><li>Arrange visits / talks from leading researchers </li></ul>
    62. 62. ISA: UGI: Research <ul><li>Technnovation Initiative </li></ul><ul><ul><li>‘ ISA-Technnovation Shield’ </li></ul></ul><ul><ul><ul><li>Awarded every year to an Academic Institution that excels in Technology Innovations in semiconductors and related areas </li></ul></ul></ul><ul><ul><li>‘ ISA-Technnomentor of the Year’ </li></ul></ul><ul><ul><ul><li>Awarded every year to a faculty member for outstanding contribution in Technology Innovations in semiconductors and related areas </li></ul></ul></ul><ul><ul><li>‘ ISA-Technnovators of the Year’ </li></ul></ul><ul><ul><ul><li>Awarded every year to top 5 students in the country with outstanding performance in technology innovation in semiconductors and related areas </li></ul></ul></ul><ul><li>Patents and Research Publications as the yard sticks for technology innovation </li></ul>
    63. 63. ISA: UGI: Research <ul><li>Technnovation Initiative </li></ul><ul><ul><li>‘ ISA-Technnowhizkids of the Year’ </li></ul></ul><ul><ul><ul><li>Semiconductor Industry aims to emerge as future for our nation and so are the young children in the school </li></ul></ul></ul><ul><ul><ul><li>The idea is to catch them young </li></ul></ul></ul><ul><ul><ul><li>ISA will partner with leading assessment institutions to create a nationwide contest on ‘innovative thinking’ </li></ul></ul></ul><ul><ul><ul><li>Top 5 school children will be awarded ISA Technnowhizkids of the Year Award </li></ul></ul></ul><ul><ul><li>‘ ISA PhD Fellowships’ </li></ul></ul><ul><ul><ul><li>An incentive program to support top talent to pursue research in India </li></ul></ul></ul><ul><ul><ul><li>Will help fund the core research and provide financial scholarships to PhD students and their guides </li></ul></ul></ul><ul><ul><ul><li>Will facilitate research collaboration with other nations in the world </li></ul></ul></ul>
    64. 64. ISA: UGI: Research <ul><li>Technnovation Initiative </li></ul><ul><ul><li>Life Time Achievement Award for Technnovation </li></ul></ul><ul><ul><ul><li>Awarded to a distinguished academician / researcher for significant contribution to Technology Innovations in India in the field of semiconductors and related areas </li></ul></ul></ul>
    65. 65. ISA: UGI: Design Activity – Support <ul><li>EDA Software </li></ul><ul><ul><li>Leverage Infrastructure created by SMDP/MCIT </li></ul></ul><ul><ul><li>Work with MCIT to create a web portal for public domain tools </li></ul></ul><ul><ul><li>ISA Facilitate EDA software acquisition for members </li></ul></ul><ul><ul><li>(60+ universities already have access to EDA tools) </li></ul></ul><ul><li>Design kits </li></ul><ul><ul><li>Cell Libraries, I/O’s, memory compilers, process models </li></ul></ul><ul><ul><ul><li>Fabs (SCL, TSMC), I/P (Artisan, Virage) </li></ul></ul></ul><ul><ul><li>Design flows & Methodology </li></ul></ul><ul><ul><li>Training to use the infrastructure </li></ul></ul><ul><ul><li>Quarterly reviews </li></ul></ul><ul><li>Fab Access </li></ul><ul><ul><li>SCL, India Chip Program </li></ul></ul><ul><ul><li>TSMC Shuttle </li></ul></ul>
    66. 66. ISA: UGI: Academic Interaction <ul><li>Student Projects </li></ul><ul><ul><li>One of the Most frequent request </li></ul></ul><ul><ul><li>Create a database of student projects topics </li></ul></ul><ul><ul><ul><li>Cover wide variety of topics of interest </li></ul></ul></ul><ul><ul><ul><li>Solicit Ideas from member companies / Universities </li></ul></ul></ul><ul><ul><ul><li>Short duration projects to support course curriculum </li></ul></ul></ul><ul><ul><ul><li>Long duration projects used for practical training </li></ul></ul></ul><ul><ul><ul><ul><li>Need mentoring from industry (Technical, Financial) </li></ul></ul></ul></ul><ul><ul><ul><ul><li>Active participation from faculty </li></ul></ul></ul></ul><ul><ul><ul><ul><li>Background material for the projects </li></ul></ul></ul></ul>
    67. 67. ISA: UGI: Academic Interaction <ul><li>Faculty & Student exchange </li></ul><ul><ul><li>Internship programs for students </li></ul></ul><ul><ul><li>Faculty exchange programs </li></ul></ul><ul><ul><ul><li>Sponsored Sabbatical for summer in industry </li></ul></ul></ul><ul><ul><ul><li>Visiting faculty from industry for short duration (1 week) </li></ul></ul></ul><ul><li>Placement </li></ul><ul><ul><li>Major key incentive for the universities </li></ul></ul><ul><ul><li>Lack of information about activities in universities </li></ul></ul><ul><ul><li>Advanced placement (1 year ahead) </li></ul></ul><ul><ul><li>Facilitate placement activities for member universities </li></ul></ul>
    68. 68. ISA: UGI: Academic Interaction <ul><li>Curriculum / Courseware </li></ul><ul><ul><li>SMDP/VSI/Univ. have put together a good curriculum </li></ul></ul><ul><ul><li>Need to support curriculum with courseware </li></ul></ul><ul><ul><ul><li>Augment with practical & Projects </li></ul></ul></ul><ul><ul><li>Courseware available electronically for wider usage </li></ul></ul><ul><li>MCIT / VSI </li></ul><ul><ul><li>MCIT & VSI have been doing a lot of work in this area </li></ul></ul><ul><ul><li>Create partnership with MCIT to leverage infrastructure </li></ul></ul><ul><ul><li>Partner & support VSI for conferences / workshops </li></ul></ul>
    69. 69. ISA: UGI: Membership for Universities <ul><li>Awareness / Value Proposition </li></ul><ul><ul><li>Create awareness for opportunities in semiconductors </li></ul></ul><ul><ul><li>Publicize benefits for ISA membership </li></ul></ul><ul><ul><li>Create criteria for becoming ISA member </li></ul></ul>
    70. 70. ISA: UGI: Membership for Universities <ul><li>Membership – Category-B </li></ul><ul><ul><li>Membership Fee – Rs. 10,000 / year </li></ul></ul><ul><ul><ul><li>Access to Design kits </li></ul></ul></ul><ul><ul><ul><li>Support for student projects </li></ul></ul></ul><ul><ul><ul><li>Possible mentoring relationship with ISA companies </li></ul></ul></ul><ul><li>Membership – Category-A </li></ul><ul><ul><li>Membership Fee – Rs. 25,000 / year </li></ul></ul><ul><ul><li>Additional Benefits </li></ul></ul><ul><ul><ul><li>Technovation Initiative </li></ul></ul></ul><ul><ul><ul><li>Possible access to Fab-Shuttle program (Future) </li></ul></ul></ul><ul><ul><ul><li>Summer Sabbatical program for faculty </li></ul></ul></ul>
    71. 71. ISA: UGI: Mentorship <ul><li>Facilitate Mentor Relationship </li></ul><ul><ul><li>Enlist ISA Industry members with commitment for </li></ul></ul><ul><ul><ul><li>Faculty hosting at their site </li></ul></ul></ul><ul><ul><ul><li>Support & guidance of student projects </li></ul></ul></ul><ul><ul><ul><li>Providing expert visiting faculty (Short-term) </li></ul></ul></ul><ul><ul><ul><li>Help with course-work & curriculum </li></ul></ul></ul><ul><ul><ul><li>Providing placement support for eligible universities </li></ul></ul></ul><ul><ul><li>ISA Plays a role of Facilitator based on needs </li></ul></ul>
    72. 72. ISA: UGI: Other Items <ul><li>Create & Maintain database of university activities in India </li></ul><ul><li>Survey to project talent generation requirements over next 5 years </li></ul><ul><li>Work with MCIT on </li></ul><ul><ul><li>Hiring & Supporting additional faculty under SMDP-II program (2 per institutes) </li></ul></ul><ul><ul><li>Extend IEEE-Explore facility to member universities </li></ul></ul><ul><ul><li>Work with publishers to provide Indian edition of books </li></ul></ul>
    73. 73. Summary <ul><li>We have a strategic position that ‘happened’ to us </li></ul><ul><li>The opportunity is immense </li></ul><ul><li>We are ahead - yet, competition is fast catching up </li></ul><ul><li>We need to deliver through the production of abundant quality man power </li></ul><ul><li>We need to build a momentum around VSI and ISA to scale up to the required level </li></ul>
    74. 74. Contributors <ul><li>Dr. C P Ravikumar, TI </li></ul><ul><ul><li>As Secy, VSI </li></ul></ul><ul><li>Dr. G D Gautama, IT Secretary, WB Govt. </li></ul><ul><li>Dr. Pradip Dutta, Synopsys </li></ul><ul><li>Ms. Reena Mishra, Interra Systems </li></ul><ul><li>Dr. Uma Mahesh, Insilica </li></ul><ul><ul><li>As Secy, ISA </li></ul></ul>
    75. 75. Thank You