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Carmen En

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  • Ralf Seepold Universidad Carlos III de Madrid
  • Ralf Seepold Universidad Carlos III de Madrid
  • Ralf Seepold Universidad Carlos III de Madrid
  • Ralf Seepold Universidad Carlos III de Madrid
  • Ralf Seepold Universidad Carlos III de Madrid
  • Ralf Seepold Universidad Carlos III de Madrid
  • Ralf Seepold Universidad Carlos III de Madrid
  • Ralf Seepold Universidad Carlos III de Madrid

Carmen En Presentation Transcript

  • 1. IES Felipe Trigo - DAI
    • Desarrollo de Aplicaciones Informáticas
    • MAKEFILE
  • 2. Contents
    • Introduction
    • General concept
    • Dependencies
    • Structure of Makefile and rules
    • Variables
    • Conditions
    • Implicit rules
  • 3. Introduction: MAKE
    • make is a widely used tool for program development in scenarios with multiple, interdependent files .
    • It uses rules predefined in a file called makefile o Makefile .
    • Construct a 'target' file indicated by the user and derived from a number of 'source' files, from which the target depends .
      • $> make –h Help about make
      • $> make –n commands that make would execute
      • $> make –f filename Specifies that the file containing the rules is called neither 'makefile' nor 'Makefile', but 'filename'.
  • 4. Introduction: MAKE
    • The make tool supports program development
    • Typically, only a small amount of data is changed when the compiler is called
    • The make tool keeps track which portions of the entire program have been changed
    • Make compiles only those parts
    • Make has a powerful dependency graph that is derived from rules
  • 5. The general concept .c .h .s .o a.out Compiler Assembler Linker Executable program .c .h .s .o a.out Compiler Assembler Linker Executable program .c .s .o
  • 6. Separation
    • You need dependencies
      • “ .h” is required for the first and second .c file
    .c .h .s .o a.out Compiler Assembler Linker Executable program .c .s .o First Second
  • 7. Dependency in file MAKEFILE gcc –c data.c gcc –c io.c gcc –c main.c gcc –o project data.o main.o io.o .o .o .o .c .h .c .h .c Main.c Data.c IO.c Data.h IO.h project
  • 8. Dependency in file MAKEFILE # # First example of a Makefile # project: data.o main.o io.o gcc data.o main.o io.o –o project data.o: data.c data.h gcc –c data.c main.o: data.h io.h main.c gcc –c main.c io.o: io.h io.c gcc –c io.c .o .o .o .c .h .c .h .c Main.c Data.c IO.c Data.h IO.h project
  • 9. Dependency: Edit data.c .o .o .o .c .h .c .h .c Main.c Data.c IO.c Data.h IO.h project Edit project : data.o main.o io.o gcc data.o main.o io.o –o project data.o : data.c data.h gcc –c data.c main.o: data.h io.h main.c gcc –c main.c io.o: io.h io.c gcc –c io.c
  • 10. Rules Makefile Computer Architecture Laboratory 2010 main.o : main.c define.h $(CC) –c main.c Shell command(s) Target(s) Separator (:) Dependencies Tabulator symbol