Seminar 12-11-19

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Presentation Slides by Pipat Methavanitpong about the author for Seminar class Nov 19, 2012 at Kunieda-Isshiki Laboratory, Tokyo Institute of Technology.

Presentation Slides by Pipat Methavanitpong about the author for Seminar class Nov 19, 2012 at Kunieda-Isshiki Laboratory, Tokyo Institute of Technology.

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  • 1. Pipat Methavanitpong (M1) November 19, 2012
  • 2. OUTLINEMeFractional-order Sinusoidal OscillatorFaster Microprocessors
  • 3. ME <= Name: Pipat Methavanitpong  Skills: have experienced many Nationality: Thailand programming languages both H/L level Graduated from: SIIT, Thammasat  [Experience does not mean University in 2012 proficiency]  Electronic and Communication  MATLAB, SIMULINK, OrCAD, Engineering LabView  Senior Project – Fractional-order  68HC11, 8086, Arduino, PLC Sinusoidal Oscillator  C, C#, Java, Groovy, SQL, HTML, Work Experience: none CSS, PHP, VHDL, Flex Internship Experience: YES!!  Goal: Develop faster CPU than others in  NECTEC Integrated Circuit the market Development Section  My Current Work: Support Surachai-san  Basic SystemC Syntax developing Dalvik extension to Lab’s  Silicon Craft TCT processor  Basic SRAM Schematic
  • 4. FRACTIONAL-ORDER SINUSOIDAL OSCILLATOR Simple MATH:
  • 5. FRACTIONAL-ORDER SINUSOIDAL OSCILLATOR What I did  Follow Elwakil’s work  he provides generalization of design of n- fractional-order devices oscillator  The only HOPE for my graduation!!  Literature review on Fractional-order devices  Implement this knowledge in my advisor’s Current Tunable Sinusoidal Oscillator ’87  Result – It works and oscillates faster  BUT, still have not fully understood what fractional-order calculus is  Very complex calculation S. Pookaiyaudom, B. Srisuchinwong, and W. Kurutach, “A Current-Tunable Sinusoidal Oscillator”, IEEE Transactions on Instrumentation and Measurement, Vol. IM-36, No. 3, September, pp. 725-729, Sep 1987.
  • 6. FRACTIONAL-ORDER SINUSOIDAL OSCILLATOR WHY none in market  Creation of these devices is NOT FEASIBLE  Realization from a mesh of recursive R and C structure  Require LARGE area to make it near ideal performance 5-level stage becomes this mess
  • 7. FRACTIONAL-ORDER SINUSOIDAL OSCILLATOR 1 level (LPF) 8 levels 12 levels More levels -> More bandwidth
  • 8. FRACTIONAL-ORDER SINUSOIDAL OSCILLATOR HOPE, There is !  Such characteristic is found in organic things e.g.  There are reports of fabricated Si-devices for lab use. An Advantage from this knowledge  More precise control on every conventional circuits  Faster oscillator  Better PID controller  Any rate of attenuation electronic filter  Greener electronic devices
  • 9. FASTER MICROPROCESSORSHow to become FASTERYIN / YANGAn Era of Parallel ComputingCombination Dedicated FunctionalitiesDark Silicon Gap
  • 10. FASTER MICROPROCESSORSHow to become FASTER 2 choices  Work HARDER – Overclocking, Brute-force  Work SMARTER – Better algorithms and management
  • 11. FASTER MICROPROCESSORS YIN / YANG  Everything has both advantages and disadvantages  Analog systems  No loss of data  Very sensitive to interference  Digital systems  Reconfigurable / Distortion Immunity  Limited Range of Data (freq range)  Smaller MOSFET  Faster / Lower power  Higher power density / Undeterministic Quantum Mechanic Behavior  Single Electron Transistor  Even lower power consumption  Blurred digital state  It is we, the engineers, whose task is to push through the limitation and shift to new paradigm via BREAKTHROUGH
  • 12. FASTER MICROPROCESSORS An Era of Parallel Computing  We cannot keep clock frequency rising  Power consumption / Heat  Move to the new paradigm  Share works with friends  Teamwork is the key  Everybody may not be perfect  But, everybody can take part in a work to get it done  But, as we know in every group work we have faced as students, researchers, employees, and etc.  Unfair work distribution – Better Arbiter  Waterfall workflow – Better Dataflow  Communication problem - NoC The ANALOGY of modern microprocessors is now same as URBAN PLANNING Transportation – Communication between modules Company – Functionality People - Data
  • 13. FASTER MICROPROCESSORSCombination Dedicated Functionalities  One does not fit all  Give a right job to a right person  AMD APU – A combination of CPU and GPU on a single chip  CPU – less core / more memory  Control intensive  GPU – more core / less memory  Computation intensive  CPU + FPGA – dynamic functionalities
  • 14. FASTER MICROPROCESSORSDark Silicon Gap  A term by H. Esmaeilzadeh etal. – Dark Silicon and the End of Multicore Scaling ’12  Underutiliztion of transistor integration capacity  As a number of cores keep rising, the efficiency of utilization from parallelization becomes WORST