Thris Project Images

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Several field applications of the multifunctional system THRIS (Telecom Hardware Robustness Inspection System)are shown.

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Thris Project Images

  1. 1. FAULT INSERTION TRIALS
  2. 2. FAULT INSERTION TRIALS ON A DIGITAL EXCHANGE
  3. 3. POST_LAYOUT ANALYSIS OF A HIGH-SPEED BOARD
  4. 4. FAULT INSERTION STUDY ON AN ATM SWITCH BOARD
  5. 5. TDR ANALYSIS OF AN OPTICAL ACCESS MODULE
  6. 6. SIGNAL INTEGRITY COMPLIANCE ANALYSIS ON A COMPLEX BOARD
  7. 7. PREDICTIVE ANALYSIS OF FAULT INSERTION EFFECTS ON A COMPLEX BOARD
  8. 8. FAULT INSERTION TRIALS ON A SDH CROSSCONNECT
  9. 9. TRAFFIC/FAULT TRIALS ON THE TEST-PLANT VERSION
  10. 10. SERIAL FRONT-END FOR SHIELDED CABINETS
  11. 11. FI TRIALS ON A MARCONI CROSSCONNECT
  12. 12. THRIS EMC: PREDICTIVE ANALYSIS OF PCB RADIATED FIELD
  13. 13. RADIATED FIELD TESTS ON A TEST BOARD
  14. 14. PREPARATION OF A BOARD FOR EMC TESTS
  15. 15. FAR CHAMBER MEASURMENTS ON A TEST BOARD
  16. 16. THRIS –EMC NEAR FIELD ANALYZER TOOL FOR TRIALS ON THE FIELD
  17. 17. SCANNING HEAD OF THIS EASYSCAN FOR NEAR FIELD EMISSION ANALYSIS
  18. 18. EASYSCAN DEVELOPMENT
  19. 19. EMISSION MAPS FROM EASYSCAN
  20. 20. TEST-VEHICULE SPECTRUM ANALYSIS
  21. 21. PIERO IN THE THRIS LAB
  22. 22. TDR ANALYSIS OF THE TEST BOARD FOR ATE-BASED MODELING
  23. 23. THE THRIS BAND ( from the left: GIANCARLO, FLAVIO, PIERO)
  24. 24. OTHER THRIS PEOPLE (FROM THE LEFT: EMMANUEL, FLAVIO, PAOLO, CARLA, GIANCARLO)
  25. 25. PIERO IN THE LAB
  26. 26. DEVELOPMENT OF THE THRIS ATE MODELLING BOARD
  27. 27. BOARD FOR ATE MODELLING
  28. 28. ATE –MODELLING TEST HEAD
  29. 29. ATE MODELLING TEST-ASSEMBLY
  30. 30. EXAMPLE OF TDR-LIKE S11 ACQUISITION FROM THE ATE MODELLING HEAD
  31. 31. EXPERIMENTAL FIXTURE FOR TDR MEASURMENTS ON VLSI COMPONENTS.
  32. 32. GIANCARLO (LEFT) AND FLAVIO IN THE LAB
  33. 33. PIERO (LEFT) AND FLAVIO SHOWING THE FULL MODELLING PROCEDURE
  34. 34. COLLECTION OF PICTURES ON ACTUAL THRIS APPLICATIONS

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