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Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems
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Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems

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  • 1. Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems Paul Pop Sept. 29, 2006
  • 2. General purpose vs. special purpose Embedded system
  • 3. Embedded Systems
  • 4. Automotive Electronics
  • 5. Automotive Electronics, cont. 90% of innovations are based on embedded systems 8.9 Market ($billions) 10.5 13.1 14.1 15.8 17.4 19.3 21.0 0 200 400 600 800 1000 1200 1400 1998 1999 2000 2001 2002 2003 2004 2005
  • 6. Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems Paul Pop Sept. 29, 2006
  • 7. Architecture
  • 8. Heterogeneous Platform
    • Hardware architecture
    ... ... ... I/O Interface Comm. controller CPU RAM ROM ASIC
    • Software architecture
  • 9. Sources of Heterogeneity
    • Scheduling policies
    • Static cyclic scheduling
    • Fixed-priority preemptive scheduling
    • Earliest deadline first
    • Communication protocols
    • Controller area network
    • FlexRay
    • Time-triggered protocol
    • Fault-tolerance techniques
    • Replication (HW, SW)
    • Re-execution
    • Checkpointing
  • 10. Platform Example
    • Distributed application
    • TTP Time Triggered Protocol
    • CAN Controller Area Network
    • FPS Fixed-Priority Preemptive Scheduling
    • SCS Static Cyclic Scheduling
    CAN TTP FPS SCS SCS SCS SCS FPS FPS Schedulable? Analysis approaches to answer this question If NOT? Optimization approaches for automatic implementation REX Re-Execution HWR Hardware Replication CHK Checkpointing REX CHK HWR
  • 11. Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems Paul Pop Sept. 29, 2006
  • 12. Embedded Software Development
    • Design and build the target hardware
    • Develop the software independently
    • Integrate them and hope it works
    Does not work for complex projects
  • 13. System-Level Design
    • Mapping and scheduling
    • Fault-tolerance/ scheduling policy assignment
    • Communication synthesis
    • Schedulability analysis
    • Communication delay analysis
    • Heterogeneous/mixed
    • Incremental design
    • Safety critical
    • Complex functionality
    Model of system implementation System platform model System-level design tasks Analysis Software synthesis Hardware synthesis Application model
  • 14. Mapping
    • Given
      • Application: set of interacting processes
      • Platform: set of nodes
    • Assessment
      • Optimal solutions even for large problem sizes
    N 1 N 2 P 1 P 4 P 2 P 3 m 1 m 2 m 3 m 4 P 1 P 4 P 2 P 3 m 1 m 2 m 3 m 4
    • Determine
      • Mapping of processes to nodes
        • Such that the communication is minimized
  • 15. Mapping and Scheduling
    • Given
      • Application: set of interacting processes
      • Platform: set of nodes
      • Timing constraints: deadlines
    • Determine
      • Mapping of processes and messages
      • Schedule tables for processes and messages
        • Such that the timing constraints are satisfied
    S 2 S 1 P 1 P 4 P 2 m 1 m 2 m 3 m 4 P 3 N 1 N 2 Bus Schedule table Deadline P 1 P 4 P 2 P 3 m 1 m 2 m 3 m 4 N 1 N 2
  • 16.  Assessment
    • Scheduling is NP-complete even in simpler context
      • D. Ullman, “NP-Complete Scheduling Problems”, Journal of Computer Systems Science, volume 10, pages 384–393, 1975.
    • CP/MIP formulations
      • Can’t obtain optimal solutions for large problem sizes
    • Alternative: divide the problem
      • Scheduling
        • Heuristic: List scheduling
      • Mapping
        • Simulated annealing
        • Tabu-search
        • Problem-specific greedy algorithms
  • 17. Holistic Analysis and Optimization of Heterogeneous Fault-Tolerant Embedded Systems Paul Pop Sept. 29, 2006
  • 18.
    • C. Constantinescu, Trends and Challenges in VLSI Circuit Reliability, IEEE Mirco, 23(4), 14-19, 2003
    Permanent vs. Transient Faults Transient faults are increasing Permanent faults are decreasing
  • 19. Fault-Tolerant Mapping and Scheduling Messages: Schedule tables Messages: Fault-tolerant protocol Processes: Schedule tables ... TDMA bus: TTP Transient faults Processes: Re-execution and replication
  • 20. Example Problem, cont.
    • Given
      • Fault model
        • Number of transient faults in the system period
      • System architecture
      • Application
        • WCETs, message sizes, periods, deadlines
    • Determine
      • Schedulable and fault-tolerant design implementation
        • Mapping of processes and messages
        • Schedule tables for processes and messages
        • Fault-tolerance policy assignment
    Application : set of process graphs Architecture : time-triggered system Fault-model : transient faults
  • 21. Fault-Tolerant Techniques P 1 P 1 P 1 Re-execution N 1 P 1 P 1 P 1 Replication N 1 N 2 N 3 P 1 P 1 N 1 N 2 P 1 Re-executed replicas 2
  • 22. Re-execution vs. Replication A 1 Replication is better Re-execution is better N 1 N 2 P 1 P 3 P 2 m 1 1 P 1 P 2 P 3 N 1 N 2 40 50 40 60 50 70 N 1 N 2 TTP P 1 P 2 S 1 S 2 P 3 Met N 1 N 2 TTP P 1 P 2 P 3 S 1 S 2 Missed P 1 N 1 N 2 TTP P 1 P 2 P 2 P 3 P 3 S 1 S 2 m 1 m 1 m 2 m 2 Deadline Met P 1 P 3 P 2 m 1 m 2 A 2 P 1 S 1 N 1 N 2 TTP P 1 S 2 P 2 P 2 P 3 P 3 Deadline Missed m 1 m 1
  • 23. Fault-Tolerant Policy Assignment P 1 N 1 N 2 TTP P 2 P 3 S 1 S 2 P 4 m 2 Missed P 1 P 2 P 3 N 1 N 2 40 50 60 60 80 80 P 4 40 50 1 N 1 N 2 P 1 P 4 P 2 P 3 m 1 m 2 m 3 P 1 N 1 N 2 TTP P 2 P 3 S 1 S 2 m 2 P 4 N 1 N 2 P 1 P 3 S 1 S 2 P 4 P 2 P 1 m 1 m 1 TTP m 2 m 2 P 2 m 3 m 3 P 3 P 4 Missed P 1 N 1 N 2 TTP P 2 P 3 S 1 S 2 m 2 P 4 No fault-tolerance: application crashes N 1 N 2 P 1 P 3 S 1 S 2 P 4 P 2 P 1 m 2 m 1 TTP Met Optimization of fault-tolerance policy assignment Deadline
  • 24. Optimization Strategy
    • Design optimization:
      • Fault-tolerance policy assignment
      • Mapping of processes and messages
      • Schedule tables
    • Three tabu-search optimization algorithms:
      • Mapping and Fault-Tolerance Policy assignment ( MRX )
        • Re-execution, replication or both
      • Mapping and only Re-Execution ( MX )
      • Mapping and only Replication ( MR )
    Tabu-search List scheduling
  • 25. Experimental Results 80 20 0 10 30 40 50 60 70 90 100 20 40 60 80 100 Mapping and policy assignment ( MRX ) Number of processes Avgerage % deviation from MRX Schedulability improvement under resource constraints 80
      • Mapping and replication ( MR )
    20
      • Mapping and re-execution ( MX )
    • Case study
      • Vehicle cruise controller
      • MRX: schedulable fault-tolerant application with 65% overhead
  • 26. Future Research
    • Analysis and optimization of embedded systems
      • Fault-tolerant systems
      • Mixed hard/soft systems
    • System-level design of Systems-on-a-Chip
      • Fault-tolerance and low power
      • Timing analysis
    • Design of Labs-on-a-Chip
      • Micro-fluidics

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