IRIS: An Architecture for Cognitive    Radio Networking Testbeds                     Patricia Oniga
Contents•   Context•   Introduction to IRIS•   Architecture•   Example application•   Comparison with other platforms     ...
Context• Cognitive Radio (CR)  “ a software defined radio (SDR) with a cognitive engine brain ”  – Capable of fully (self)...
IRIS• “Implementing Radio in Software”• Software architecture for CR testbeds• Develop, test, validate reconfigurable netw...
Reconfiguration InterfaceArchitecture (I)• Component based             Data passing             Signal                    ...
Architecture (II)• Engines  – component “containers“  – manage execution, datapassing and reconfiguration    semantics of ...
Architecture (III) – How does it work ?• Triggers  – Internal reconfiguration triggers     • in response to a change detec...
Architecture (IV)                                                                    Source: [3][3] Iris: An Architecture ...
Example Application                      Source: [3]                                    9
Comparison with other platforms                                                                        Source: [3]OSSIE - ...
Thank you!Questions?             11
Comparison between IRIS engine                 types   Characteristic                          Relation                   ...
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Iris an architecture for cognitive radio networking testbeds

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  • Prezentarea mea estedespre IRIS,acronim care vine de la “Implementing Radio in Software”, sieste o arhitectura software care permiteconstruirea de retele radio reconfigurabile.
  • Peparcursulprezentarii, o saaratunde se incadreazaaceastaarhitectura in contextulcelordiscutatepanaacum la curs, o saprezintcatevalucruri introductive despre IRIS, voi continua cu detaliidesprearhitectura IRISsi cu un exemplu de aplicatieIn final, voi face o comparatie cu alteplatformeexistente, maimultesaumaiputinsimilare.
  • CR - un radio care e capabilsaisimodificeparametrii in functie de mediul in care opereaza. - si ca conceptul de SDR sta la baza CR, practic un CR e un SDR cu un cognitive engine “motor cognitiv”. - SDR este un radio care oferaimplementari software a componentelor radio in mod traditional implementate in hardware (modulatoare, filtre, amplificatoare etc ..) - pentru a construi un radio, avemnevoie de o dispozitiv de calcul (pe care sarulezeimplementarilesw) .. si de un front-end de RF - exemplu de platforme care oferaimplementari software ale componentelor radio traditional implementate in hw, adicaplatformepentru software radio, dar nu toate se preteaza in mod egalpentruaplicatii de cognitive radio; ca saputeavorbi de CR, avemnevoieprintrealtele de capacitate de reconfigurabilitate in timpulrulariisi de un motor cognitiv, care saiadeciziiasupramodului de reconfigurare. - conform autorilor, IRIS se apropiecelmaimult de asaceva.SDR - software implementation of components traditionally implemented in hardware (modulators, mixers, filters, amplifiers, etc ..) - can receive and transmit widely different radio protocols (sometimes referred to as a waveforms) based solely on the software used.Ca sapermita CR – reconfigurabil la runtimeA key motivation for software radio is the flexibility afforded by general-purpose processing platforms. When implemented in software, anypart of the radio becomes dynamically reconfigurable. With the addition of a software radio controller, this reconfigurability can be harnessedto enable concepts such as dynamic spectrum access and cognitive radio networks.
  • Am maizis, acronimul vine de la .. e o arhitectura software care a fostdezvoltatapentrutestbed-uri de CR, pentru a dezvolta, testasivalidaretele radio reconfigurabile.scopul a fostsasuportereconfiguraretotala in timpulrulariiarhitectura software implementari (parametrizabile) ale componentelor radio implementate traditional in softwarepartea de logica – permitereconfigurabilitate la rutimeatat a componentelor, cat si a ansamblului de componentesi a flow-ului de dateCellBE - general-purpose Power Architecture core of modest performance +coprocessing elements - accelerate multimedia and vector processing applications
  • Arhitectura e bazatapecomponente (la fel ca GNU Radio de exemplu) o componenta software care implementeaza o functie de procesare a semnalului care traditional era implementata in hardware: un filtru, un modulator etc suntreconfigurabilecomponenteleprezintainterfetegenerice pt gestionareaciclului de viata, pasareadatelorsireconfigurarePentru a construilanturi de receptiesitransmisie, componentele: - o data trebuiesaruleze - sisacomunice, saisipasezedateleintreele. Ele pot saruleze fie intr-o ordinepredefinita, saucandvin date de intrare. Cand vine vorba de pasareadatelor, componentele pot citidateledintr-un singur buffer, sau pot folosistructuri de tip FIFO.Metodele de rularesaupasare a datelor pot fimaimultsaumaiputinperformante, sieste o relatieinversproportionalaintreperformantasiflexibilitate. Dacavremperformanta mare, flexibilitateavafimai mica.- flexibility in data passing mechanism to support a high degree of component reconfigurability
  • De aceea,designeriisistemului IRIS au introdusconceptul de “Engines”. Practic, cesunt ? Suntnistedomenii, nistecontainere in care ruleazacomponentelesi care gestioneazamodul de executie a componentelor, de pasare a datelorsiposibilitatile de reconfigurabilitate. Diferiteletipuri de engine-uriimplementeazaaceeasiinterfata pt pasareadatelor, reconfigurare, evenimente – prinurmarediferitetipuri de engine-uri pot fitratate in acelasifel – ceeacepermiteimplementare de controllere care suntindependente de tipul engine-ului.sPHY - gestioneazacomponente care nu suntfrecventreconfigurate - gestioneazacomponente care suntaproape de interfataanalogica-digitala (de exemplu o componentaanalizor de spectru, filtre fixe, componente de interpolare) - exista o relatiefixaintreratele cu care o componentaconsuma/produce date -> se pot face optimizari la design, se pot determinadimensiuni de buffere, se pot face optimizariasupramodului de executie - componente care opereazatipicasupratuturoresantioanelordatelor de intrare - flow de date unidirectional - furnizeaza un mod de executieeficient, cu pretulunui grad de reconfigurarescazut - modul de pasare a datelor: prinbuffere de memorie la fiecare port al componentei - model of computation: synchronous data flow (SDF)fPHY - incapsuleazacomponenteputernicreconfigurabile - pentru care nu exista o relatiefixaintreratele cu care componentaconsuma/produce date, nu existarestrictiicand o componentasascoata date la iesiresauasupracantitatii de date, componentele se pot executaasyncron - data flow unidirectional, sicomponenteleopereazaasupratuturoresantioanelordatelor de intrare - exemplu: modulator OFDM - suportaflexibilitate mare e componentelor, darperformanta la runtime estemaiscazutadatorita overhead-uluiintrodus de alocareadynamica de resurse de memorie, de calcul - model of computation: Data flow process networks (PN)Network Stack Engine - incapsuleazacomponenteleputernicreconfigurabile - flow de date bidirectional - pot genera date spontan - opereazapepachete de date, nu peesantioane ca sPHYsaufPHY - schimbul de date intrecomponentenu se mai face folosindbufferepeporturile de intraresiiesire ale componentelor, ciexista un singur buffer cu date per componentasicomponenteleisipaseazapointeri la acelebuffere -> approach maieficientdatfiind ca componenteopereazaasuprapachetelor - exemplu: TDMA MAC component - MAC and NETwork protocol layers – cu ce se laudaei e ca stratulfizicpoatefurnizastraturilorsuperioareinformatii de timing pt MAC TDMA
  • Dupa cum am spus in slide-urileanterioare, componentelesuntreconfigurabile: atat individual, prinparametriioperationali, cat si la nivel structural, adicaansamblul de componenteestereconfigurabil. Se puneproblema cum determinamcandsaaiba loc acestereconfigurari. Pentruaceasta, IRIS oferasuportpentrutriggerii (declansatori) care determinacandacestereconfiguraritrebuiesaaiba loc. - 2 tipuriPentru a suportaacestetipuri de triggeri, componentelesuntcapabilesagenerezeevenimente (acesteasuntspecificate de designer-ulcomponentei).De exemplu, daca o componentadetecteazasemnalintr-o anumitabanda, poatesagenereze un eveniment, care sadeclansezereconfigurarereteleipentru a evitainterferenta. In acest context, in arhitectura IRIS existaelementelenumitecontrollere, a carorresponsabilitateeste de a ascultaacesteevenimentesi de a raspunde la ele. Suntcapabilesareconfigureze radio-ul in timpceruleaza, atat la nivel de componente, prinschimbareaparametriloracestora, cat si la nivel structural, samodificeansamblul de componente, saadauge, saeliminecomponente etc. In arhitectura IRIS existasimanagerul de controllere, care e responsabilpentruincarcareacontrollerelorsigestionareaciclului de viata a acestora. Similar cu componentele, putemspecificacecontrolleresaincarcamprintrufisier XML. Controllereleraspund la evenimentepredefinitesiexecuta o retele de reconfigurare ca raspuns la aceleevenimente. Controllerelesuntpartea care implementeaza “invatarea”, implementeaza cognitive engine-ul.
  • Aiciavem o imagine de ansambluasupraarhitecturii IRIS. Ca saconstruim un radio, specificamcomponentelesicontrollereleintr-un document de configurare in format XML (acestlucruilputem face si in timpul in care radio ruleaza – am vb de declansatoriexterni), documentuleste parse-uit, genereazamodelul radio-ului. Dacaavemreconfigurare la runtime cu triggeriexterni, de la User Interface, acest model esteexaminat de Reconfiguration manager (entitatea care gestioneazareconfigurare), care determina cum anumetrebuiereconfigurat radio-ulsiilreconfigureaza.…
  • Retea de noduriputernicreconfigurabile (nu 802.22 dar cu target-urisimilare)nodurilefoloseauspatiileneocupate din spectrupentrucomunicare, simodulatia OFDM – cu care se pot obtineusorlatimi de bandavariabilesi se poatemodificafrecventapurtatoareastfelincatsa se poataocupaspatiileneocupate din spectru.Nodul are in structuralui: - lant de transmisie: …. - componenta USRP Txcomunica cu RF front-end USRP-ului (USRP = FPGA + RF Front-End), furnizeaza hardware-ului date pt transmisiesicontroleazaparametrii: Frecventapurtatoare, largimea de bandasiputerea de transmisie. - lant de receptie, interconectateprintr-o componenta MAC de tip TDMA.O mare parte din componente au parametriireconfigurabili: - OFDM mod – se poateajustalungimeaprefixuluiciclic, sinumarul de subpurtatoareutilizate in functie de latimea de banda care se poateobtine in functie de capabilitatiletransmitatorului de pe USRP. Pentru ca acestacomponentaesteresponsabilasipentruinserareasemnaturilorciclostationare, expunesiparametrii care permit configurareaacestorsemnaturi. - QAM symbol mapper – expuneparametriilegati de modulatiautilizata in functie de condtiile de pe canal. - parametriisimilaripentrucomponenteleanaloage din lantul de receptie. Reconfigurareaparametrilorcomponentelorestedeclansate de evenimente: - blocul de analizaspectrala - blocul de detectare a semnaturii - componenta de demodulare OFDM – in functie de SNR-ulestimatpe canal pentru a permiteutilizareauneimodulatiiadecvateconditiilorcanalului.- Evenimentelesuntreceptionate de maimultecontrollere care pot reconfigura radio-ul Challenge: noduriletrebuiausacada de acordasupraconfiguratiei OFDM care urmasa fie folosita. In acestscop, au folositsemnaturiciclostationare – au introdusniste pattern-uri in spectrulsemnalului care pot fiusordetectateprincorelatie. Suntfolositepentruidentificarenodului, frecventeipurtatoare, si a largimii de banda. De aici se pot extrageinformatiilenecesarestabiliriicomunicatieiintrenoduri.Ideea e ca daca se stiudinaintepotentialelecanalepe care se poatecomunica, se poatedifuzapeacesteainformatiireferitoare la forma de undasinodurile pot scanafiecare canal siaflainformatiile. Dar folosirea de semnaturiciclostationare nu necesitastabilireaunorpotentialecanalepe care se poatecomunicasicitirea de informatii de peacestea, deci se poatefolosioriceoportunitatespectrala.
  • Iris an architecture for cognitive radio networking testbeds

    1. 1. IRIS: An Architecture for Cognitive Radio Networking Testbeds Patricia Oniga
    2. 2. Contents• Context• Introduction to IRIS• Architecture• Example application• Comparison with other platforms 2
    3. 3. Context• Cognitive Radio (CR) “ a software defined radio (SDR) with a cognitive engine brain ” – Capable of fully (self) reconfiguring radio system parameters (waveform, operating frequency, protocol and networking)• SDR – enabler technology for CR – Software implementation of components traditionally implemented in hardware (modulators, mixers, filters, amplifiers, etc ..) – computing device (GPP-based, DSP-based, FPGA-based) + RF front end – E.g: GNU Radio [1], OSSIE [2] (Open Source SCA Implementation - Embedded), IRIS [1] http://gnuradio.org/redmine/projects/gnuradio/wiki [2] http://ossie.wireless.vt.edu/ 3
    4. 4. IRIS• “Implementing Radio in Software”• Software architecture for CR testbeds• Develop, test, validate reconfigurable network designs• Design goal: support full runtime reconfiguration• C++• Runs on a variety of GPPs (x86, ARM, PowerPC) and OSs• Support for specialized processors (DSPs, CellBE), dedicated hardware (FPGAs) as accelerators• Support for higher layers: MAC, Network 4
    5. 5. Reconfiguration InterfaceArchitecture (I)• Component based Data passing Signal interface … Processing …• Components Function – implement discrete signal processing functions • e.g: digital filter, modulator etc .. – reconfigurable – support for: • Parametric reconfiguration – adjust component operation • Structural reconfiguration – dataflow switching – linked together to build RX and TX chains QAM … Scrambler symbol mapper OFDM modulator … 5
    6. 6. Architecture (II)• Engines – component “containers“ – manage execution, datapassing and reconfiguration semantics of components – Tradeoff between performance and flexibility – Scheduled PHY Engine (sPHY) Flexibility x fPHY – Flexible PHY engine (fPHY) Net stack engine x – Network Stack Engine – Radio – one or more engines x sPHY Performance 6
    7. 7. Architecture (III) – How does it work ?• Triggers – Internal reconfiguration triggers • in response to a change detected by one of the radio components – External reconfiguration triggers • From UI, new XML configuration documents passed to the system• Component events – support for triggers• Controllers – listen and respond to events 7
    8. 8. Architecture (IV) Source: [3][3] Iris: An Architecture for Cognitive Radio Networking Testbeds 8
    9. 9. Example Application Source: [3] 9
    10. 10. Comparison with other platforms Source: [3]OSSIE - Open Source SCA Implementation – EmbeddedSCA[4] - Software Communications Architecture - Architecture framework - tells how elements of hardware and software are to operate within a SDR - used by US military’s Joint Tactical Radio System (JTRS)[4] Software Communications Architecture 10
    11. 11. Thank you!Questions? 11
    12. 12. Comparison between IRIS engine types Characteristic Relation Component type between Operates Data Runtime (reconfigurability input and on flow EfficiencyEngine point of view) output datatype rates Scheduled PHY Unidir Not reconfigured Data (sPHY) Fixed ection High on a regular basis samples al Flexible PHY Unidir Highly It is not Data (fPHY) ection Lower reconfigurable fixed samples al Network Stack Engine Highly Bidirec - Packets High reconfigurable tional 12

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