System Generator-Tutorial

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Xilinx FPGA-System Generator-Tutorial

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  • www.pantechsolutions.net
  • System Generator-Tutorial

    1. 1. System design using Xilinx System Generator www.pantechsolutions.net
    2. 2. LAB 1 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    3. 3. Sources 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    4. 4. Sinks 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    5. 5. Create a new model 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    6. 6. Setting the Configuration Parameters 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    7. 7. Setting the Configuration Parameters 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    8. 8. Configure scope parameters 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    9. 9. Click run simulation 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    10. 12. Run the Simulation 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    11. 13. 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    12. 14. Create a subsystem 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    13. 15. Save & Run 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    14. 16. Xilinx Block set 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    15. 17. Gateway IN & Gateway Out 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    16. 18. Gateway IN 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    17. 19. Gateway Out 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    18. 20. Xilinx Blockset 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    19. 21. Buiding Hardware cosimulation 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    20. 22. System Generator Block 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    21. 23. 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    22. 24. 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    23. 25. Click Genarate 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    24. 26. Compilation sucessfully 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    25. 27. Setting parameters in scope 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    26. 28. Connect JTAG cosim 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    27. 29. Connect JTAG cosim 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    28. 30. Click run 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    29. 31. Observed simulation & hardware co simulation 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    30. 32. LAB2 –IMAGE FUSION 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net
    31. 33. IMAGE FUSION 05/22/11 02:36 PM © Pantech Solutions Pvt Ltd. | All rights reserved www.pantechsolutions.net

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