New Doctrine from US DoDApplied also in EMEADrive new developments
Mention C4 ISR and what it means.Make a point about common work load across these applications – Digital signal and image processing.THESE APPLICATIONS I MENTIOED HERE ARE COMMON DOD APPLICATIONS. THERE Are number of embedded applications in other federal agencies. Like baggage scanners used at airport security or photo radar speed enforcement systems
Global Information GridF
Second focus on IA’s built-in, hardware-assisted security technologies. Intel’s commitment to enhanced security to all layers of the computing HW/FW and SW stack resonates strongly with MAG customers. They understand, value, and will pay for IA’s hardware-based security technologies. They also value McAffee solutions, though typically these are deployed in their IT infrastructure, not in their Intelligent Embedded Systems.Intel® technologies such as Virtualization and Trusted Execution can help ensure secure system startup and enable a single Information Assurance platform to support multiple independent levels of security. General Dynamics, for example, leveraged these Intel technologies to win the NSA’s High Assurance Platform program using all Intel-based systems.Ivy Bridge alsoincludes new technologies to aid run-time security. These include Processor Package Digital Random Number Generator – which improves the robustness of security keys and increases encryption/decryption performance AESni –which came out with Westmere--helps prevent side channel attacks because all crypto calculations take place within processor registers—rather than external memory. Supervisor Mode Execution Protection – which helps prevent hackers from gaining access to the processor’s Supervisor mode functionality.
What is common across most of these MAG applications?Need to process multimedia information, such as: Images, video, audio, 2D an 3D graphics Digital Signal & Image Processing (DSIP) work loadProcessing of multiple data items in parallel Vector Implementations in GPPs enables Signal & Image ProcessingVector processors are classified as Single Instruction Multiple Data (SIMD) processing unitsTwo Implementations are available in GPPsIntel® (MMX/SSE2/SSE3/SSE4/AVX etc)IBM*/Freescale* PPC (AltiVec*)Intel® Core™ i7 2715QE(Sandy Bridge Generation) Q1 2011About 51 including ancillary chipset32nm2.1 GHz4 (only 1 used)32KB (each, per core)256KB per core6MB (shared)None (Memory Controller integrated in processor die)AVX 1.0 (per core)Intel BD82Q67 Intel Emerald Lake Rev B. Customer Reference Board with 1 GB DDR3-1333Linux (Fedora*12);gcc; N.A. Software VSIPL Beta for Intel AVX The performance advantage of the Intel® Core™ 2 Duo (red) vs the Freescale* MPC8641D (blue) primarily reflects the ~2x faster clock of the Intel processor. The MPC8641D’s performance falls off more steeply at 256K points and above due to its much smaller last level cache.The increased performance of the Core i7 2715 QE over both older processors is primarily due to it’s improved micro-architecture, including Intel AVX. The faster memory speeds supported by both Intel processors are a less significant factor for this function because it is executing primarily from last level cache on the Intel processors The following results are from tests performed by GE Fanuc*Freescale* PPC9641D and N.A. Software* Ltd.White papers for more details:Freescale* PPC 8641D (~25W) vs Intel® SL9400 (~31W total)http://www.nasoftware.co.uk/home/attachments/018_PPC_Intel_comparison_whitepaper.pdfIntel® Atom™ vector performance benchmarkshttp://www.nasoftware.co.uk/home/attachments/019_Atom_benchmarks.pdf
A number of resources and tools are available to speed up conversion from PPC to IA. Check out the PowerPC to Intel Architecture Migration Guide white paper. Also, numerous ISVs now have Vector Signal and Image Processing Libraries for IA – Application program calls to the VSIPL API now transparently call IA routines. Intel is also releasing a Signal Processing Development Kit that loads all the relevant Intel software development tools, sample applications and many ISV tools onto Ivy Bridge boards. We also have a free tool to automatically convert PPC AltiVec signal processing code to IA SSE/AVX . This tool, for example, enabled a CTO group at a major US prime contractor to quickly port several of their complex radar algorithms to IA. We sent them a Sandy Bridge Customer Reference Board and they measured a 14X performance increase vs an older PPC processor, and 6-7X performance improvement compared to the Freescale MPC 8641D. This group is now evangelizing IA within the entire corporation.
Third: Emphasize the strong ecosystem that supports Intel Architecture products’ use in the MAG sectorWe now have board/system suppliers, for example, that launch their Intel-based, ruggedized OpenVPX blades on the day we launch our silicon – even though their products are far more complex than typical PC motherboards. This new behavior is having a very positive effect on MAG silicon ramp rates – in fact MAG customers are now the largest purchaser of Sandy Bridge BGA processors of all the embedded market sectors. So by no means are all MAG designs slow to ramp!The IA ecosystem also includes a broad range of RTOS and Linux support. WindRiver is very well positioned in the Aerospace & Defense sub segment. Their VxWorks RTOS has a high MSS, though admittedly much of it is on legacy PPC-based systems. But VxWorks has now been optimized specifically for IA, and their Hypervisor product, for example, provides operation system virtualization and hardware abstraction for Information Assurance systems. You should also emphasize the unparallel choice of software development tools for IA, including performance libraries from Intel and ISVs, threading and parallelization tools, performance analyzers, etc. The primes are always looking for ways to reduce their algorithm development costs.
Intel® Architecture for MAG Applications (Military – Aerospace - Government) Michael Vierheilig
Military/Aerospace/Government Overview Broad Application Spectrum – One
Network Centric Operations Key: Information Advantage
Aerospace and Defense Applications Communication Networks ComputersFlight Training Rack mountSystems computers Communication and Networking Infrastructure Rugged Laptops Routers/Switches/Base Stations Tactical Command Center Ultra Mobile Software Define rugged tables Full Mission Radios Simulators Battlefield Management Training & Simulation Command and ControlIntelligence, Surveillance and Unmanned VehiclesReconnaissance Radar/Sonar Radar and Image Processor Control and Communication Integrated system Observation and ModulesIntelligence Positioning, navigation, Identification(SIGINT, COMINT) targeting and communication Navigation and Communication Soldier Systems Vehicle Electronics Common Architecture: Core to Edge
Industry Trends Reduce Cost and increase Efficiency“Let me be clear, the task before us is not to reduce the department‟s top linebudget. Rather, it is to significantly reduce its excess overhead costs andapply the savings to force structure and modernization.”“Fourth, there are great benefits to be gained – in cost and efficiency – fromtaking advantage of economies of scale. The problem is that too many partsof the department, especially in the information technology arena, cling toseparate infrastructure and processes.” Dr. Robert M. GatesStatement on Department Efficiencies Initiative Secretary of DefenseThe Pentagon, Monday, August 09, 2010 Commercial, off-the-shelf (COTS) Technologies
Industry Trends Open Architecture, Modular Systems“We need to encourage the use of commercial technology. We need toemphasize open design protocols that make systems easy to modify, and weneed to adopt service-oriented architectures that will allow vendors to beunable to monopolize systems with proprietary technology. ““This approach to IT acquisition is already working inside the department.The Navy is applying it to its combat systems on submarines. With theexception of transducers and water-cooled racks, all of the hardware and 60percent of the software is commercial. With an open architecture, newcapabilities can be inserted each time a sub returns to base. A program thatbegan with one submarine has now expanded to them all” William J. Lynn, III Deputy Secretary of DefenseRemarks at the Defense Information Technology Acquisition SummitGrand Hyatt, Washington D.C., Thursday, November 12, 2009 Interoperable, open-architected, Modular systems
Industry TrendsIndustry Trends• DOD focus on cost control and efficiency will result in accelerate adoption of COTs• Network Centric Operations vision will drive demand for connected computing• Increased focus on Information Assurance and Cyber Attacks will drive demand for Intel Security TechnologiesSystem Level Trends …. Best met with Intel based Solutions
Intel for MAGMAG Customer Performance Intel SolutionsRequirements DensityHighest Performance/Size- Industry LeaderWeight-and Power (SWAP) 7 yr SiliconLong lifecycle support Availability + Early Access Security Intel Platform TechnologieStringent security and anti-tamper s Securityrequirements TechnologiesRuggedization and Extended EcosystemTemp.Mostly RTOS/near real-time WindRiver, Green Strongapplications Hill, LynuxWorks EcosystemSecurity Certifications Ecosystem
Intel® Solutions for MAG Applications Mobile Consolidated Power & Form Factor Power Optimized Performance Optimized Optimized Performance 2W-8W 10-35W 38-60WMaximum ThermalDesign Power (TDP) Highlights Ultra Low • Large L2 Caches High Power • Industry Leading Performance Per Watt Performance • Enhanced Digital Signal and Media Processing • Ultra Fine-Grained Power Management ... All on one common Architecture 12
Low Power Platform – Typical ApplicationsMissile and Fire ControlTactical communications backboneUnmanned VehiclesRadar systemsSonar systemsLADAR systemsVehicle Electronics
High Performance Platform - Typical Applications Ground Station Radar, Sonar, LADAR Data/Image Processing Command Center Information Assurance
ISR and Unmanned Vehicle System Requirements Highest possible performance in lowest size-weight-power possible Image Signal Processing workload Most systems are highly rugged and compact High percentage of real-time/near real-time applications Minimum 7-year product availability Most stringent security and anti-tamper requirements AWACS Radar Radar and Image Processor
Performance StackFull Performance>100W (CPU + Chipset) Comm NetworksBlades50-100WThin Blades, Mezzanines Training & Simulation Command & Control35-50W Vehicle ElectronicsLow Power Performance Unmanned Vehicles30-45W Intel & Recon Computers AvionicsULV / Fanless15-25WLow Power Value~40WLow Power Entry10-20WEntry Performance (LPIA) UXV8-10W Systems Avionics SoldierUltra Low Power (LPIA)<5W
Challenge: Information AssuranceSensitive information needs Multiple Access levels need unified systemto be protected from with secure information and applicationsunauthorized access. contained within each access level. “Blune Pills”, “Backdoors” Un-authorized Internal Viruses, Worms Hackers Rogue Administrators Result: - Bulky information systems with multiple devices - Duplicated data storage.
Information Assurance ModelReplace multiple, purpose-built computers andcommunications hardware • Replaces purpose-built operating systems with standard, COTS OSes and applications developed using standard toolsDeploy a single set of COTS platforms thatallow multiple security domains to be combinedon a single computing platform • Operating systems, programs, data, and communications run in separate, secure partitions • Users can access only those partitions for which they have clearance General Dynamics C4 Systems (Public) See GD Press Release: http://www.gdc4s.com/news/detail.cfm?prid=298
Solution: Intel® Virtualization and Trusted Execution Technology™Intel® Virtualization Technology™ Intel® Trusted Execution (VT) + Technology™ (TXT)Hardware-based, with new instructions Sealed storage for encryption keys, HW/SW configuration policies, etc. --Multiple independent operating systems Helps to enable hardware and software and applications share system lockdown resources in a controlled manner Protected launch and registration ofApplications and operating systems run operating system and system software independently in protected, isolated NON- environments ROOT Protected memory time areas Initiating SENTER MVMM Apps Apps Apps Logical Processor (ILP) Instr / Apps Apps SINIT Initialization Apps Apps Apps Apps Event All … Load SINIT MVMM Threads 3D & MVMM ops OS OS OS Responding Logical SENTE MVM Processor (RLP) R M 0D Event Join Min All threads Light-Weight Virtual Machine Monitor Ring 0 process issues Each RLP participating 0P GETSEC [SENTER] instruction issues ACK ROOT ILP broadcasts All ACKs received MVMM wakes each RLP for initialization SENTER message ILP continues Platform Hardware ILP loads, authenticates SINIT measures VMM, stores TPM 1.2 & launches SINIT, ILP stores VMM measurement, then Memory Graphics Processors SINIT measurement in TPM passes control to the MVMM PCR 17 Network Storage Keyboard / Mouse PCR 18
Information Assurance Multiple Levels of Security on a Single Platform Problem: Secret Top Secret Unclassified Optional System Management Ring 3 App App App App App• Need for information App App App App App assurance Middleware Secure Middleware• Consolidate multiple Linux* RTOS Windows* Unmodified Linux* security level platforms into Ring 0 Virtual BOIS/Driver Virtual BOIS/Driver Virtual BOIS/Driver Virtual BOIS/Drivers a single platform Non Root Mode Intel® Virtualization Technology Solution: Root Mode Light weight-Highly Trusted Separation Kernel (Virtual Machine Monitor)• Create separate domains for Ring 0P all applications and OS‟s Cores 0 1 2 3• Isolate network traffic and Physical access domains Memory - Top Secret Assigned - Secret Devices - Unclassified Shared Devices
Information Assurance Information Protection Windows* High Assurance running in Top (Multiple Security Levels) Secret domain Classification indicators Un-authorized Internal + Display Monitor Disgruntled Users Windows running in Secret domainData or security techniques cannot be compromised under anyconditions Multiple security domains on a single platformNote: security classification labels in this briefing are for example purposes and DO NOT reflect any actual classification; all information in this brief is unclassified.
Application Convergence Non-Real Time Data, Real-Time Applications Streaming System Control, Voice & Signal Processing (Maps, Navigation, Video (Visual Visibility, etc.) over IP Enhancement) GPOS (Windows*, RTOS Linux*) Thin Hypervisor Multi-Core Intel® Architecture with Intel® Virtualization Technology• Converge communication applications and real-time system control and applications (e.g. maps, navigation) on fewer hardware platforms• Same reliability packed on less hardware
Why Intel® Processors for Digital Signal and Image Processing?Intel® SSE SIMD performance/watt • For processors based on the Intel Core™ micro-architecture – Includes all processors branded “Core”, “Core 2” and Xeon® since 2006 • Intel Atom™ branded processors also have good SIMD performance per watt but (not covered here) • Intel has strong roadmap support for SSE SIMD going forward • 32nm 2nd Generation Intel® Core ™ processors support SSE4.2 instructions • Continually improving performance/watt ratios generation to generationIntel Advanced Vector Extensions™ (AVX): 256 bit SIMD registers • Older Intel and PPC processors have 128-bit wide registers • Available on 2nd Generation Intel® Core™ processors “(Sandy Bridge” ) SIMD=Single Instruction Multiple Data SSE=Streaming SIMD Extensions --Intel‟s term for an Instruction Set Architecture similar to AltiVec. There have been six extensions to Intel MMX and SSE technologies since they debuted on Intel Pentium® with MMX and Intel Pentium 2 processors.
2nd Generation Intel® Core™ Microarchitecture Highlights Two Load/Store ports, greater instruction fetch bandwidth, and Intel® AVX all serve to increase performance on many image processing algorithms ~2X Instruction Fetch B/W Instruction Fetch & Decode Allocate/Rename/Retire Zeroing Idioms New in Sandy Bridge Scheduler (Port names as used by VTune) Port 0 Port 1 Port 5 Port 2 Port 3 Port 4 ALU VI MUL ALU ALU Load Load Store SSE MUL VI ADD JMP Store Address Store Address Data DIV * SSE ADD AVX FP Shuf AVX FP Blend, MV AVX FP ADD AVX FP Bool AVX FP MUL, DIV Imm Blend Imm Blend 0 63 127 255 Memory Control 1-per-cycle 256-bit floating point multiply, add, and shuffle available 48 bytes/cycle L1 Data Cache4-wide instruction pipeline: instructions scheduled across 6possible execution ports * Not fully pipelined 31
DSIP PerformanceDigital Signal and Image Processing (DSIP) Applications: Software Defined Radio, Radar, Sonar, LADAR, Electronic Warfare, Signal Intelligence, 2D/3D graphics processing, Wireless BTS, Tactical communications backbone, Unmanned Vehicle other Industry-leading Vector Performance per Watt
Performance gains with 2nd Gen Intel® Core™ N.A. 2 4 Software*, Threads (cores) Threads Ltd. System (cores) Algorithm Seconds Intel® Core™ i7-2710QE with Intel® AVX 0.059 0.027 1.0 SAR Intel® Core™ i5-430M with Intel SSE 4.2 0.135 0.121* Intel® Core™ i7-2710QE Speed Up 2.3X 4.4X* Intel® Core™ i7-2710QE with Intel® AVX 6.03 3.841 1.0 SARMTI Intel® Core™ i5-430M with Intel SSE 4.2 15.197 13.667* Results shown for the 2011 Intel processor formerly codenamed „Sandy Bridge‟. Intel® Core™ i7-2710QE Speed Up 2.5X 3.5X* The Intel® Core™ i5-430M processor (formerly code named “Arrandale”) was released in Q1 2010; the Intel Core i7- 2710QE (formerly code named “Sandy Bridge”) was released in Q1, 2011. Sandy Bridge utilizes Intel‟s 2 nd Generation “Core™” Microarchitecture, including Intel AVX.Timings with graphics rendering turned off; Relative speedup with graphics on is equivalent.* Note: Arrandale 4 thread timings utilize hyperthreading since only a 2-core version is available. SNB 4-thread timings use all 4 cores. 4C Sandy Bridge’s maximum Thermal Design Power is roughly 12W more thana 2-core Arrandale processor. Please see system configuration information in backup. Intel Confidential
AltiVec*-based digital signal & image processing portion of application Wind River* VxWorks*, Linux* VSIPL AltiVec.h PPC Assembly 1. VSIPL for IA-32 3. PPC Assembler Source to 2. AltiVec.h for IA-32 from NA Software*, RunTime Computing*, SSE Assembler (Released) Code Sourcery*, etc (Alpha Release March, 2011) Convert non-DSP code; Tune DSIP code if necessary Intel® Architecture Application Intel® and the Intel logo are registered trademarks of Intel Corporation in the United States and other countries * Other names and brands may be claimed as the property of others35
How to Migrate from PowerPC* to Next Gen Intel® Architecture PowerPC* to Intel® Architecture Migration Guide (White Paper) • http://download.intel.com/design/intarch/papers/321079.pdf (Public version) • Check http://edc.intel.com for the private version (share under Intel NDA) Tools and Support • Translation of PowerPC AltiVec* SIMD Macros to Intel Architecture (SSE and AVX) http://www.intel.com/p/en_US/embedded/designcenter/migration/powerpc/technical- documents • Intel Signal Processing Development Kit http://www.intel.com/p/en_US/embedded/hwsw/technology/signal-processing • IA signal processing performance libraries (VSIPL*) are available from a range of vendors, including Code Sourcery* http://www.codesourcery.com/vsiplplusplus/benefits.html Curtiss Wright* Controls Embedded Computing http://www.cwcembedded.com/ GE Intelligent Platforms* AXISLib-AVX http://defense.ge-ip.com/axisdemo N.A. Software, Ltd* http://www.nasoftware.co.uk/ RunTime Computing* http://www.runtimecomputing.com …. test IA easily with help of migration tools
VSIPL* For Intel® ArchitectureVSIPL performance libraries for Intel® Architecture are available from thefollowing, among othersCode Sourcery* • http://www.codesourcery.com/vsiplplusplus/benefits.htmlCurtiss Wright* Controls Embedded Computing • http://www.cwcembedded.com/GE Intelligent Platforms* AXISLib-AVX • http://defense.ge-ip.com/axisdemoN.A. Software, Ltd* • http://www.nasoftware.co.uk/RunTime Computing* • http://www.runtimecomputing.com
Coupling FPGAsLoosely Coupled FPGAaccelerators (PCIe) Tightly Coupled FPGA accelerators (QPI Bus) Front Side Bus and PCIe products illustrated with a 4-socket “ Caneland” board (2009)Intel® and the Intel logo are registered trademarks of Intel Corporation in the United States and other countries* Other names and brands may be claimed as the property of others 38
Strong Ecosystem Standards based, ruggedized platforms including Extended Temperature Support IPP/MKL TBB, Cilk, icc, VTune QuickAssist ISV Performance Libraries MathWorks OpenCLStandards Platforms RTOS/OS Software Faster Time to Deployment/Money
…. Intel Is Setting The Pace Next: Leapfrog with wide vectorization, ISA extensions: Future Extensions scalable performance & • Hardware FMAPerformance / core excellent power efficiency • Memory Latency/BW • Many Other Features Now: Sandy Bridge Improved upcoming Intel® Intel® Advanced Vector microarchitectures Extensions (Intel® AVX) • 2X FP Throughput Westmere • 2X Load Throughput Nehalem • 3-Operand instructions • Intel® Streaming SIMD AESNI Extensions 4 (Intel® SSE4) • Cryptographic • Memory latency, BW Acceleration • Fast Unaligned support Core NEHALEM: Intel® Core™ i7 Processor, Intel® Xeon® Processor 5500 Series WESTMERE: Intel® Xeon® Processor 5600 Series
Summary• Trends: Why Intel? • Network Centric • One Scalable Architecture • COTS • HW based security building blocks from enterprise to edge • Consolidation • SW and HW ecosystem leads to • Standards faster time to market • Industry-leading performance/size weight and power … and capabilities • Enhanced Signal Processing and Media capabilities • 7+ years of product supply to systems integrators • Industry-specific solution teams