Silicon/Chip Realization Services eInfochips’ suite of solutions and services addresses all stages of a chip lifecycle, ranging from Design, Verification, Physical Design to Continuation Engineering Services. It helps silicon vendors reduce their cost and development time through IP leveraged design services that address to the complete chip lifecycle.
“ Modeling System behaviors ”….A better Paradigm on prototyping -Nilesh Ranpura
Electronic System Structure Hardware development process Software development process System development process Software input/output Hardware input/output Abstraction trade offs
3. More than one customer with different nature/features
SPI 5 Design Flow Concept Chip/Block specs Product Specs System data/environment Board/proto specs Architecture specs Not documented Reference Platforms Hardware and proto specs
Which are those System Properties ? Environmental System Properties Hardware & Software co-exist Safety/ Standards/ Compliance Performance New Approaches : Green mode Error injection Mixed Signal
Compute Blade PCIe Inter-Domain Switch I/O Hub CPU CPU Memory Memory Memory Memory Local Storage Processor SATA / SAS Expander Dual GbE Controller Dual GbE Controller I/O Blade Processor Compute Blade PCIe Inter-Domain Switch I/O Hub CPU CPU Memory Memory Memory Memory (1)PCIe Switch Applications – System Interconnect Processor FC FC Fibre Channel Controller Storage Blade PCIe System Interconnect Switch GbE GbE GbE GbE Compute Blade I/O Hub CPU CPU Memory Memory Memory Memory
Model parameter Values ECRC, etc Misc. Testcase 20/100/500/5000 No of packets Testcase 2/4/5/6/8 Active Port Testbench PM or non PM State Testcase 2.5Ghz, 5Ghz Speed Testbench Multicast, One to one, Many to one Traffic pattern Testcase MRD,MWR,IRD Packet types Testcase 128/256/512 Payload Testbench 128 MPS Remark Value Parameter