1. Digital Signature Pairing ArchitectureDigital Signature Pairing between System Controller Processor & Biometric Digital Signal ProcessorDigital Signature Pairing between System Controller Processor & Encryption Engineer Processor2. ID Tag Sequencing Com ArchitectureAll transaction communication protocol between System Controller and Digital Signature Pairing processor are governed by ID TagverificationVerification CycleAuthentication CycleData Fetch Cycle3. System State Alert ArchitectureBiometric Fingerprint Authentication request upon Host System get intoHost System Hibernating ModeHost System Standby Mode
Enhance Dual (Multiple) Bio-fingerprint Authentication ArchitectureDual Biometric Fingerprint Authentication for successful access of memory spaceDual successfully Authentication within allowing time constraint & permissible cycle
1. Admin Enrollment DestructionUpon successful administrative re-enrollment AES key will be re-admitted with new random set with Flash memory formatting 2. Enhance Encryption Engine ArchitecturePayload fully protected by Advanced Enhance Security Architecture via 128bits Communication via non-continuous and fragmented random sequencingPrevent from accidentally or intentionally monitoring of transmission linePrevent from accidentally or intentionally read back via Flash reader engine3. Randomized Storage of Security Key ArchitectureUnique Encryption Keys with randomized storage spacePrevent smart user from retrieving encryption key form system
Destructive ArchitectureUpon detection of unmatched digital signature on some of the above critical phenomenonSystem Controller issue destructive command erasing data space memory or FAT memory
We believe with the above fully implemented or partially enhanced features, there will not be any compromises in the security access and information content stored within our USB based Bio-Signature Storage devices
Transcript of "Signature Presentation(10062011) Vc 3 Full"