C-Port Network Processors in 3G Infrastructure Systems
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C-Port Network Processors in 3G Infrastructure Systems

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    C-Port Network Processors in 3G Infrastructure Systems C-Port Network Processors in 3G Infrastructure Systems Presentation Transcript

    • C-Port Network Processors in 3G Infrastructure Systems Motorola Global Software Group India Place your image on top of this gray box. If no graphic is applicable, delete gray box and notch-out behind gray box, from the Title Master Y917 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2002.
    • Outline • Overview of 3G Systems & Applicability of C-port NP for 3G systems – UMTS – CDMA-2000 • C-PORT NP Solutions for 3G - Case Studies – RNC Solutions – PDSN Application • Implementation Challenges •Q&A Slide 2
    • 3G System Overview –UMTS Application MSCu Internal Servers IP • interface (3G Technical Specs TS Iub PSTN Network s 25.426, 25.430, 25.431, 25.432, AuC 25.434) – Node B & RNC VLR/HLR • interface (3G Technical Specs TS Iur Network Management 25.420, 25.421, 25.422, 25.424, Iu-cs GGSN Platform 25.426) – RNC RNC Gn •Iu-cs & Iu-ps interfaces and Core RNC Iu-ps SGSN Iur Network Inter-working (3G Technical Specs TS 25.410 to 25.415) – RNC & Iub Iub Iub RAN Gateways •Radio Network Inter-working (3G Technical Specs TS 25.425, 25.427, Node B Node B Node B 25.435) – Node B & RNC Slide 3
    • 3G System Overview –CDMA2000 MSC Internal PSTN IP Networks Home Agent Application Servers •A3/A7 (3GPP2 A.S0015-0 v2.0) – BSC Network Management AAA A1/A2/A5 PDSN (Authentication Platform Server) •A8/A9 (3GPP2 A.S0016-0 v2.0) – SDF & BSC A10/A11 PCF BSC A8/A9 PCF A3/A7 •A10/A11 (3GPP2 A.S0017-0 v2.0) – PCF & PDSN •Interface between BSC & BTS BTS BTS BTS Slide 4
    • C-Port Network Processor Applicability in 3G Networks • ATM Solutions •IP Solutions •ATM Interfaces: N*T1(E1), T3/E3, OC-3c •IPv4, IPv6 & OC-12c •IP Interfaces: •ATM Switching & ATM Traffic Management •ML/MC-PPP/PPP-MUX (T1/E1/T3/E3) •AAL5, AAL2 CPS AAL2 SSSAR & AAL2 •AAL5/ATM/IMA (T1/E1/T3/E3) Switching •AAL5/ATM/SONET (OC-3c/OC-12c) •Inverse Multiplexing over ATM (IMA) •Ethernet (10/100 MB, GbE) •POS (OC-3c/OC-12c) • Inter-working Solutions •IP Routing/Switching, MPLS, IP QoS – •UTOPIA (Cell Bus) or GbE interface to other DiffServ sub-systems like DSP and Radio Network Layer •GTP-U/UDP (UMTS) •Radio/Core Network Inter-working & Iu Framing •GRE Tunneling, User Plane PPP & User Plane Protocols (UMTS) Termination, UDP/IP header compression, IP- In-IP Tunneling for Mobile IP support •AAL2-SSSAR to UDP/IP IWF (CDMA2000) (CDMA2000) •Voice over AAL2/ATM to Voice over •RTP/UDP RTP/UDP/IP •AAL5/ATM to GbE (GigaBit Ethernet) •AAL5/ATM to POS (Packet over SONET) Slide 5
    • C-Port Network Processor for 3G Infrastructure: Key Drivers ? Higher Bandwidth/Throughput requirements ? E.g. Peak Data rate as high as 3.1 Mbps in case of 1xEV-DV ? Higher Scaling Requirements ? Increased number of Voice/Data Calls/Sessions to to be supported. ? Introduction of Concurrent Services I.e. support for Simultaneous Voice & Data Calls. ? Migration from Circuit to Packet Switched Backhaul ? Use of IP & ATM as a transport protocols ? Necessity of value added features such as QOS, Security, Header Compression etc. at wireline speed. ? Flexibility ? Migration from one transport to another transport interface in future, without requiring significant Hardware Changes. ? Flexibility of migration to higher speed transport interfaces (such as Fiber Optic etc.) in future, without requiring significant Hardware Changes. Slide 6
    • C-Port NP Based RNC Solution A Case Study Slide 7
    • RNC - Functional Blocks RNC needs multi-board solution for scalability & performance and the major sub- systems include - • Transport Network Interface •ATM based transport: OC-3c ATM, AAL2, AAL5 •IP based transport: OC-3c ATM-AAL5, Fast/Gig Ethernet, IP, UDP, GTP-U •Iu/Iub/Iur Framing • Transport Network Layer Control •AAL2 Signaling (ALCAP) & respective bearer stacks on Iub, Iur & Iu interfaces • Radio Network Layer Control •NBAP, RNSAP, RANAP & respective bearer stacks for Iub, Iur & Iu interfaces • Radio Interface •MAC, RLC, PDCP, RRC • Interconnect to connect the sub-systems •PCI, Fabric with FPGA (Glue), Ethernet Slide 8
    • RNC Solution with Motorola Processors Reference Architecture Radio Network Layer Control Transport Network Layer Control Radio Interface Protocol Stacks Protocol Stacks Protocol Stacks Iub Iur Iu-cs/Iu-ps Iu-bc NBAP RNSAP RANAP SABP Iub Iur/Iu-cs Iu-ps RRC BMC PDCP SSCF- UNI SCCP SCCP TCP ALCAP ALCAP GTP -C SSCOP MTP3-B MTP3-B (Q.2630.2) (Q.2630.2) TCP RLC SSCF- NNI SSCF- NNI STC STC (Q.2150.1) MAC SSCOP SSCOP (Q.2150.1) (M3UA (M3UA SSCF- UNI MTP3-B SCTP) SCTP) SSCOP SSCF- NNI SSCOP (M3UA SCTP) Host Processor (MPC 74xx/7xx) PCI, Interconnect Fabric/ FPGA(Glue), Security Processor Ethernet (MPC185) C-Port NP (Transport Network Interface Protocol Stacks) Kasumi F8 (encryption/decryption) Radio Network Layer Interface Kasumi F9 (L3 Message authentication) FP Iu UP GTP-U UDP ATM IP AAL2 SSSAR (I.366.1) IP Network AAL5 Network AAL2 CPS (I.363.2) 100 MB / Gig Ethernet, Interface ATM OC-3c/OC-12c POS / Interface & Stacks SONET ATM-AAL5 & Stacks OC-3cPHY PHY Slide 9 Iub, Iur, Iu
    • RNC Emulator Solution Test Solution (Protocol & Capacity testing) for 3G/UMTS Node B Iub User Plane (Iub-UP) interface Node -B RNC-Emulator OC-3 Ports Air Interface ATM Network Node -B “ENTITE” Test Manager CDS Devices Under Test 10/100Mb Ethernet Network Interface (IP & 10/100MB Ethernet) MPC-75X TCP/UDP & IuB-UP controller OAM VxWorks Network Interface Sun Solaris C5 C5 Driver & APIs (IP & I0/100MB ETH) 10/100MB ETH Framing AAL2 SSSAR TCP/UDP API’s, Test Cases Protocol (FP) AAL2 CPS ENTITE & Specifications IP/ETH ATM 100MB T SONET Iub-UP & OAM Test Manager 10/100Mb ETH OC-3C PIM Slide 10
    • RNC Emulator Features 3G/UMTS Iub protocol stacks & User Plane Framing Protocol emulation for functionality & performance testing of Node B. ? Interfaces per chip: 1 OC-3c (SONET), 2 ? 3GPP Framing Protocol Support & 100MB Ethernet (one for MCP-750, Frame Emulation: another for logger communication) • Iub Interface User Plane Protocols for ? ATM Layer functions: Conforms to I.361 Common Channel Transport Data ? AAL2 Layer functions: Streams (ETSI TS125.435) & DCH ? AAL2 CPS functions : Data Streams (ETSI TS 125.427): Packing/multiplexing and ? Header & Payload CRC check & Unpacking/de-multiplexing, and CU generation, and framing Timer (10 ms) as per ITU-T I.363.2 ? Timing Adjustment & ? AAL2 SSSAR: Segmentation/Re- Synchronization assembly (max SDU size of 10K • Frames are built offline at CDS Host octets) & RAS Timer (20-100 ms with (MCP-750), and transmitted to Node- 1 ms increments) as per ITU-T B every TTI in DL direction over OC- I.366.1 3c. ? AAL2 VCs & channels (CIDs) : 512 VCs • UL frames from Node-B are logged & 2K CIDs (up to 255 per VC) for post processing ? Instances Support: Up to 3 C-5 boards • Call state machine for timing per CDS chassis, with one host MCP-750 adjustment and synchronization. board. • Extensive statistics gathering for call ? Generic API Support: A set of API is dynamics. available on the host to control the host and C-5 boards for RNC Emulator • Up to 720 3G calls, aggregating a total 2K AAL2-CID components and functionality. 8*E1 bandwidth over OC-3c, per C-5 ? ENTITE: A Test Manager from Motorola on chip. Solaris Slide 11
    • RNC Emulator: C-5 Network Processor Software Architecture XP Iub Frames Iub-FP Tables Iub-FP UL Iub-FP DL AAL2 SSSAR Tx AAL2 SSSAR Rx (CP13) (CP12) (CP10/11) (CP8/9) AAL2 CPS packets ATM/AAL2 Tables DCH/CCH Frames AAL2 CPS Tx AAL2 CPS Rx TLU (CP6/7) (CP4/5) IP/UDP Tables AAL2 Cells ETH/IP/UDP Traffic Mgmt (CP2/3) SRAM (Table Memory) C-5 (CP14/15) ATM & SONET (CP0/1) ETH PHY OC-3c PHY 2 X 100MB Ethernet OC-3c Slide 12
    • ATM/AAL2 Protocol Structure User 1 User 2 User 3 User n CID x CID y CID z Application layer User packet User packet SAP 1 to 65586 octets SSCS (Service Specific SSSAR (Service Specific Service Specific Convergence Sublayer - Segmentation And Reassembly Sublayer I.366.2) sublayer - I.366.1) Header Header AAL-2 Common Part CID LI UUI HEC CID LI UUI HEC layer Sublayer (CPS) - User packet User packet I.363.2 CPS packet CPS packet STF CPS packet CPS packet Fragment 1 STF CPS packet Fragment 2 CPS PDU CPS PDU SAP ATM layer ATM ATM ATM SDU ATM SDU Header Header ATM Cell Slide 13
    • ATM Processing Egress Port ATM QOS AtmAal2Cntl CBR/VBR/ UBR Class Q Q ATM SDUs ATM SDU Q ATM SDU ATM-Init Event Registers Context Switching ATMTx ATMRx Header Header ATM SDU Merge Config Extract Space Reg ATM SDU Space TxSDP ATMTxDRV AtmRxDrv RxSDP OC-3c PHY Line Slide 14
    • AAL2 CPS Rx Processing AAL2 Rx Q AAL2 Tx Q CPS Packets CPS-PDU aal2RxInit Event Registers Context Switching aal2RxHdlr Partial CPS Pkt CPS Pkt Hdr aal2RxFwdr Merge Config Extract CPS-PDU Space Reg Space CPS Pkt Payload TxSDP aal2RxDrvTx STF + Partial CPS Pkt + CPS- aal2RxDrvRx PDU payload RxSDP Slide 15
    • AAL2 CPS Tx Processing aal2TxInit Event Registers Context Switching ATM SDUs aal2TxHdlr Partial ATM SDU + aal2TxFwdr rt-VBR Class Q CPS Pkt Hdr + STF CU Timer Start Event AAL2 Tx Q CPS Pkt Merge ConfigR ATM SDU XP CU Timer Q Extract Payload Space eg (CPS-PDU) Space Partial ATM SDU + CPS CU Time out Q TxSDP aal2TxDrvTx Pkt Frag1 + STF + CPS aal2TxDrvRx RxSDP Pkt Frag2 + … . Slide 16
    • C-Port NP Based PDSN Solution A Case Study Slide 17
    • PDSN Application GRE/PPP Interface towards SDU and IP Interface towards the Core network PDSN Host CPU CHAP IPCP PAP CCP LCP PDSN Card X N RIP RADIUS MIP IKE OSPF UDP C5 Host APIs C-5 Driver PCI C5 Tunneling/Detunneling Host Driver Ext Co-proc Control Packet Control Relay Funcs Functions IP Control Packets PPP Crypto/Compression IP/IPSEC Data Packets Glue GRE IP ARP FP Processor ETH/POS GbE/OC-12 GbE/OC-12 Fabric Interface: Co-proc Interface: PHY PHY UTOPIA, CSIX etc. PL3, Streaming etc. To/From RAN To/From IP Core Slide 18
    • PDSN Application - Features A C-Port NP based solution for the bearer plane functionality of PDSN ? GRE Tunneling (RFC 2784 & 2890 ) ? GRE Checksum support ? GRE Key Support ? No support for GRE Sequence Number required for packet reordering ? User Plane PPP-IP Termination ? Byte Synchronous HDLC Like Framing with 16/32 bit FCS support (RFC 1662) ? Control Character (PPP Flag & Escape Sequence ) Transparency (Sec 4.2 RFC1662) ? IP Encapsulation & De-capsulation (without supporting IP Fragmentation & Reassembly & IP Header Options processing) (RFC 791) ? No support for PPP Frame Reassembly ? R-P Interface ? Half Rate Full Duplex GbE with GMII Interface to PHY (802.3) ? IP Host Behavior ? Core Interface ? Half Rate Full Duplex GbE with GMII Interface to PHY (802.3) ? IP Router Behavior ? Scalability ? support for 30K subscriber I.e. 30K parallel GRE Tunnels and their associated PPP Sessions ? Performance ? 144 Kbps of throughput per user with 3K Active User I.e. 144 Kbps x 3K = ~450 Mbps of Aggregate Throughput Slide 19
    • PDSN Application: C-5 Network Processor Reference Architecture BCM (Table Memory) Session Data Table Host Driver Session ID = 16 bit Key XP Control Packet R-P/PPP Session Params Cluster 4 PPP Control Relay function (CP12-CP15) MS-IP HTK Tables PPP/IP-R RX & TX packets ARP IP DA (MS Addr) = 32 bit Key TLU R-P/PPP Session ID Control packets GRE HTK Tables IP SA (PCF Addr) + PPP GRE Key = 64 bit Key packets IP packets IP packets R-P/PPP Session ID TNL HTK Tables TxSDP RxSDP IP SA (HA Addr) = 32 bit Key IP-in-IP Tunneling GRE RX & TX CPRC Tunnel ID Tunneled IP GRE packets packets C-5 Cluster 1 (CP0-CP3) Cluster 2 (CP4-CP7) GbE/IP-H Rx & TX GbE/IP-R RX &TX GbE PHY GbE PHY Slide 20
    • Implementation Challenges •Functional Partitioning & Efficient/Optimal usage of NP resources –Usage of NP resources (I.e. CP’ TLU, Bit/Byte processor etc.) s, – Memory constraints (code & data memory) System modeling through initial prototypes. Effective usage of simulator for verifying the model & other results • Cycle Time budget –Ingress/Egress port speed (e.g. OC3/12, GbE etc.) –Throughput requirements (in terms of PPS) Quick prototype and verification using simulator for projecting cycle time budgets • External Interfacing –Supporting high throughput requirement. High speed interfaces like FP , GbE/FE etc. for exchanging the bearer & using PCI for control plane interfacing • Testing –Non-availability of test tools Scripts for testing on simulator. Use CDS/C5 as load tester Slide 21
    • GSG-India: C-Port Solution Provider Motorola Smart Developer News: May 2002 MIEL: A New Smart Networks Alliance Member Providing Design Services for the C-Port Network Processor Family MIEL, Motorola India Electronics Pvt. Ltd., part of Motorola's Global Software Group (GSG) is based in India and is a premier provider of software solutions and services to Motorola customers worldwide. The company has extensive experience in developing application software for the C-Port family of network processors. MIEL offers the following services: •Enhancement and customization of CST reference applications •Sub-system solutions development, including control plane stack software and its integration with applications running on the C-Port family of network processors •Development of automated test solutions (for example, MIEL is currently developing a C-Ware™ Development System (CDS)-based solution for testing wireless Node B devices) Slide 22
    • GSG-India Contacts • Business Head: – Bhaskar Harita (ABH003@email.mot.com) • Operation Manager: – Jagannath Rao (AJR001@email.mot.com) • Technical Staff: – Manoj Wagle (A12651@email.mot.com) – Radhakrishna C (A12671@email.mot.com) Slide 23
    • References • www.3gpp.org - 3GPP standards • www.3gpp2.org - 3GPP2 standards • C-PORT NP documents Slide 24
    • Q&A Slide 25