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Presentation given at PCB Europe '98 - Design for Manufacture
 

Presentation given at PCB Europe '98 - Design for Manufacture

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A team based presentation given at PCB Europe '98 where we took over a whole afternoon session and gave a detailed review of our design process for PCB Design for Manufacture to a knowledgeable group ...

A team based presentation given at PCB Europe '98 where we took over a whole afternoon session and gave a detailed review of our design process for PCB Design for Manufacture to a knowledgeable group of industry insiders. Very well received, and a once in a lifetime opportunity to give such a broad demonstration of capability.

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    Presentation given at PCB Europe '98 - Design for Manufacture Presentation given at PCB Europe '98 - Design for Manufacture Presentation Transcript

    • With the explosion of products in today’s markets with significant electronics content, PCB Design for Manufacture has become a vital competence. This presentation will take an item of advanced avionics equipment as a case study to show how the requirements from multiple disciplines are treated throughout the product design verification and validation cycle. The presentation will highlight the techniques and infrastructure that are required to deliver sufficient organisational capability. We will discuss how the requirements from the different disciplines involved are explored, managed and flowed down to the PCB design itself. The following disciplines will be considered: i) The Product Design Process. ii) Thermal Management. iii) Thermal Simulation, Assessment and Solder Joint Reliability. iv) PCB Assembly and the Soldering Process. v) PCB Fabrication. vi) PCB Design. PCB Design for Manufacture in an Advanced Military Avionics Application Neil Whitehall Eric Ferguson Bill Bradshaw Peter Dalglish Jack Alexander Andrew Barker Bruce Wilkinson
    • PCB Design for Manufacture in an Advanced Military Avionics Application. 1. Design Process - Neil Whitehall. 2. Thermal Management - Eric Ferguson. 3. Thermal Simulation, Assessment & Solder Joint Reliability - Bill Bradshaw. 4. PCB Assembly - Peter Dalglish. 5. PCB Fabrication - Jack Alexander. 6. PCB Design - Andrew Barker. 7. Convection Reflow Soldering Profiles - Bruce Wilkinson.
    • PCB Design for Manufacture in an Advanced Military Avionics Application Neil Whitehall Eric Ferguson Bill Bradshaw Peter Dalglish Jack Alexander Andrew Barker GEC Marconi Avionics, Radar and Countermeasures Systems. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Session Themes  Theme 1 : The Design Process.  Theme 2 : Thermal Management.  Theme 3 : Thermal Simulation, PCB Stress & Solder Joint Reliability.  Theme 4 : PCB Assembly & Soldering Process.  Theme 5 : PCB Fabrication.  Theme 6 : PCB Design.  Panel Questions & Answer Session. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • The Design Process Neil Whitehall, Electronics Process Manager, GMAv RCS-Edinburgh. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Agenda     Business Drivers Integrated Product and Process Development. A Generic Systems Engineering Process Model. A Tailored Process Model for PCB DFM. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Business Drivers : Why are we in Business ? THE GOAL : TO MAKE MONEY Bottom line measurements ... RETURN ON INVESTMENT (Relative) NET PROFIT (Absolute) What is the bridge ? ACTIONS Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 CASH FLOW (Survival)
    • Our Actions & Competitiveness THE COMPETITIVE EDGE IMPACT : OPERATIONAL MEASURES LINKED TO ACTIONS THROUGH THE BRIDGE. RETURN ON INVESTMENT NET PROFIT THROUGHPUT (FUTURE) INVENTORY COMPETITIVE EDGE Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 CASH FLOW OPERATING EXPENSE
    • The Value Chain Customer / Prime Value Requirements Requirements Aircraft Consortium Radar Consortium Value Value Requirements Value PCB Assembler Requirements PCB Fabricator Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Suppliers 1 to ‘N’
    • Value through Price & Performance Performance Price Value Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Performance through Dependability and Features Dependability Features Performance Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Enabling & Limiting Constraints Level of Achievement of the Design Team Enabling Constraints Design Process Performance Achievement Ceiling Limiting Constraints Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Integrated Product & Process Development (IPPD) CE : Cultural Approach Continuous Improvement CMM Phased Improvement Plans Focused on Key Process Areas & Adoption of Key Practices SRR RBD FDR FBD Get the Right Data, to the Right Place, at the Right Time, in the Right Format. CMM Process Assessments : Organization Disconnects & Dysfunctional Links. Focused Improvement through Business Constraint Identification. The earliest possible integration of the overall company’s knowledge, resources and experience into creating successful new products. Integrated Product Teams. People Development. Process Education & Training. Co-location & Communication. Layer 5 : Decision Support. Layer 4 : WM & Metrics. Layer 3 : PDM. Layer 2b : Inter-operable Tasks. Layer 2a : Interoperable Tools. Layer 1 : Interoperable Computing. Product Lifecycle Management SDR SBD CE : Logistical Approach PDR PD DD CDR TRR Imp FCA / PCA T&I Systems Engineering Generic Activity Sequence Focussing on Adding Value through Product Features, Product Dependability and Product Price. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 A&C
    • CE : Logistical Focus  Concurrent Engineering (CE) • Definition #1 : Logistical Focus. • “Get the right data, To the Right Place, At the Right Time, In the Right Format”. • Don Carter & Barbara Stillwell Baker. • ‘Concurrent Engineering - The Product Development Environment for the 1990s’. • Volume 1 & 2 : ISBN 0-201-56349-5.  Can data be managed in the same way as inventory is managed in production ?  Can people be disciplined enough to change their own working cultures ? Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Carter’s Process Support Layers.  Layer 1 : Inter-operable Network Computing.  Layer 2a : Inter-operable Tools.  Layer 2b : Inter-operable Tasks.  Layer 3 : Product Data Management.  Layer 4 : Workflow Management & Metrics.  Layer 5 : Requirements & Decision Support. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Inter-operable Network Computing File/Print Server Database Server Data Management Level UNIX Server Windows Applications Server Application Delivery Level User Interface Level Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Inter-operable Tools Models Saber Template Library Saber Component Library Smartmodel Library Library Management LMS Manager, PDS Axiom Compliers Aspect Integration Mentor Schematics Design Architect Design Architect Aspect Client Integration LMS Aspect CCDB Explore CIS VIP Database Sherpa Integrator Sherpa PDM Analogy Simulation Saber Thermal / Stress Simulation PNC PCB Explorer, VibPlus, PCB Fatigue & Soldersim Mentor Simulation QuickSi QuickSim QuickVHDL II m II QuickVHDL Pro Pro Mentor Layout Spectra 65, Quad XTK Valor Enterprise 3000 Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Sherpa Data Vault
    • Inter-operable Tasks EDA LIBRARY SYSTEM TASKS Component Request New PCB Recognised Information Gathering Symbol Request Model Request Geometry Request Quad Model Request Thermal Request New PCB Jobs Buffer Generate Symbol Generate Model Generate Geometry Generate Quad Model Thermal Model TO PCB TASKS EDA Part Assembly and Test Metrics Input Metrics Database Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 $DEVLIB $RLSLIB Metrics Analysis
    • Product Data Management MRP Manufacturing Procurement PDM PDM = Product Data Management MRP = Materials Requirements Planning CDM = Component Data Management CDM Design Engineering Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Workflow Management & Metrics • • • • • • • • • • • • • • • • • 1 - Project Start Date 2 - LRU Level Plan Released 3 - PEC Development Plan Released 4 - LRU Functional Requirement Spec Released 5 - PEC Functional Requirement Spec Released 6 - First Component Specification Request 7 - First EDA Component Request 8 - Last Component Specification Request 9 - Last EDA Component Request 10 - Last PCB Interconnect Change 11 - Last PCB Component Positional Change 12 - PCB Outline Finalized 13 - PCB Technology Type Chosen 14 - Thermal Strategy Decided 15 - Preliminary PEC Design Review 16 - PEC Thermal Assessment Completed 17 - Advance PIL Issue Date • • • • • • • • • • • • • • • • • • 18 - PEC Design Checklist Completed 19 - PEC Detailed Design Description Issued 20 - Development Components Ordered 21 - PIL Issued 22 - PEC Design Review (Sign Off) 23 - PCB Manufacturing Data Released 24 - PCB Delivered 25 - PEC Prototype Available 26 - PEC Test Specification Issued 27 - Development Test Equipment Available 28 - Development Test Completed 29 - Development Components Delivered 30 - Production Components Ordered 31 - Production Components Delivered 32 - First Delivery 33 - Reliability Assessment Completed 34 - FMEA Completed 35 - PIL Updated for Obsolescence Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Requirements & Decision Support Customer's Development Activities Response Specification and Drawings Customer Equipment and Operational Environment System Reqts Spec System Engineering Activities Response Specification and Drawings Trials Integrate with Customer's Equipment Integrate and Test System Accept Validated System and Sub Systems Tested and Partially-Proven System Sub System Reqts Spec Sub System Engineering Activities Response Specification and Drawings Integrate and Test Sub Systems Tested and Partially-Proven Sub System Building Block Reqts Spec Design Building Blocks Response Specification and Drawings Detail Drawings and Plans Produce Building Blocks Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Test Building Blocks Building Blocks Tested and Partially-Proven Building Blocks
    • CE : Cultural Focus  Concurrent Engineering (CE) • Definition #2 : Cultural Focus. • “defined as the earliest possible integration of the overall company’s knowledge, resources, and experience in design, development, marketing, manufacturing, and sales into creating successful new products, with high quality and low cost, while meeting customer expectations.” • Sammy G. Shina. • Concurrent Engineering and Design for Manufacture of Electronic Products, 1991. • ISBN 0-442-00616-0. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Integrated Product Teams 3,4 1,2 33,34 Project Design Team Project Management. 5,15,19,22,26,27,28,35 Electronic Design Team Integrated Logistics Support 25,32 ECAD & PCB Design Printed Circuit Assembly 7,9,10 11,13 18 Designer 24,29 31,32 6,8 Mechanical Design Team Production Planning Thermal & Stress Component Engineering 20,23,30 Procurement Configuration Management 17,21 Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Interconnections Engineering 13 12 14,16
    • Co-location & Communication Interconnections 25m Engineer PCB Design 10m 15m Useful Interaction 19m 15m Thermal Engineer 4m Stress Engineer Sum of All Distances = 78m. Average Distance = 13m. 10m Longest Distances = 25m. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Education & Training from Process Definition 4. Executed on Projects 3. 7. Tailored Plans 6. Training & Education Plans 2. Standard Plans Skills Audits 5. 8. Process Review Skill Identification 9. 1. Process Definition Improvement Plans Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • A Generic Systems Engineering Process Model : Project View SRR RBD FDR SDR FBD SBD PDR CDR PD DD SEGAS TRR Imp FCA / PCA T&I A&C G PROVIDE SPECIALIST SUPPORT G F START PLAN AND MANAGE SYSTEM DEVELOPMENT F A B SUB SYSTEM ENGINEERING FUNCTIONAL DECOMPOSITION SUB-SYSTEM DESIGN PROCUREMENT MANUFACTURE INTEGRATION AND TEST SUB SYSTEM DELIVERY D DESIGN AND SPECIFY SYSTEM C CREATE SOLUTION CONCEPTS H E PROVE COMPLIANCE K DETERMINE REQUIREMENTS ADJUST EMERGING DESIGN ANALYSIS MODELLING AND SIMULATION Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 J PLAN AND ANALYSE TRIALS L IN SERVICE SUPPORT PROTOTYPE I INTEGRAT E AND TEST SYSTEM H E
    • Design Verification & Validation Customer's Development Activities Response Specification and Drawings Customer Equipment and Operational Environment System Reqts Spec System Engineering Activities Response Specification and Drawings Trials Integrate with Customer's Equipment Integrate and Test System Accept Validated System and Sub Systems Tested and Partially-Proven System Sub System Reqts Spec Sub System Engineering Activities Response Specification and Drawings Integrate and Test Sub Systems Tested and Partially-Proven Sub System Building Block Reqts Spec Design Building Blocks Response Specification and Drawings Detail Drawings and Plans Produce Building Blocks Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Test Building Blocks Building Blocks Tested and Partially-Proven Building Blocks
    • Project View, Process View & Time System Engineering Process Model Time Design Verification Throughout the Product Hierarchy Design Validation Through Development Test & System Integration Manufacture Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • A Tailored Verification Process Model for PCB DFM Aircraft Platform Thermal & Stress Models Black Box Cassette PCB PCB Design PCB Fabrication Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 PCB Assembly
    • Requirements & Modeling in the PCB DFM Verification Process Supported by Read Across From Prior Projects EFA Platform Requirements Platform Thermal & Stress Requirements Black Box Enclosure Thermal & Stress Requirements Cassette Cassette Thermal & Stress Requirements PEC Constraints on PCB Design Assemblers Capability & Our Requirements PCB Design Sea Harrier Platform Requirements & Measurements from Validation Fabricators Capability & Our Requirements PCB Fabrication Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 PCB Assembly
    • Speakers by PCB DFM Theme Aircraft 5. Black Box 4. 3. Cassette PEC Thermal Management E.Ferguson Thermal Analysis B.Bradshaw 1. PCB Design A.Barker PCB Fabrication J.Alexander 2. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 PCB Assembly P.Dalglish
    • Design Process : Bibliography        ‘The Theory of Constraints’ - Eli Goldratt. - ISBN 0-88427-085-8. ‘Information Integration for CE (IICE)’. - Wright Patterson Air Force Base, 1995. ‘CE - The Product Development Environment for the 1990s’. - Don Carter & Barbara Stillwell Baker. - Volume 1 & 2 : ISBN 0-201-56349-5. ‘Concurrent Engineering and Design for Manufacture of Electronic Products’. - Sammy G. Shina, 1991. - ISBN 0-442-00616-0. ‘Developing Products in Half the Time’. - Preston G. Smith & Donald G. Reinertsen. - ISBN 0-471-292-524. ‘Managing the Design Factory - The Product Developer’s Toolkit’. - Donald G. Reinertsen. - ISBN 0-684-83991-1. ‘Optimizing Quality in Electronics Assembly’. - James Allen Smith & Frank B. Whitehall. - ISBN 0-07-059229-2. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Speaker Biography   Neil Whitehall (Electronics Process Manager). After studying for a degree in Electronics and a Masters in Digital Systems Engineering Neil joined Ferranti Defense Systems in 1988. He is now responsible for Design Process Infrastructure / Support, Improvement Plans and Budgets and for managing the ECAD, PCB and Hybrid Design Groups. This was proceeded by technical roles using Silicon MCM-D & WSI, Signal Processing systems using DSP and FPGA technologies and ASIC design making use of RISC processor cores and advanced DFT techniques such as LBIST, MBIST and BSCAN. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Summary - Session Themes        Theme 1 : The Design Process. Theme 2 : Thermal Management, Simulation & Assessment. Theme 3 : Stress Analysis of PCBs & Solder Joint Reliability. Theme 4 : PCB Assembly & Soldering Process. Theme 5 : PCB Fabrication. Theme 6 : PCB Design. Questions & Answers. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Panel Questions & Answer Session Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Thermal Management Eric Ferguson, Chief Thermal Engineer, GMAv RCS-Edinburgh. Radar and Countermeasures Systems Page 1 PCB Europe : Design for Manufacture 07/06/99
    • Thermal Engineering A MEANS OF IMPROVING RELIABILITY Radar and Countermeasures Systems Page 2 PCB Europe : Design for Manufacture 07/06/99
    • Failures Caused By Environmental Stress Screening (ESS) THERMAL Temperature Cycling High Temperature Thermal Shock Low Temperature Environment Humidity % 20.8 10.2 6.9 6.7 5.8 2.8 MECHANICAL Random Vibration Fixed Vib Frequency Sweep Vib Frequency Mech Shock Acceleration Altitude % 19.1 6.8 6.1 4.5 1.7 1 ELECTRICAL Electrical Stress % 7.6 ELECTRICAL (8%) MECHANICAL (39%) Radar and Countermeasures Systems Page 3 PCB Europe : Design for Manufacture 07/06/99 THERMAL (53%)
    • Gripen Avionics Cooling Air Parameters •Inlet Temperature: 0°C ±10 •Mass Flow: 20 g/s per kW •Pressure Potential: 3 kPa Radar and Countermeasures Systems Page 4 PCB Europe : Design for Manufacture 07/06/99
    • Sea Harrier (MLU) Avionics Cooling Air Parameters •Inlet Temperature: 30°C •Mass Flow: 35 g/s per kW •Pressure Potential: 1.5 kPa Radar and Countermeasures Systems Page 5 PCB Europe : Design for Manufacture 07/06/99
    • Eurofighter Typhoon Avionics Cooling Air Parameters •Inlet Temperature: 54°C •Mass Flow: 58 g/s per kW •Pressure Potential: 0.5 kPa Radar and Countermeasures Systems Page 6 PCB Europe : Design for Manufacture 07/06/99
    • Radar Cooling Air SUPPLY PRESSURE TEMPERATURE INLET OUTLET 3 71 70 2.5 60 2 1995 55 50 50 40 kPa 1.5 30 1 1990 20 10 0.5 1985 1990 1995 0 1985 0 -10 Radar and Countermeasures Systems Page 7 PCB Europe : Design for Manufacture 07/06/99
    • Avionics Cooling Air NAVIGATION & CONTROL AVIONICS MAIN ENGINE COCKPIT 25 kW COCKPIT BYPASS VALVE 2.3 MW ECS RADAR COOLING AIR 1 % EFFICIENCY Radar and Countermeasures Systems Page 8 PCB Europe : Design for Manufacture 07/06/99
    • Component Temperatures: Design Aim Component Obsolescence 120 °C Recommended MAXIMUM JUNCTION TEMPERATURE Customers Demand Improved Reliability Increased Transparencies 100 °C Component Temperature Penalty 85 °C Component Case Temperature THERMAL DESIGN WORKING RANGE Coolant Pressure Coolant Temperature Datum 0 °C 1985 1990 1995 2000 Radar and Countermeasures Systems Page 9 PCB Europe : Design for Manufacture 07/06/99 Future Offensive Aircraft
    • Cooling Technique Heat Exchangers Cooling Air Inlet Air Outlet Radar and Countermeasures Systems Page 10 PCB Europe : Design for Manufacture 07/06/99
    • Typical PSU CFD Analysis Radar and Countermeasures Systems Page 11 PCB Europe : Design for Manufacture 07/06/99
    • PCB Cooling Technique Surface Mount PCB Internal Serrated Finning Heat Exchanger Frame Cooling Air Inlets Radar and Countermeasures Systems Page 12 PCB Europe : Design for Manufacture 07/06/99
    • Heat Exchanger Air Outlet @ 71°C CFD Analysis Air Inlet @ 54°C PCB Substrate Temperatures Heat Exchanger Inlets Power Hybrid @ 87°C Radar and Countermeasures Systems Page 13 PCB Europe : Design for Manufacture 07/06/99
    • Power Hybrid Component Heat Load = 18 Watts Radar and Countermeasures Systems Page 14 PCB Europe : Design for Manufacture 07/06/99 CFD Analysis
    • Summary  Thermal Engineering: A Means of Improving Reliability  Environmental Conditions on Aircraft are getting worse for avionic systems  Mitigated by investment in CFD and specialised thermal software  Future Offensive Aircraft: Non-traditional cooling techniques will be utilised ….. Radar and Countermeasures Systems Page 15 PCB Europe : Design for Manufacture 07/06/99
    • Thermal Analysis of PCBs & Solder Joint Reliability Bill Bradshaw, Senior Thermal Engineer, GMAv RCS-Edinburgh. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Thermal Analysis of PCBs and Solder Joint Reliability      Agenda Computer thermal modelling of PCB assemblies Interpretation of results Verification using IR camera Solder joint fatigue parameters Calculation and measurement of PCB CTE Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Computer modelling Two types of analysis   Steady state Transient Target: ensure reliability is not compromised by thermal environment Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Computer Modelling Input  PCB outline and construction  Component layout  Component thermal data: JC and power dissipation  Component lead geometries  Component masses  Operating environment (worst case) Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Thermal Analysis Results  Component temperatures - Junction - Case  PCB temperatures - Top surface - Centre - Bottom surface  Coloured thermal contour map Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Table of temperatures ***** TEMPERATURE(C) INFORMATION ***** APPLIED COMPONENT U-NAME PART NAME POWER JUNC TOP BOTTOM -------- ---------------- -------- -------------------R1 RN 0.025 66.87 66.64 65.41 R2 RN 0.025 65.15 64.92 63.69 U1 UPX 1.000 78.26 75.75 75.82 U2 UPX 1.000 77.51 75.00 75.07 U3 UPX 1.000 69.02 66.51 66.57 U4 SILC 0.075 58.45 58.18 57.97 U5 SILC 0.075 59.91 59.64 59.44 U6 TCON 0.100 65.31 64.96 64.68 U7 22V10 0.250 76.59 73.19 65.17 U8 512K8 0.375 86.38 83.69 77.53 U9 512K8 0.375 86.57 83.87 77.71 U10 512K8 0.375 85.33 82.64 76.48 U11 512K8 0.375 82.45 79.76 73.60 U12 512K8 0.375 86.54 83.85 77.69 U13 512K8 0.375 86.80 84.10 77.94 Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 BOARD LAYER FRONT MID BACK -------------------64.55 64.48 63.83 63.17 63.12 62.55 73.26 72.93 71.81 72.43 72.11 71.13 64.02 63.70 62.50 57.16 57.13 56.71 58.73 58.70 58.35 63.87 63.83 63.38 62.18 61.88 60.98 75.60 75.37 74.47 75.53 75.26 73.72 74.02 73.80 72.51 71.05 70.76 69.37 75.51 75.30 74.42 75.46 75.22 73.68
    • Colour contour thermal map Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Create thermal report containing:     Assumptions including boundary conditions Predicted component and PCB temperatures Colour thermal contour map Requirements • thermal vias • changes to PCB construction • relocation of hot components Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Infra-red scanning  Used for - verifying thermal analysis - fault finding   faulty components short circuits in PCBs Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Typical Infra-red image Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Infra-red image of fault in PCB Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Solder joint reliability Some factors affecting the fatigue life of solder joints  Stand off height  Lead shape  Component size  Crystalline structure of solder joint  Type of solder  Conformal coating  Temperature extremes  Dwell time at temperature extremes  Temperature ramp rate  Shape of the solder joint  Difference in CTE between components and PCB Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • PCB coefficient of thermal expansion CTE is affected by:  dielectric material  copper thickness  constraining layers  heat ladder  PCB mounting Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Good leadless component solder joints Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Fatigued leadless component solder joints Cracks Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Spreadsheet calculation of CTE Performed before thermal analysis Require:  Exact PCB layer construction  Material physical properties Young’s Modulus or tensile modulus CTE Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • CTE spreadsheet calculation A B C D E F SSPE, AB side PCB, 3990/09871 CTE Y Mod psi ThicknessC*D E*B copper track 16 17 1.54 26.18 418.88 Invar 1 21 FR4 16 2.5 polyimide/glas 14 3.5 polyimide film 70 1.7 Carbon 3.4 5.3 PI/aramid 7.5 2.26 22.2 50.172 376.29 Cu core 16 17 1.4 23.8 380.8 molybdenum 4.9 47 Epoxy/Kevlar 6.5 4.4 Aluminium 23 10 Ablefilm 100 1.9 25.14 100.152 1175.97 Overall CTE 11.74 Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Measuring CTE  Use strain gauges - first gauge bonded on sample of known CTE - second gauge bonded on test PCB  Construct Wheatstone Bridge circuit  Measure voltage offset across bridge at set temperatures  Calculate CTE Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Wheatstone Bridge circuit 120 Ohms Test Gauge V in V out 120 Ohms Reference Gauge Temperature cycling Chamber CTE sample = 4(Vout(high temp) - Vout(low temp)) + CTE reference Vin *  * T Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • CTE: measured v calculated  Measured value - X axis 9.9 ppm - Y axis 10.6 ppm  Calculated value - Both axes 11.7 ppm Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Solder joint fatigue calculations Fatigue life of LCCC solder joints 3000 68 pin lcc Number of cycles 2500 32 pin lcc 2000 1500 44 pin lcc 1000 Design aim 200 cycles 500 0 0 2 4 6 8 CTE PCB minus CTE component (ppm) Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 10 12
    • Finally: When the following checks are deemed to be satisfactory, we can proceed with the design:  computer thermal modelling  CTE calculations and measurements  fatigue life calculations  temperature cycling tests Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Speaker Biography   Bill Bradshaw (Senior Thermal Engineer). Bill joined Ferranti in 1975 after studying Applied Physics. He worked initially as a Gyro Design Engineer and later moved to Radar Systems where he joined the Interconnections Engineering Group where he defined the Static Handling Procedures and quality standards for soldering processes. For the last 18 months Bill has worked in the Thermal Engineering Group, where he performs Thermal Modelling of hardware designs and thermal assessments of hardware using IR camera techniques. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • PCB Assembly & Soldering Process Peter Dalglish, Chief Interconnections Engineer, GMAv RCS-Edinburgh. Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 1 07/06/99
    • Agenda  PCB Assembly and Soldering Process - PCB Assembly Process     Solder Paste Measurements Component Pick and Place Placement of Fine Pitch Components Convection Reflow - Cassette Assembly Process    Assembly Process Vacuum Process Adhesive Curing Process - DFSSM Scorecard Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 2 07/06/99
    • The Example Assembly Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 3 07/06/99
    • PCB Assembly Process 2 Components : De-gold & tinning required. 1 Prioritize Boards & Split Kit. De-gold & Tin Components 3 Load Components Load Drive Tape, Inspection. Components : De-gold & tinning not required. 6 4 PCBs Boards in Pre Bake Oven. Radar and Countermeasures Systems PCB Europe : Design for Manufacture 5 PreAssembly & Inspection. Page 4 07/06/99 Dessicant Cabinet, Screen Print Boards. 7 Pick & Place, Convection Re-flow, Inspection.
    • Solder Paste Measurements Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 5 07/06/99
    • Component Pick and Place Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 6 07/06/99
    • SMT Hot Gas Workstation Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 7 07/06/99
    • Convection Reflow Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 8 07/06/99
    • Convection Reflow Set Points Set 170°C 180°C 200°C 300°C Actual 170°C 180°C 200°C 295°C PCB Top Conveyor Belt Bottom Set 170°C 180°C 200°C 300°C Actual 170°C 180°C 200°C 295°C Conveyor Speed Setting 28.0 cm/min. Conveyor Speed Actual 27.1 cm/min. Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 9 07/06/99
    • Convection Reflow Thermal Profile Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 10 07/06/99
    • Cassette Assembly Process 1 2 Start Prioritize and Place in Queue Receive Builds from Stores Path for Brazed Skinned Cassettes 3 4 Cure Boards and Measure Adhesive Thickness Screen Print with Adhesive 5 Assemble Cassette & Cure 8 Path for Brazed Skinnless Cassettes 6 Apply Pre-formed Adhesive & Vacuum Bag 7 Cure Cassette Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 11 07/06/99 Inspection
    • Skinless Cassette Structure Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 12 07/06/99
    • Cassette Assembly Drawing Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 13 07/06/99
    • DFSSM Scorecard DSSM SCORECARD FOR PCB ASSEMBLIES T A R G E T S IG M A L E V E L O FD This Scorecard is not a rule checker and assumes that the design adheres to GM5-01-M1 PRODUCT ECR 90 Radar ASSY DESC RGC SSPE (A/B SIDE) (Microwire) PART NO 390/02762 17/02/99 DATE ITEM DESCRIPTION No optional PCB THICKNESS mm PCB NO OF LAYERS THERMAL PLANES Y/N Heavy Hitters contributing mo CCT REF optional mandatory QTY PIN/ LEAD COUNT EACH mandatory mandatory COMPONENT Thermal SM TYPE Bonding LEAD SURFACE Presolder PITCH THROUGH Yes, No mm mandatory mandatory SM CHIP SIZE e.g. 1206 mandatory mandatory PROCESS WAVE REFLOW HAND mandatory DPU FTY PEC S ig m IN P U T 3633 p r e s o ld e r to u c h -u p /in s p r o lle d to u c h -u p /in s p & te s t DPM O a Level 9 5 .4 8 4 1 0 .0 0 % 26282 3 .4 4 D P U p o s t in s p F T Y r o lle d t e s t o n ly PEC DPM O 0 .1 6 2 5 8 5 .0 1 % 45 S ig m a L e v e l 1 QBS U1-4 4 66 s n 0.65 r 3 QBC U5 1 66 s n 0.65 r 5 SILC U6-10 5 66 s n 0.65 r 7 EC u11 1 192 s n 0.65 r 9 UPX U13 1 192 s n 0.65 r DATE 11 TCON U14 1 66 s n 0.65 r 1 8 /0 2 /9 9 13 EMID U15 1 24 s n 1.25 5 .4 2 r 15 HAU U12 1 192 s n 0.65 Microcircuit Digital U87 1 20 s n 1.25 ICD CMOS U16-31 16 28 s n 1.25 ICD CMOS U32-35 4 32 s n 1.25 ICD CMOS U36-39 4 68 s n 0.65 ICD CMOS U40-43 4 32 s n 1.25 ICD CMOS U48-49 2 32 s n 1.25 ICD Hex U50-51 2 20 s n 1.25 ICD Hex ICD Hex U52-53 U54 2 1 20 20 s s n n 1.25 1.25 r r 37 ICD Buffer U55-58 4 20 s n 1.25 r 39 ICD Buffer U59-70 12 20 s n 1.25 0 4 /0 8 /9 8 r 33 35 D a te C a p S h t. r 31 0 .0 0 % r 29 FTY r 28 3 .4 4 r 25 S IG M A r 23 DPU 9 5 .4 8 4 1 4 1 r 21 P r e -to u c h - u p , in s p e c tio n & t e s t r 17 H IS T O R Y r 41 ICD Buffer U71-76 6 20 s n 1.25 r 43 ICD Shift Register U77 1 20 s n 1.25 r 45 ICD Octal Register U78-84 7 20 s n 1.25 r 47 ICD Buffer U85 1 28 s n 1.25 r 49 ICD Buffer U86 1 28 s n 1.25 51 Capacitor C1-5 5 2 s n 2412 r 53 Capacitor c6 1 2 s n 2412 r 55 Capacitor c 95 2 s n 805 r 56 Capacitor c 8 2 s n 1206 r 57 Resistor R1 1 2 s n 1206 r Radar and Countermeasures Systems PCB Europe : Design for Manufacture D u e to th e s p a c e r e q u ir e d o n ly o n e lin e o f c a lc u la tio n s is a v a ila b le . T o in s e r t fu r t h e r c a lc u la tio n s o n e o f th e t h e s e b u tto n s m u s t b e c lic k e d t o s u it r e q u ir e m e n ts : - r Page 14 07/06/99 1 0 lin e ite m s r e q u ir e d 2 5 lin e ite m s r e q u ir e d 5 0 lin e ite m s r e q u ir e d 1 0 0 lin e ite m s r e q u ir e d
    • Summary  Change in board material gives substantial weight saving.  Removal of constraining layers.  Makes the reflow process easier.  Reduces overall board thickness.  Increases the choice of board supplier.  Rework easier to control.  More cassette in box i.e. reduce pitch.  Manufacturing window easier to control/standardize. Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 15 07/06/99
    • Speaker Biography   Peter Dalglish (Chief Interconnections Engineer). Peter began his career as a Mechanical Design Engineer in the machine tool industry. For the last 27 years he has specialised in electronic packaging for military avionics. Since 1989 he has been responsible for the Interconnections Engineering Group within the Radar Systems Division in Edinburgh. Lately his role has been expanded to manage the Thermal and Stress Engineering Groups in Edinburgh and act as Head of Discipline for Mechanical Engineering across Radar and Countermeasures Systems. Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page 16 07/06/99
    • DESIGN FOR MANUFACTURE PCB Fabrication Jack Alexander, Senior Interconnections Engineer, GMAv RCS-Edinburgh. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURE Manufacturing Data Package Generation Manufacturing Capability Interconnection Engineer Design Concept Board Technology Design Checklist Design Review PCB Design Checklist PCB Design Requirements Manufacturing Rules Design Rules Database Layout & Routing PCB Technologies Manufacturing Data Package Interconnection Engineer PCB Fabricator PCB Fabrication Fabricator Comments Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Data Package Edit Interconnection Engineer
    • DESIGN FOR MANUFACTURABILITY 8 Layer Multilayer Buried Via Inner Layers Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY 8 Layer Multilayer Plane Clearance Plated Buried Via Holes Overall Thru' Plated Hole Split Plane Division Plane Connection Polyimide Non-Woven Aramid Pre-Preg Polyimide Non-Woven Aramid Copper Foil + Plating Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY KEY PROCESS ROUTE Start 1 Data Package Edit Drilling Process Outer Layer Etch 5 3 2 Inner Layer Image Transfer T.P Hole 6 Conditioning & Electro-less Copper Plate 9 10 Clearance Hole Profile Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Bonding Process Inner Layer Etch 7 Outer Layer Image Transfer Final Inspection 4 8 Electroplating 11 Complete
    • DESIGN FOR MANUFACTURABILITY Front End Edit •Drawings & specifications examined •Customer liaison •Data is checked to manufacturing capabilities •Tooling instructions prepared •Production route & materiel's are planned Order and Data received from customer, is processed. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 •Job sheet raised & loaded to production
    • DESIGN FOR MANUFACTURABILITY PLATED BURIED VIA HOLES Plated Buried Via Holes Polyimide Non-Woven Aramid Pre-Preg Polyimide Non-Woven Aramid Copper Foil + Plating Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY INNER LAYER EXPOSURE U/V LIGHT SOURCE The laminated boards are exposed to strong Ultra-Violet light through an appropriate artwork for the job. Where the light shines through the clear parts of the artwork, the blue resist underneath is hardened. The areas of the artwork shown as brown, will block the light and the blue resist underneath will remain soft Phototool Etch resist Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURE INNER LAYER ETCH Printed feature after etching & stripping Copper track •After stripping, the printed circuit features can be seen as copper conductors. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY DRILLING High speed spindle machines are used for high accuracy & hole quality, which is confirmed by Laser during drilling. 4 & 5 spindle machines also work on a similar principle Each spindle is capable of drilling small holes at speeds of 110,000 R.P.M Stack of boards being drilled (Aluminum entry and Techboard exit materials) 960 Tool magazine Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY DRILLING Entry material To prevent burrs during drilling Exit material INNER LAYER Hole drilled Stack of boards to be drilled If the boards are multilayers, then it is important that the holes are in alignment with the inner layer features (pads), as shown in the cross section. through laminate Base copper Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY ELECTROPLATING Transporter Rectifiers Boards are jigged onto flight bars (above) which are automatically carried through a sequence of cleaning tanks, and then electrolytically plated with Copper. The plating window is 1.4 square metres (15 square feet) x2 A pair of flight bars of plated work is completed every 16 to 20 minutes Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY ELECTROPLATING This process is to build up enough thickness of copper in the holes to carry the signals of the circuit when finished. This copper is plated onto the carbon deposit left from the direct plating (Black Hole). There is a top coat of Tin plated as protection during etching Plated Through Holes (PTH) Tin plating Plating resist Base copper Plated copper Plated Tin Base copper Carbon Copper plating Plating resist Cross section view . .. . Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99 Plating resist . . .. . . . . . . .
    • DESIGN FOR MANUFACTURABILITY CLEARANCE HOLES AND PROFILE On a 3 spindle C.N.C machine, boards are routed in stacks using high speed carbide cutters (shown below). Air bearing spindles rotating at 24.000 r.p.m, cut a stack of three boards to size, and to within a 0.10 mm tolerance With 18 tool positions, non- PTH holes can be drilled at the same operation. Carbide Routing cutter Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY FINAL INSPECTION Chemical analysis and product testing Product Testing Video assisted Microscopy Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • DESIGN FOR MANUFACTURABILITY In Conclusion DESIGN RULES DATABASE MANUFACTURING RULES DATABASE JOINT DATABASE REVIEW RIGHT FIRST TIME PARTNERSHIP Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • Speaker Biography   Jack Alexander (Senior Interconnections Engineer). Jack has worked in the electronics industry for the past 38 years. After a brief spell in NC part programming for machined components, he transferred to an in-house unit manufacturing printed circuit boards for a period of 20 years. Latterly he held the position of Deputy Manager for the PCB Fabrication Group. This covered all aspects of design requirements for the manufacture of specialised, complex CTE controlled multi-layer PCBs for the Avionics Industry. For the last 9 years he has worked in the Interconnections Engineering Group, advising on design for manufacture and acting as a point of liaison with the company supplier base. Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99
    • PCB Design Andrew Barker, Physical Design Team Leader, GMAv RCS-Edinburgh. Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Agenda         High Level PCB Design Process. - EDA Library Process Receive Package - Design Checklist - MCAD Interaction PCB Layout - Methodology and Design Example Interaction with Thermal Engineering PCB Routing - Methodology and Design Example Post Processing PCB Design Process - Summary Conclusions Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Our Goal ! Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • PCB Design Process - High Level Design Start Design Complete 1 Receive Package 2 PCB Layout 4 3 Thermal Simulation PCB Routing 5 Post Processing Each step is represented by Data Input i) Function ii) Checks iii) Sign Off ‘n’ Requirements for each Discipline Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99 Data Output
    • EDA Library Process The Requirement An ECAD Library Entry will have Schematic Symbol Simulation Models e.g. Saber Quad Smartmodels Geometry e.g. Outlines Footprints Attributes Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Library Design for Assembly Goal - Fully Assembled, No Rework Requirements Placement Machine Fiducials Solder Resists Solder Screens Modification Capability Design Impacts Component Density Placement Machines Solderibility Rework Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Library Design for Fabrication Goal - Manufacturable PCB, High Yield Requirements Etching Pad and Track Sizes Plated Hole Sizes Clearances Resists Design Impacts Component Density Tracking Density Board Thickness / Number of Layers Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Library Design for Test Goal - Fully Assembled, Testable Board Requirements Test Point Access Design Impacts Component Density Breakout Via Pattern / Size Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Library Design for Thermal/Stress Goal - Reliability Requirements Thermal Models Layout Info - Build, Layers, Copper Coverage Design Impacts Footprint Sizes TV Geometries (Number of Holes) Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Design Start Stage 1 : Receive Package 2 1 Receive Package PCB Layout Contents 3 Thermal Simulation Checklist MCAD Drawings / Data Data Sheets Any Additional Information Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99 4 PCB Routing Design Complete 5 Post Processing Create Board Geometry Board Build - Technology Geometry Library Shortfall Enter into Progress System
    • PCB Design Checklist Sheet 1 Sheet 5 PRINTED WIRING BOARD (PCB) DESIGN CHECK LIST AT DESIGNER -- EDPG INTERFACE PRODUCT CODE NO. BOARD TITLE PCB DETAIL DRG NO LRU TITLE PRINTED WIRING BOARD (PCB) Ref.No.RMS/0170 Issue.8 ISSUE Design Approval Status CU ISSUE Section headers on sheets 1 to 5 are - SUB - UNIT TITLE DESIGN DATA LOCATION Design Soft Path Name Design Data Storage/Archive Location. CURRENT REQUIREMENTS : SYSTEM VOLTAGE REQUIREMENTS: PRODUCT CODE NO. BOARD TITLE 1.7 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.14 2.15 2.16 SYSTEM QUESTIONS Have standard connector pins been used ? Have sufficient ground and power pins been used ? Is each sub function a complete entity ? Has expansion contingency been specified ? Has a preliminary design review been held ? Does the circuit design require mixed technology ? Are the circuit symbols / references in accordance with BS, MIL, RSD local procedures ? Comments:-- COMPONENT QUESTIONS Has the printed wiring board thermal coefficient of expansion (TCE) been considered. Has cognisance of this been made in connection with the largest component. If applicable, what is the perceived T.C.E. value required ?. Are all components PCB mountable ? Have approved components been used ? Are all components specified by their generic type ? Are all components suitable for automatic placement ? Are all discrete components available on tape ? Are all components suitable for vapour phase soldering and able to withstand 215°C for 30 - 40 seconds ? Are all components suitable for wave soldering and able to withstand 255°C for 3 seconds on solder side and 180°C approx on component side ? Convection reflow soldering. State temperature window for the lowest temperature rated component. Can fully loaded PCB withstand oven preheat of 100°C for 2 hours ? Are all heavy components identified/adequately supported ? How many (with details) of single source components ? Where the circuit design requires mixed technology, has the PCB assembly department been consulted ? CU ISSUE ADDITIONAL INFORMATION TO BE SUPPLIED BY IDO TO EDPG. DRG NO ISSUE DATE SUPPLIED AUTHORITY REPLY ? ? ? ? ? ? ? SOFTWARE ? ? ? ? ? ? Name (Block capitals) Signature........................................................................Date: Name (Block capitals) Signature........................................................................Date: DESIGN ENGINEER Name (Block capitals) THERMAL Signature........................................................................Date: On completion of the above signatory list, the following to be completed / signed by Engineer or LRI Engineer. THERMAL ? ? ? ? Page ‹#› 07/06/99 Name (Block capitals) Signature........................................................................Date: Name (Block capitals) Signature........................................................................Date: DESIGN ROUTING APPROVAL TECHNOLOGY Name (Block capitals) Signature........................................................................Date: COMPONENT LAYOUT APPROVAL ? PCB Europe : Design for Manufacture DESIGN ENGINEER TESTABILITY NET LIST APPROVAL B.I.T. Radar and Countermeasures Systems Name (Block capitals) Signature........................................................................Date: SCHEMATIC / CIRCUIT DIAGRAM APPROVAL TEST ? ? Name (Block capitals) Signature........................................................................Date: DESIGN ENGINEER INTERCONNECTIONS BOARD TECHNOLOGY ELECTRICAL INTEGRATED DESIGN OFFICE DESIGN ENGINEER MECHANICAL COMPONENTS FURTHER INFORMATION MAY BE REQUIRED BY EDPG ON FINAL BOARD BUILD ELECTRICAL DESIGN ENGINEER NAME (BLOCK CAPITALS): SIGNATURE.........................................DATE TEL. NO. 1 1.1 1.2 1.3 1.4 1.5 1.6 1.6 ISSUE BOARD PROFILE LAYOUT PIL PARTS LIST ECAD NET LIST CIRCUIT DIAGRAM USED ON ASSEMBLY AD NO IF APPLICABLE DEPARTMENT OTHER SPECIAL FEATURES: PCB DETAIL DRG NO Ref.No.RMS/0170 Issue.8 Name (Block capitals) Signature........................................................................Date: DATA PACKAGE RELEASED FOR MANUFACTURE. EDPG. Name (Block capitals) Signature........................................................................Date:
    • MCAD Interaction MCAD Drawing data is Imported to ECAD library ECAD Design data is Exported to MCAD Drawings Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Design Start PCB Layout - Methodology 2 1 Receive Package PCB Layout 3 Thermal Simulation 4 PCB Routing Design Complete 5 Post Processing COMPROMISE Component MECHANICAL Connector Positions Restrictions - Height Fixings ELECTRICAL Connectors Components near Connectors ASICS - Components around ASICS Memory Remainder filled in THERMAL Hot Components - more than 50mW Near cold edge ASSEMBLY Proximity Fiducials Library Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • PCB Layout - Example Design Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Design Start Interaction with Thermal Group 2 1 Receive Package 3 PCB Layout Thermal Simulation 4 PCB Routing Data Transferred to Thermal Engineering Thermal Analysis Report Prepared Recommendations (TV’s or Changes) Radar and Countermeasures Systems PCB Europe : Design for Manufacture Sign Off Page ‹#› 07/06/99 5 Post Processing Design Complete
    • Routing - Methodology Design Start 2 1 Receive Package PCB Layout 3 Thermal Simulation 4 PCB Routing 5 Post Processing Breakout Patterns Substitute Via type Manual or Autoroute Design Requirements Special Instructions Routing Rules - Crosstalk Net Classes • Critical Nets • Busses • Long Nets • Short Nets • Remainder DRC Checks • Spectra CCT • BoardStation • Valor Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99 Design Complete
    • Routing - Example Design 8 Layers 1 - Footprints 1 - Plane layer 2 x 2 Buried Vias 1 - Plane layer 1 - Pads for Tph’s Connections - 2841 Tph’s 4028 B/Vias 3303 Components - 218 Track 0.005 Gap 0.006 Pad - 0.024-0.018 Via 0.018 Hole 0.008 Board size 230 x 160 mm Thickness - 1 mm Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • DRC Checking with Valor Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Post Processing Design Start 2 1 Receive Package PCB Layout 3 Design Complete 4 Thermal Simulation PCB Routing 5 Post Processing DFM Checks Completed Assembly Drawings Board Drawings Gerber Data Drilling Data Radar and Countermeasures Systems PCB Europe : Design for Manufacture Screen Data Placement Data Page ‹#› 07/06/99 Test Data Heatplate Data
    • High Level Process - Reprise Design Start Design Complete 1 Receive Package 2 PCB Layout 4 3 Thermal Simulation PCB Routing 5 Post Processing Checklist MCAD ECAD Library Assembly Fabrication Geometry Library Test Data Sheets & Standards Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • USING       Summary Multi Disciplinary Library Parts A Structured Logical Approach Consider Each Process Stage (Data In versus Data Out) Checklists Be Prepared to Compromise Bi-directional Communications WILL ACHIEVE A COMPLETE WELL THOUGHT OUT DESIGN Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Conclusion THERMAL ENGINEERING STRESS ENGINEERING ELECTRICAL ENGINEERING PCB FABRICATION PCB DESIGN PCB ASSEMBLY INTERCONNECTIONS ENGINEERING TEST Radar and Countermeasures Systems PCB Europe : Design for Manufacture MCAD Page ‹#› 07/06/99
    • Speaker Biography   Andrew Barker (Physical Design Team Leader). Andrew completed an apprenticeship at Rosyth Royal Naval Dockyard before joining Ferranti’s PCB Design Group in 1979 to work on Thin Film Hybrid designs. PCB design followed in the early ‘80s using Digitised Colour Masters - he missed out on taped masters by a few days ! - to design DIL, Double Sided and 8 layer PCBs. He was Introduced to ECAD in 1983 which extended layer counts and via types thus enabling Surface Mount, Depth Drilled and Hybrid techniques. In 1984 Andrew completed his first Surface Mount 0.006” track and gap multi-layer metal cored PCB. By 1993 he had moved on to Microvia PCBs with 0.003” track and gap. His current role is Physical Design Team Leader with 7 PCB & Hybrid Designers using Mentor Graphics, Valor, Intercept Pantheon, Zuken Redac and Spectra CCT. Radar and Countermeasures Systems PCB Europe : Design for Manufacture Page ‹#› 07/06/99
    • Prediction of Convection Reflow Soldering Profiles Speaker Bruce Wilkinson, Thermal Engineer BAE Systems Crewe Toll Edinburgh
    • Introduction • Small Batch Size • High Unit Cost • Heavy PCB assembly difficult to solder • Evaluated / measured process - not up to it! • Evaluated other machines • Computer modelled process • Result - successfully soldered assembly • Questions will be answered at the end
    • History • Unable to effectively solder large surface mount hybrids to heavy PCB in convection reflow soldering oven • Largest hybrid weighed 35 grams, it was 75mm long, 40mm wide, 8 mm high • PCB was 2.0 mm thick, 10 copper layers, 2 Cu/In/Cu layers, non-woven aramid construction
    • Assembly Photograph
    • Measured Process Parameters • Measured heat transfer coefficient of our convection reflow oven • Measured heat transfer coefficient of subcontractor’s convection reflow ovens • Used slab of aluminium fitted with thermocouples
    • Plate used to Measure HTC
    • Measured Heat Transfer Coefficients Comparison of Heat Transfer Coefficients 90 80 70 60 Heat Transfer Coefficient (W/m^2K) 50 40 30 20 10 0 Sub-Contractor CRO 2 Zone 1 Zone 2 BAE Systems CRO Zone 3 Zone 4 Heating Zones Zone 5 Sub-Contractor CRO 1 Zone 6 Zone 7 Oven
    • Convection Reflow Oven Model Requirements • “Soldersim” from ANSOFT • Number of zones and their lengths • Gaps between zones (if applicable) • Heat transfer coefficient of all zones • Recommended solder profile • Best estimate oven settings – Zone temperatures – Conveyor speed
    • Model Oven Settings Temp. Settings h1 = 230C h2 = 170C h3 = 170C h4 = 210C h5 = 260C h6 = 280C h7 = 315C c1 = 109C c2 = 86C c3 = 77C
    • PCB Assembly Model Requirements • “PCB Explorer” by ANSOFT • Two ways of collecting data: • Transfer of data from PCB Design Group • Build PCB data from scratch – – – – PCB layer construction and shape PCB and component material physical properties Component layout Component masses
    • Model Output • Temperatures of all components on the PCB at any moment in time throughout the soldering process • Temperatures at any position on the PCB at any moment in time throughout the soldering process • Plots of temperatures against time for components and PCB
    • After 60 seconds
    • After 90 seconds
    • After 120 seconds
    • After 150 seconds
    • After 180 seconds
    • After 210 seconds
    • After 240 seconds
    • After 300 seconds
    • Thermal Contour Plot (210 seconds)
    • Temperature Plot
    • Model Adjustment If the resulting temperature plots do not match the required solder paste profile, we can change: – belt speed – zone temperatures Trial & Error - Using Skilled Judgement and Experience The required adjustment is usually obvious
    • Soldering Results •PCB assembly soldered satisfactorily FIRST TIME
    • Picture of Solder Joints
    • Summary • We need to model the soldering process due to: small batch sizes high unit cost • We have successfully characterised the convection reflow soldering process • We have used this information to computer model the soldering process • The software modelling is especially useful for heavy PCBs and large components • Most recently, the soldering process was successfully modelled for a large thick motherboard
    • Q = Heat Load m = Mass Q = m Cp (Tpcbhot - Tpcbcold) / t Cp = Specific Heat Capacity Tpcbhot = PCB Hot Temperature Tpcbcold = PCB Cold Temperature h = Q / A (Theater - Tpcbave) Tpcbave = PCB Average Temperature Theater = Zone Heater Temperature h = Heat Transfer Coefficient A = Area Being Heated t = time
    • Panel Questions & Answer Session Radar and Countermeasures Systems Page ‹#› PCB Europe : Design for Manufacture 07/06/99