Design of Boot Loader with Multiple Communication PortPEI Ke, ZHANG Gang, LI Fu-jiangCollege of Information Engineering, T...
asynchronous EMIF (AEMIF) controller, including theNAND flash interface, Multimedia Card/Secure Digital(MMC/SD) Card Contr...
interrupt vector, operating under privilege mode,preventing all the interrupt, initialization of stackpointers, eternal me...
and correspond instruction input; enable_interrupts()enabling exception interrupt treatment; main_loop()command line model...
image files to relevant address. Of whichload_serial_bin() includes: set_kerm_bin_mode()setting destination address of Ker...
DM6446 USB2.0 provides nine endpoints, they areEP0 (endpoint0), EP1-4Tx (Transmit endpoints 1-4),EP1-4Rx (Receive endpoint...
situations of use and experiment environment. Thedetailed information on setting of Linux operatingsystem kernel booting p...
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Design of boot loader with multiple communication port

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Design of boot loader with multiple communication port

  1. 1. Design of Boot Loader with Multiple Communication PortPEI Ke, ZHANG Gang, LI Fu-jiangCollege of Information Engineering, Taiyuan University of Technology, 79 Yingze West Street,Taiyuan 030024, ChinaE-mail: imaupk@163.com, tyzhgang@163.comAbstractAn embedded system with complex embeddedmicroprocessor inner resources and plentifulperipheral devices cannot work efficiently withoutthe management of operating system. How todevelop Boot Loader on the basis of the specifichardware platform is a key point and difficultywithout question. The concept and function ofembedded operating system booting program—BootLoader which has multiple communication ports isintroduced. In the ARM & DSP dual-core embeddedmicroprocessor system development platform, byloading Linux operating system kernel, the authorsexpatiate on software designing methods of filedownloading via three common communicationinterfaces (UART, Ethernet0, USB port).1. IntroductionAn embedded system is a special-purpose system inwhich a computer is entirely encapsulated by thegadget it controls. Unlike a general-purpose computer,an embedded system performs pre-defined tasks,usually with very specific requirements and constraints[1]. In the embedded system development, embeddedsoftware is the key factors to achieve various systemsfunction and the active research direction of computerscience [2]. In order to meet requirements ofapplication, running embedded operating system [3](such as Linux) on embedded system developmentboard has become increasingly popular. However, aboot loader is an indispensable program that isresponsible for loading an operating system kernel andstarts up the kernel. Programmers can take advantageof boot loader to initialize hardware devices, to detectmemory space or to build the memory maps. Bootloader is somewhat similar to the BIOS (basic inputoutput system) of PC in term of the function [4]. Itsmain role is to provide the basic runtime environmentso as to load the OS kernel into an appropriate locationof the memory (RAM) and boot it. In the embeddedsystem, a perfect boot loader should have more ways ofdownloading, system upgrading features, and thecorresponding command console in the differentexperimental conditions. This paper adopts TI’s(TEXAS INSTRUMENTS) DVEVM (DaVinciEvaluation Module) based on TMS320DM6446(alsoreferenced as DM6446)[5] as hardware platform, takesXDS560 emulator and Code Composer Studio Version3.2(CCSv3.2) as software development and debuggingenvironment, and then gives the operation principleand the implement method of boot loader.2. System componentsTypical hardware platform of an embedded systemsgenerally includes a single ARM-core[6] processor,memory, some essential interfaces and associatedperipherals, but in some advanced(such as DSP,multimedia processing, High-performance and Low-power devices) embedded platforms always Integratesone or more DSP-cores and some other co-processorwith special function so as to enhance the performance,practical utility and value. In this system, the dual-corearchitecture of the DM6446 which incorporates a high-performance TMS320C64x+ DSP core and anARM926EJ-S core provides benefits of both DSP andReduced Instruction Set Computer (RISC)technologies. In ARM subsystem, the CPU frequencyof ARM is 297 MHz; ARM internal memories contain16KB RAM and 8KB ROM, and ARM926EJ-S RISCprocessor includes 16KB instruction cache and 8KBData cache [7]; external memories include 256MBDDR2 Synchronous DRAM, 64MB NAND flashmemory and 16MB NOR flash memory; the ARM alsomanages/controls the following peripherals: DDR2Port controller, ATA/Compact Flash (CF) controller,2008 International Conference on Computer Science and Software Engineering978-0-7695-3336-0/08 $25.00 © 2008 IEEEDOI 10.1109/CSSE.2008.1285169
  2. 2. asynchronous EMIF (AEMIF) controller, including theNAND flash interface, Multimedia Card/Secure Digital(MMC/SD) Card Controller, CCD Controller (CCDC),Enhanced DMA(EDMA) System Channel Controller(CC) and Transfer Controllers (TCs), UARTs, Timers,Universal Serial Bus (USB) 2.0 Controller, 10/100Mb/s Ethernet Media Access Controller (EMAC),Serial Port Interface (SPI), etc. In DSP subsystem, theC64x+™ clock rate is 594 MHz; other performanceindexes are not within the discussion range herein, thereferences [6, 7, and 8] are good introductions to them.The software platform with the following components:Boot Loader, embedded OS kernel, file system. Theembedded OS kernel is an operating system forembedded system, and responsible for the resourcemanagement of software and hardware, real-time tasksand multitasks. File system occupies most of thestorage space in the embedded system’s softwareplatform, and it is the most related part withapplications. Systems configuration files, systemprogram, and applications are stored in file system [9].In this system, Boot loader (stage1, stage2) and kerneluImage are stored in non-volatile storage devices(NOR/NAND flash), and file system (ext2 format)image is reserved in hard disk on target board. Figure 1shows the space allocation of software platform, andstage2 includes parameter lists of kernel booting.3. Boot loader firmware designAfter the system power-on reset, instructionprefetch is accomplished from the address (0x0) presetby certain CPUs manufacturers. The DM644x ARMcan boot from either AEMIF (Asynchronous ExternalMemory Interface)/NOR Flash or from ARM ROM(AIROM, ARM Inner ROM), as determined by thesetting of the device configuration pins BTSEL [1:0].The BTSEL [1:0] pins can define the ROM boot modefurther as well.If BTSEL[1:0] equals to 01, DM6446 processorswill execute the boot code which is built, burned anddownloaded by programmers from AEMIF or NORflash zero address(0x02000000) after system reset, thatis started from external memory.If BTSEL [1:0] does not equal to 01, DM6446processors will first execute RBL (ROM Boot Loader)procedure embedded by chip manufactures fromAIROM address (0x00004000). DM6446 AIROM-firmware RBL code supports the three types of bootload codes. See the reference [7] for more details onthe inner boot mechanism of DM6446 processors andthe function of RBL.When BTSEL[1:0] equals to 01, that is externalmemory boot mode, CPU can read the first order fromflash 0x0 address (0x02000000) mapped by innermemory domain zero. Boot loader program is justburned or wrote to the 0x0 address of flash ROM.Therefore Boot loader program will be read andprocessed first by CPU after system reset.The whole operating flow chart is shown in Figure2. Because the realization of Boot loader heavilydepends on CPUs’ architecture, Boot loader functionrealization basically include stage1 and stage2, runningin ROM and RAM system respectively [9]. Codestage1 depending on CPU system architecture is wrotein the 0x0 address of NOR flash, was basicallyaccomplished with assembly language (ASM). Itsfunction is easy, it is responsible for copying thefollowed stage2 from flash to nominated address inSDRAM and transferring it to the entrance of stage2and operating continuously, besides the set up ofFigure 1 Position of the software platformFlash Hard diskFigure 2 Boot loader operating flow chartSetup exception vectorEnable power domaintransition and reset DSPInitialize system PLL &CPU critical registersSetup memory timing andinitialize C variablesBranch on C codemain entryInitialize stack pointerSetup SVC32 mode,disable IRQs and MMUDefine entry pointPower/ResetDownload files from host to target DDR2If test is successfulwrite to flash ROMReset systemSelect download interfaceUSBUART Eth0Downloadvia TFTPDownloadwith KermitDownload byBulk-OnlyNExecuteselecteditem(s)Choose to test items via theconsole (terminal & keyboard)Board dependent initializationsequence (CPU, board, serial,eth0, USB, NOR and NANDflash, dram, console and so on)Print info to the consoleMain function C entryDownload?Y170
  3. 3. interrupt vector, operating under privilege mode,preventing all the interrupt, initialization of stackpointers, eternal memory DDR2, flash and serial port.It can improve the system working efficiency andrealize more function. Stage2 is an extendedimplementation comparatively completed anddistributed under the GPL license, open sourcesoftware U-Boot[10]. It realize the read/write ofDDR2, flash ROM, three ways of download file via theUART with Kermit protocol, through Eth0 interfacewith TFTP, and by Bulk-only in USB interface (virtualRAM function), transferring kernel parameter andhuman-computer interface except for implementationof device initialization. Code that is not related to CPUsystem structure was accomplished with C language,which is of good readability and transportability.3.1. The realization of stage-one(1) Start.S ASM code is worked first in Boot loaderand complete the following functions:<1> Since an executable image would have an entrypoint, and should have only one global entry point, thisentrance is usually mapped at 0x0 address of the ROM.Thus, complier should be informed to know the entrypoint, and it can be defined in the board-specific linkerscript-link.lds.//*-----------------------------------------------------------//* Define the entry point and set exception vectors//*-----------------------------------------------------------.globl _start_start:b reset // reset 0x0ldr pc, _undefined_instruction// Undefined Instruction 0x4ldr pc, _software_interrupt// Software Interrupt 0x8ldr pc, _prefetch_abort // Prefetch Abort 0xCldr pc, _data_abort // Data Abort 0x10ldr pc, _not_used // reserved 0x14ldr pc, _irq // IRQ : read the AINTC 0x18ldr pc, _fiq // FIQ 0x1C//*-----------------------------------------------------------<2> Set CPU to SVC32 mode and mask all IRQs bysetting all bits in the interrupt mask register and statusregister (CPSR register in ARM). These source codesare omitted.<3> Relocating armboot from flash ROM to RAM(DDR2) can enhance the running efficiency.<4> Set each mode stack and Initialize the neededrunning environment for C variables.<5> Setup the principal system hardware, includingsystem PLL and DDR2 initialization, PSCconfiguration, enable UART0, AEMIF and otherimportant modules.(2) Configurations of the chip and some hardwaredevices on DVEVM boards were mainly realized inplatform.S and davinci.c. of which platform.S isresponsible for configuring the primary essentialsystem hardware, which consist of system clock PLLs-PLLCTRL1 (it generates the frequencies required forthe DSP, ARM, VICP, DMA, VPFE, and otherperipherals) and PLLCTRL2 (it specially generates thefrequencies required for the DDR2 interface and theVPBE in certain modes), pins multiplexing equipmentregisters PINMUX0 (EMAC, CCD, LCD, RGB888,ATA, VLYNQ, EMIFA and GPIO peripherals), ARM,Interrupt Controller AINTC, power/sleep controller(PSC) configuration, DDR2 clock frequency, setup ofenabling UART0, AEMIF hardware module registers.davinci.c (worked in stage2) mainly includes thefollowing functions: board_init, basic board levelrelated configuration. To acquire the type parametersof ARM Linux machine (DVEVM is defined as # 901),set the memory address of Linux boot parameters,davinci_psc_all_enable(): essential enabling peripheraldevice power supply domain(I2C, EMAC, MDIO,EMACCTRL, AEMIF, UART0, DDREMIF, USB),dram_init(): DDR2 initialization; misc_init_r(): setupARM/DDR2 clock, Ethernet address and video outputstandard (PAL/NTSC), etc..The above is the left part of flow chart in figure2and the right part is Stage2, which is mainlyresponsible for the function of console, three categoriesof interface download, flash copy, and so on.3.2. The main modules in stage-two3.2.1. Initialization board wide hardwareBoard wide resources initialization, functions in thisstage include: start_armboot() is the first C languageexecuted by boot loader; it accomplishes the followingsystem initialization, enters the main loop of console,acknowledge user commands; data structure of globalvariable (gd) was set by memset(); then the initializedfunctions was operated in init_sequence[] cordially;needed flash was set by flash_init(), flash content wasshowed in display_flash_config(), if it is NAND Flash,it is initialized through nand_init() function; Defaultenvironmental variable and relocation were set throughenv_relocate(), emac_set_mac_addr() was used forgetting the Ethernet MAC address from environmentalvariable; equipments in the list was got throughdevices_init(); console equipments was initialized byconsole_init_r() to realize the interaction with targetboard through terminal software display in PC machine171
  4. 4. and correspond instruction input; enable_interrupts()enabling exception interrupt treatment; main_loop()command line model primary cycle function executeuser command; boot() entering the human-machineinteraction menu interface and executing the chosenprojects including command line execution model,R/W(read/write) DDR2, flash R/W correlated process,choosing setup/download method, booting OS, etc.init_sequence[]array persevere the basic initializedfunction pointer. The function names are noted asfollows:init_fnc_t *init_sequence[] = {cpu_init, /* the basic processor set */board_init, /* set of the basic board wide */interrupt_init, /* exception initialization */env_init, /* initialized environmental variable*/init_baudrate, /* initialized Baud rate setting */serial_init, /* serial port driver initialization */console_init_f, /* console setup in Stage1 */display_banner, /* printing info in terminal */dram_init, /* allocating available RAM */display_dram_config, /* display DDR2 size */NULL,};3.2.2. Realization of download portIn the process of embedded system softwaredevelopment, the essential problem that developersshould combat is how to port embedded operatingsystem (e.g. Linux), file system and user applicationprogram to special embedded hardware platform,which is the communication problems between hostmachine and development board. Communicationinterface play a key role in the port process ofembedded software platform. Common embeddedcommunication interfaces mainly include serial port,Ethernet port, USB interface, JTAG interface. Thereare infrared and Bluetooth wireless communicationinterface in some advanced embedded softwareplatform. DVEVM has a subsidiary infrared interface.We mainly used JTAG interface to download anddebug code in the earlier online debugging state, usingthree common communication ports (serial, Ethernet,USB) realized file transport from host machine totarget board.(1) Realization of serial port download and consoleEmbedded system development platform usuallyuse serial port as downloading and debuging codeinterface. Universal serial port is easy to use; almost allthe embedded processors have one to two serial portswhose most disadvantages lie in bad speed. Thefunction of printing serial port command console anddownloading small files (e.g. testing code) have beenrealized in this system. Serial download protocol useKermit file to transfer protocol [11]. Kermit filetransmission protocol is an easy file transmissionprotocol used to exchange files between PC.We use UART0 of DM6446 in this system.Definition and annotation of UART0 register banksstructure needed to set in the initialization are shown asfollows (Uint32 is defined as unsigned int):typedef struct {volatile Uint32 RBR;/* UART0 Receiver Buffer Register */volatile Uint32 THR;/* UART0 Transmitter Holding Register */volatile Uint32 IER;/* UART0 Interrupt Enable Register */volatile Uint32 IIR;/* UART0 Interrupt Identification Register */volatile Uint32 LCR;/* UART0 Line Control Register */volatile Uint32 MCR;/* UART0 Modem Control Register */volatile Uint32 LSR;/* UART0 Line Status Register */volatile Uint32 MSR; /* Modem Status Register */volatile Uint32 SCR;/* UART0 Status Control Register */volatile Uint32 DLL;/* UART0 Divisor Latch (LSB) */volatile Uint32 DLH;/* UART0 Divisor Latch (MSB) */volatile Uint32 PID1;/* UART0 Peripheral Identification Register 1 */volatile Uint32 PID2;/* UART0 Peripheral Identification Register 2 */volatile Uint32 PWREMU_MGMT; /* UART0Power and Emulation Management Register */} Uart0Regs;Functions of serial download and command consoleinclude: serial_init() initialized UART0 main function,corresponding to the divisor latch (LSB and MSB), linecontrol register, modem control register, FIFO controlregister and interrupt enable register listed in thestructure above, to set their initial value. Initial valuesetting in this system: writing divisor latch, settingbaud rate (115200) high and low bytes, setting controlregister (character length is 8 bits, 1 stop bit, no parity-check), using inquiry mode receiving/transmitting databut modem; serial_setbrg() setting UART0 line controlregister and divisor latch support main clockfrequency is 48MHz; serial_getc(), serial_putc() andserial_tstc() receiving/sending characters and line statedetecting subprogram; variable addr=load_serial_bin(),is users’ input offset address, downloading binary172
  5. 5. image files to relevant address. Of whichload_serial_bin() includes: set_kerm_bin_mode()setting destination address of Kermit protocolsdownloading file and file type format(bin); k_recv()setting Kermit protocols order parameter and receivingdata state machine (Start, Send, Data, ACK, NACK,Break, End and so on) convention information. Inaddition, needed function includeshandle_send_packet() processing packet of sending.When we input loadb load address (e.g. 0x80700000 isDDR2 memory address) in terminal command linemode, this firmware program on the target board willprepare to receive file using Kermit protocols, user cancomplete downloading by choosing the file to bedownloaded through file sending function in terminaland Kermit protocols. If transmission is error, warninginformation will display and inform downloading anew.Because it is too slow to transfer big file in this system,we mainly use serial to display log of code debugging.It is prone to use the function of command console.(2) Realization of Ethernet port downloadingIt is a common communication mode to downloadimage file through Ethernet interface in embeddedsystem. Presently, the function of transferring filethrough Ethernet interface in most open-sourceuniversal boot loader (U-boot) has been realized. PHYlayer chip used in this system is Intel LXT971A. TheLXT971A is an IEEE compliant fast Ethernet PHYtransceiver that directly supports full-duplex operationat both 100BASE-TX and 10BASE-T applications. Itprovides a Media Independent Interface (MII) for easyattachment to 10/100 Media Access Controllers(MACs). The LXT971A also provides a Low VoltagePECL (LVPECL) interface for use with 100BASE-FXfiber networks [12]. The LXT971A supports a standardMII. The MII consists of a data interface and amanagement interface. The MII data interface passesdata between the LXT971A and a MAC. Separateparallel buses are provided for transmitting andreceiving. This interface operates at either 10 Mbps or100Mbps [13]. The Ethernet Media Access Controller(EMAC) provides an efficient interface betweenDM6446 and the network. The DM6446 EMACsupport both 10Base-T and 100Base-TX, or 10Mbpsand 100 Mbps in either half- or full-duplex mode, withhardware flow control and quality of service (QOS)support; The EMAC, controlled and managed only byARM, realizes packet flow control between DM6446and PHY. PHY Management Data Input/output (MDIO)controls the configuration and monitoring state of PHYchip, module interface EMAC and MDIO of DM6446can implement efficient data receiving and transmittingthrough a certain interface. The EMAC and MDIO canbe regarded as an integrated EMAC/MDIO peripheralof DM6446. DM6446 initializes LXT971A throughEMAC/MDIO interface module. The transfer protocoluse TFTP (Trivial File Transfer Protocol) [14]. It is asimple protocol to transfer file, which using 69 port ofUDP (User Datagram Protocol).The main functions are as follows: first of all,dm644x_emac.c realize EMAC/MDIO initialization:emac_open() function accomplishes related registers(e.g. SOFTRESET: soft reset register, EWCTL:EMAC interrupt control register, T/RXCONTROL:transmit and receive control register, MACINDEX:MAC index register, MACADDRHI andMACADDRLO: MAC address high and low bytesregister, MACHAS1 and MACHASH2: MAC hashaddress register1 and 2, T/RX0HDP∼T/RX7HDP:transmit/receive channel 0-7 DMA head descriptorpointer registers, RXMAXLEN: receive maximallength register, RXBUFFEROFFSET: receive bufferoffset register, RXMBPENABL: receiveMulticast/Broadcast/Promiscuous channel enableregister, RXUNICASTSE: receive unicast enable setregister, MACCONTRO: MAC control register, etc.)initialization setup. Second, mdio_read(): reading PHYregister via MDIO interface; mdio_write():writingPHY register via MDIO interface andmdio_get_link_state(): obtaining PHY chip link state.These three functions are used to initialize theLXT971A chip. Third, eth.c code is called by eth_init(),and emac_open() realizes Ethernet initialization;eth_send() realizes transport of Ethernet data packet;eth_rx() realizes Ethernet data packet receiving;eth_halt() closes network device operation. Finally,net.c, bootp.c, rarp.c and tftp.c functions mainlyappoint address of Ethernet, gateway, subnet mask,TFTP server and user IP address, realization of ARPrequest, timeout checking and ARP/RARP definitionof packet format, IP, ICMP and UDP data packetformat definition, BOOTP (Bootstrap Protocol),ARP/RARP and TFTP protocol.(3) Realization of USB interface downloadingIn the present, there is little research about usingUSB interface to provide file download function inboot loader for embedded system development board.In terms of speed, it is nearly the same to use 10MEthernet and USB1.1. But to use Ethernet, it needs toallocate IP address of target board, link hub to LANand operate TFTP server software in PC machine. It iseasier to use USB interface compared to Ethernet: itsupports the plug and play technology, automaticrecognition device, using windows explorer to transmitfile directly. We use DM6446 USB2.0 host/devicecontroller as USB download interface in this system.173
  6. 6. DM6446 USB2.0 provides nine endpoints, they areEP0 (endpoint0), EP1-4Tx (Transmit endpoints 1-4),EP1-4Rx (Receive endpoints 1-4). EP0 is reserved ascontroller endpoint, EP1-4 can be allocated as control,synchronization, interrupt or Bulk-Only transactionsmode, size programmable inner endpoint dual-portFIFO RAM, the maximal capacity is 4KB, and has thefunction of suspend and resume logic [15] and so on.Host mode supports high speed (480Mbps), full speed(12Mbps) and low speed (1.5Mbps); device modesupports high speed and full speed transport and packetlength of 8, 16, 32, 64 bytes. We can choose query,interrupt or communications port programminginterface (CPPI) DMA transactions modes. Workingprinciple of USB controller can simply described asfollows: when USB controller has checked a certaintransmit request from USB Bus, it will setcorresponding registers’ value. If the configuration isthe interrupt mode, it will request for interrupt tointerrupt controller. The application gets relatedparameters in this transport by accessing status registerand data register of USB controller, and then takes thecorresponding operation on control register and dataregister controller to accomplish the host transmittingrequest according to these parameters.Since kinds of USB device working principle havebeen described in USB standard Revision2.0 [16], wedo not restate here. We use Bulk-Only transactionsmode [17], whose device class is Mass Storage deviceand support SCSI command set [18]. Realization flowof USB interface download is as follows. First,initialize USB controller, corresponding usb_init()function used to realize USB controller initialization;second, UsbdMain() used to initialize device descriptorlist; ConfigUsbd() function allocating port andresponding allocation request command send from hostto target board; then using SCSICBWProcess()function to realize SCSI command set. It mainlyincludes setting USB clock (48MHz), allocatingendpoint 0 as control endpoint, and appointingendpoint 1, 3 as bulk-only transmitting and receivingendpoints respectively, Bus enumeration of USBdevice, so as to make PC recognize USB device. Thenformat DDR2 on target platform into FAT16 type filesystem, fill main boot sector and FAT table [19],corresponding to functions are fat16.c andscsi_dm6446.c. In this system, 32MB space of DDR2was appointed as RAM disk, there were65536(0x10000) sectors in all, which could meet thegeneral application for embedded system. If it is linkedto USB Bus, USB controller would realize busenumeration with host automatically. Bus enumerationin process, host will first transmit configuration requestpacket, then device will report of its own class,subclass of device, endpoint allocation to host. If thedevice is linked to host for the first time, Windows OSwill show discovery of USB device and search relevantdevice driver, update the regedit of operating system atthe same time. Host would transmit request commandto get device’s capacity after configuration, and takesector as a unit, read boot sector of RAM disk. If thereis no error, new device-drive icon will present inWindows OS’s resource manager. After that, we couldcopy or move files directly in resource manager. Hostwould send writing sector command to device, thendevice will copy data to the appointed address on RAMdisk. After copying, click on right-key of mouse indrive icon of resource manager, choose pop-up drive,then USB device will terminate link and return to themenu user interface after receiving command. Finally,write excusable files downloaded on RAM disk intoNOR/NAND flash, that is the realization process ofdownloading and writing program code.3.3. Setting boot parameter and loading OSUser could download the kernel and root file systemto DDR2 of target board via different communicationinterfaces after building communication channel. Weshould first set Linux kernel booting parameter [20] inarmlinux.c function, for instance, ATAG_CORE,ATAG_CMDLINE, ATAG_MEM, ATAG_INITRD,ATAG_RAMDISK, and ATAG_NONE, then theLinux kernel can be started. At the same time, we alsoneed to set CPU register, CPU mode, cache, MMU andso on. The method that Boot loader calls the Linuxkernel is jumping directly to the first instruction of thekernel; that is jumping directly to the 0x80700000address in this system.Finally, a standalone excusable binary file thatwould be operated in the target board is compiledthrough ARM Linux cross compiler, and flash burn tothe target board’s NOR or NAND flash to realize bootOS automatically.4. ConclusionsThe realization of Boot loader depends intensivelyon the hardware; the hardware resources of each targetboard are definitely different. Therefore, most of theboot loader programs are dissimilarity. In this paper,we expound the main steps and technique of Bootloader with various download interfaces, taking the TIDaVinci EVM board as hardware platform. It providessuitable operating environment for booting Linuxoperating system kernel. The accomplishment of threecommon communication interfaces in the embeddedsystem could meet user requirement in different174
  7. 7. situations of use and experiment environment. Thedetailed information on setting of Linux operatingsystem kernel booting parameter and calling kernel isclosely related to the specific operating system, and isnot discussed in detail. In addition, it is a complicatedprocess to design and realize a powerful and excellentBoot loader program, and it is a good method to debugand test code by using kinds of tools provided by CCS.5. References[1] SHEN X B., WANG S Z. Development of EmbeddedSystem [J]. Microcomputer Development. 2003,13(1), pp.1-2.(in Chinese)[2] Bruno Bouyssounouse and Joseph Sifakis: EmbeddedSystems Design: The ARTIST Roadmap for Research andDevelopment[J], Springer Lecture Notes in ComputerScience, Vol. 3436, 2005[3] Lennon. A. Embedding Linux[J]. IEEE Review. 2001,Volume 47, Issue 3.[4] LIU J J. The Design of Booting Program Based on ARM-Linux Embedded System[J]. Control and AutomationPublication Group. 2006, 22(2-2), pp. 123-125. (in Chinese)[5] Texas Instruments Incorporated. TMS320DM6446Digital Media System-on-Chip. Reference Guide [Z].SPRS283D. Texas, USA, 2006.[6] http://www.arm.com/ [EB/OL]. 2008-6-24[7] Texas Instruments Incorporated. TMS320DM644x DM-SoC ARM Subsystem. Reference Guide[Z]. SPRUE14.Texas, USA, 2005[8] Texas Instruments Incorporated. TMS320DM644x DM-SoC DSP Subsystem. Reference Guide[Z]. SPRUE15. Texas,USA, 2005.[9] Zhan Rongkai. Embedded Boot Loader Technology Low-down[EB/OL].2003.12.http://www-128.ibm.com/developerworks/cn/linux/l-btloader/index.html. 2008-6-24[10] WolfgangDenk. U-Boot Documentation[EB/OL].Jan.24,2007. http://www.denx.de/wiki/UBoot/Documentation2008-6-24[11] Columbia University. The Kermit Project[EB/OL]. Sep.9, 2007. http://www.columbia.edu/kermit/ 2008-6-24[12] LXT971A DataSheet[Z]. Copyright © Intel Corporation,2002.[13] YANG Y M., HE D. Design of NetworkCommunication in Embedded System Based on LXT971A[J]. International Electronic Element, 2005.9, pp.22-25 (inChinese)[14] K. Sollins. THE TFTP PROTOCOL[Z], (Rev 2), MIT,July, 1992, http://www.javvin.com/protocol/rfc1350.pdf,2008-6-24[15] Texas Instruments Incorporated. TMS320DM644xDMSoC Universal Serial Bus Controller Users Guide[Z].SPRUE35, Texas, USA, 2005.[16] Compaq, Hewlett-Packard, Intel, Lucent, Microsoft,NEC, Philips. Universal Serial Bus Specification Revision2.0.April 27, 2000[17] XU Q F. Design and Implementation of USB DownloadPort for Embedded Development Platform [J]. ElectronicEngineering & Product World, 2002.10,pp.22-28 (in Chinese)[18]http://www.lvr.com/mass_storage.htm[EB/OL].2008-6-9[19] Jack Dobiash. FAT16 Structure Information[EB/OL].http://home.teleport.com/%7Ebrainy/fat16.htm. 2008-6-24[20] Karim Yaghmour. Building Embedded Linux Systems[M]. OReilly. April 2003.175

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