A novel single phase six switch ac ac converter

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  • 1. A Novel Single-Phase Six-Switch AC/AC Converterfor UPS ApplicationsA. Fatemi1, Student Member, IEEE, M. Azizi2, Student Member, IEEE,M. Shahparasti, M. Mohamadian3, Member, IEEE, A. Yazdian, Member, IEEEPower Electronics and Protection Laboratory (PEP Lab.), Faculty of Electrical and Computer EngineeringTarbiat Modares University, P.O.Box.14115-143, Tehran, Iran.Emails: 1a.fatemi@modares.ac.ir, 2m-azizi@ modares.ac.ir, 3mohamadian@modares.ac.irAbstract— A new reduced-switch-count converter topology isintroduced and proposed for UPS applications in this paper. Themodulation scheme of this novel converter is developed and amethod is devised for calculating the optimal operating point ofthe converter based on the design specifications in order tomaximize dc bus voltage utilization while minimizing the outputvoltage THD and switching loss. Moreover, a strategy issuggested for battery charging period which increases converterinput power and hence accelerates battery charging process. Theproposed converter possesses desirable characteristics of an idealAC/AC converter such as low THD of input current and outputvoltage and unity power factor. The validity of theoretical issuesis confirmed by simulation results.Keywords- UPS, PWM rectifier,Reduced-switch count topology,AC/AC converter, Nine-switch converterI. INTRODUCTIONUninterruptible power supplies (UPS) are widely used forsupplying sensitive loads such as medical facilities,telecommunications, computer systems and industrialprocessing. The main objective of employing UPS systems isprotecting these sensitive loads from power failure and networkdistortions such as voltage sag, surge and flicker [1].Amongst different types of UPS systems, one-lineconfiguration (Fig. 1) is known to have the best performanceconsidering power conditioning, reliability and load protection.Great tolerance to input voltage variation and preciseregulation of output voltage are the most eminent advantagesof this group over other two common types of UPS systemswhich are off-line and line-interactive UPSs. However, as itcan be seen in Fig. 2 , high number of semiconductor deviceswhich increases the manufacture cost and double conversion ofelectric power, AC/DC in the rectifier stage and DC/AC in theinverter stage, which increases the power loss are the maindisadvantages of this topology [2].There has been a recent trend of reducing total cost of on-line UPS systems by reducing the number of switchesemployed in their structure. The hitherto proposed solutions forswitch reduction in on-line UPS systems can be categorizedinto two general groups:The first approach is based on using Half-bridge convertersinstead of two back-to-back connected Full-bridge cells (Fig.3). Number of switches will be reduced in this way by half.However, this method lowers the dc bus utilization such that toAC ACDC DCFig. 1. Block diagram of on-line UPS systemsupply the same load, the dc bus voltage level should be twiceas much, in comparison with full bridge converters. Thisresults in higher number of batteries in the battery bank andhence increases the total cost of the system [3].To alleviate this problem, [4] proposed using a bi-directional converter in the battery circuit which also boosts thebattery voltage when it is supplying the load (Fig. 4). Thissolution sophisticates the control circuit and, similar to [5], isunable to compensate the input source voltage drop [6].The other approach to switch reduction of on-line UPSsystems is based on merging the two stages of powerconversion into one. Specifically, the proposed converter in [6](Fig. 5), and in general the AC/AC converters which share oneor two legs between the inverter and the rectifier stage use thisconcept [7].A recent structure proposed in [8] and investigated in [9,10]also employs the concept of AC/DC power coalescence bycombining the inverter and rectifier stages via sharing not anentire leg but an entire row of switches for three-phaseinverters (Fig. 6). However, due to higher voltage stress andswitching loss in comparison with Full-bridge back-to-backconverters, this topology is more suitable for low voltage andlow power applications.In this paper this novel idea of sharing switches in powerconverters is applied to single-phase converters which are morecommon in domestic applications with low voltage and powerratings. Similar to the three-phase configuration, single-phasetopology has two modes of operation: equal frequency (EF)and different frequency (DF). In [11], it is claimed that the EFmode is the most suitable mode of operation for UPS systems2011 2nd Power Electronics, Drive Systems and Technologies Conference978-1-61284-421-3/11/$26.00 ©2011 IEEE 408
  • 2. Fig. 2. Full-bridge back-to-back converter Fig. 3. Half-bridge back-to-backconverterFig. 4. Half-bridge back-to-back converter for UPSFig. 5. Three-leg type single-phase converter Fig. 6. Nine-switch three-phase converterSourceRectifierStageInverterStageSharedSwitchesQ1Q2Q3Q5Q4Q6Filter &LoadFig. 7 Proposed single-phase converterconsidering the output voltage THD, switching loss and DCbus utilization. But this means a non-isolated-frequency UPSsystem. Output frequency regulation is especially important inweak utility systems. To gain the most possible DC busutilization as well as regulation of the output frequency, astrategy is proposed in this paper for using in UPS applications.This strategy consists of an optimal operating point for normaloperation and a battery charging strategy after backup mode isfinished for maximum battery charging pace.The proposed topology enjoys the benefits of an idealsingle-phase AC/AC converter such as low THD input current,unity power factor, fast dynamic response and the ability tocompensate input voltage drop when supplying linear or non-linear loads.The paper is organized into seven sections. Next section,introduces the new topology and the modulation schemedeveloped for it. P-q theory which was employed forcontrolling the proposed converter is briefly explained insection three. Section four yields the necessary equations forobtaining optimal operating point. The proposed strategy forbattery charging is expanded in section five. Section six andseven are dedicated to simulation results and conclusion.II. THE PROPOSED STRUCTURE AND MODULATION SCHEMEFig. 7 shows the structure of the proposed converter.Integrating inverter and rectifier legs, the proposed structureconsists of two legs with three semiconductor devices in eachone. The middle switches are shared between the inverter andrectifier. The number of employed switches is reduced by 25%compared to the common back-to-back converters.The modulation scheme of this converter is obtained bycombining the unipolar PWM modulation scheme of single-phase H-bridge inverters and the modulation scheme of nine-switch converters.The unipolar modulation normally requires two sinusoidalmodulating waves, one per leg, of the same magnitude andfrequency but 180° out of phase. These waves are thencompared with a carrier signal to generate gate signals.Nine-switch converter modulation scheme adds an offset tothe two reference signals of each leg to provide frequencyand/or amplitude independency for the outputs. The value ofthis offset is dependent upon the converter mode of operation.A. Equal Frequency mode of operationIn this mode, output and input frequencies are equal. If thereferences are in-phase, for optimal switching modulation, theoffset is determined by (1) in which M1 and M2 could be eitherrectifier or inverter modulation indices and could be increasedup to one [12]. If the references are phase-shifted, the condition(2) should be met and no offset should be added.1 22 11 02offsetif M Moffset M M=⎧> = ⎨= −⎩(1)sin( ) 1 sin 11 1 2 2M Mt M t Mω θ ω+ + − ≥ + − (2)409
  • 3. B. Different Frequency mode of operationThis mode of operation provides frequency and amplitudeindependency of inverter and rectifier stages by splitting thetotal modulation index between them. Adding offsets of 0.5and -0.5 to rectifier and inverter references and restricting theiramplitudes to less than half, gives the proper modulatingsignals.As Fig. 8 shows, to obtain the modulating signal of theproposed converter, the rectifier and inverter referencewaveforms and their negative values should be shifted up ordown with the appropriate offset considering DF or EFoperation. This generates the modulating signal of the upperand lower switches. The switching signals of the middleswitches are the logical XOR of the upper and lower gatesignals of the same leg switches.Q1_ref recVCarrier_ref invV++Offset_Inv-1+++−+−++-1++Offset_Rec+−+−Q4Q3Q6Q2Q5Fig. 8. Block diagram of signal generation unitIII. CONTROL OF THE PROPOSED CONVERTERSince the modulation signals of the inverter and rectifierstages are produced independently, all the existing methods ofcontrolling the dc bus voltage in one-phase rectifiers areapplicable to the proposed structure. The method employedhere is based on single-phase p-q theory proposed in [13]. Itsblock diagram is shown in Fig. 9. The advantages of thismethod are constant switching frequency, low THD of inputcurrent, fast dynamic and unity power factor.First by using (3), and imaginary component of thefeedback variable is created which lags the real signal by 90o.Imsin( )sin( )2SR smS sms s ts s tω φπω φ= +⎧⎪⎨= + −⎪⎩(3)Using these two signals and (4), the feedback variable willbe transformed to d-q plane; reference values of Vd*and Vq*are obtained by indirectly controlling injected active/reactivepower to the system with the aim of controlling dc bus voltage.Imsin ss sind SRd Ss scos scoθ θθ θ−⎡ ⎤ ⎡ ⎤⎡ ⎤=⎢ ⎥ ⎢ ⎥⎢ ⎥⎣ ⎦⎣ ⎦ ⎣ ⎦(4)IV. PROPOSED OPERATING POINT FOR THE CONVERTERAs mentioned earlier, the proposed structure has two modesof operation, EF and DF mode. The main drawback of EFmode is frequency-dependency between the rectifier andinverter stages. This dependency disables the system fromθθFig. 9. Block diagram of the control unitregulating output frequency in normal operation which is oneof the important features of on-line UPSs especially when theutility system is weak. To overcome this drawback, there is nochoice other than using the converter in DF mode of operation.Nonetheless, the disadvantage of working in DF mode isreduced DC bus utilization which by itself increases the stressof the switches, switching loss and output voltage THD.To maintain the frequency independency of the converterwhile minimizing the weaknesses of DF mode it is suggested tofind an appropriate operating point considering specificationsof the converter such as power rating, input source and dc busvoltage levels and the line inductance.The principal condition of working in DF mode is that thesum of rectifier and inverter modulation indices should beequal to or less than one. As mentioned earlier, conventionallyhalf of the total modulation index is dedicated to the rectifierstage and the other half to the inverter stage. However, thisallocation of the dc bus voltage is not optimal. The optimizedpercentage of dc bus voltage for rectifier and inverter stages,i.e. optimal operating point of the converter, can be obtained bytaking the converter specifications into account as follows:The input active and reactive power of the converter isdefined by (5).sin( cos )inins cinLsin c sLV VPXVQ V VXδδ⎧=⎪⎪⎨⎪ = −⎪⎩(5)where Vs and Vc are respectively the rms values of network andrectifier input terminal voltages, δ is the phase differencebetween them and XLin is the input reactance.Assuming a constant dc bus voltage level, the rectifier ac-side voltage is decided by (6).sin( )c r dc sV M V tω δ= − (6)410
  • 4. Disregarding converter loss and assuming a unity powerfactor means:0in outinP PQ=⎧⎨=⎩(7)Applying (7) to (5) and (6), two conditions are derived forconverter operating point stated by (8).cos 2sin 2 insrdcL outrs dcVMVX PMV Vδδ⎧=⎪⎪⎨⎪ =⎪⎩(8)From (8), the maximum modulation index of the rectifierstage could be obtained versus design parameters of theconverter as :222 2( )inL outsrdc sX PVMV V= + (9)Considering nominal Vs and Is as the base values, the per-unit value of P will be as (10). Substituting per-unit values in(9), (11) would be the per-unit equation of the system fornormal operation. Mr,Max is also derived for maximum inputcurrent.0, , ,cosin s s in pu s pu s puP V I P V Iφφ== → = (10)2, ,,2,,,2 2( )2 2ininL pu s purdc puL pur Maxdc puX IMVXMV⎧ +⎪ =⎪⎪⎨+⎪=⎪⎪⎩(11)As shown by (11), while working under nominalconditions, the maximum amount of Mr is inverselyproportional to dc bus voltage level which is at least 1.41Vs toproperly control the rectifier and is directly proportional to theinserted reactance. Fig. 10 illustrates the relationship betweenMr versus dc bus voltage for different values of XLin whileworking under nominal conditions (Is,pu=1). The sourcefrequency is assumed to be 60Hz.V. PROPOSED STRATEGY FOR BATTERY CHARGINGIn the previous section, the optimal operating point wasdiscussed. It is worth to notice that the maximum value of Mrwas obtained only based on the load maximum demandedpower. However, when the battery is also getting charged, thisvalue of modulation index will be unable to provide both loadpower and battery charging power. To eliminate theundesirable effect of lowering the rectifier modulation index onmaximum input power while the battery is getting charged, aparticular strategy is proposed.Fig. 10. Mr, Max versus Vdc (pu) for different input reactance valuesAfter fault removal, when the battery is not supplying theload anymore, it should get charged as soon as possible to beprepared for supplying the load immediately in the nextprobable fault. Hence, during the battery charging period, theoperating mode would be better to change from DF to EF modeso that the rectifier modulation index could increase up to oneand the maximum possible power could be transformed to thebattery and the load at the same time. This would increase thepossible absorbed power from the network by (12).2,22, ,1in inr MaxDFL L DFEFr Max r MaxMPX X PPM M+ −=(12)After the battery is charged, the operating point wouldagain return to its normal state in order to maintain frequencyisolation.VI. SIMULATION RESULTSFor simulating the proposed system, it is decided todecrease the value of dc bus voltage level by increasing theinverter stage modulation index. This will reduce the maximumoutput power of the inverter since the value of input power isdecreased. However, since providing a specified voltage andnot constant nominal power is the first priority of UPS systems,this limitation is justified. This means that the dc bus voltagelevel is reduced here at the expense of maximum output powerreduction. It is worth to notice that higher inverter modulationindex decreases output voltage THD and lower dc bus voltagereduces the switching loss.To demonstrate the effectiveness of the proposed method, atypical system is designed according to network specificationsand load requirements tabulated in table I.TABLE I. NETWORK SPECIFICATIONS AND LOAD REQUIREMENTSParameters Value Parameters ValueVs 200 Vp-p Vo 450 Vp-pfs 58-62 Hz fo 60 HzPload 1.5 kW PF 1Vdc( 1-10, pu)Mr(0-1)411
  • 5. Vdc and Lin are the two degrees of freedom in obtaining theconverter parameters and the optimal operating point. It shouldalso be noted that these values are also the decisive factors fordetermining maximum output voltage level and input currentTHD. Optimal values are decided in a cyclic procedure forsatisfying all the criterions. The final calculated values of thenormal operating point, dc bus voltage level and inputinductance which are used here are tabulated in Table II.If the conventional method were used, the level of dc busvoltage would be 450 V for this converter. But according toTable II, this value is 350v for the novel method. This meansthat the dc bus voltage level is reduced by 22.2%.TABLE II. OPTIMALLY CALCULATED DESIGN PARAMETERSParameters Value Parameters ValueVdc 350 V Lin 6 mHMr, Max 0.35 Mi, Max 0.65Simulation is carried out when the system is functioning intwo modes of DF and EF. In both modes of operation, theperformance of the converter is checked when the input sourceexperiences voltage sag for linear and non-linear loads.Switching frequency and dc bus capacitor are 5 kHz and1880uF, respectively.A. DF Mode of OperationIn normal operation, when the battery is charged, theconverter works in DF mode(fo=60Hz) in the formerly obtainedoperating point. Fig. 11 and 12 show the system performanceunder 20% input voltage sag when supplying linear and non-linear loads of the same power. The input current THDs forlinear and non-linear loads are 3.43% and 3.53% respectively.The sinusoidal input current, unity power factor, stabilized dcbus voltage and the constant injected power to the system arethe desirable characteristics the converter possesses.B. EF Mode of operationEF mode of operation is simulated for the case when 600 Wis drawn from the dc bus for battery charging. The value ofinverter modulation index and hence output voltage has notchanged. This verifies the ability of the converter to absorbmore power than normal condition which is resulted byincreasing the rectifier modulation index value. The samehappens when a conventional on-line UPS is charging thebattery. It should be noticed that the normal operating point isobtained based on output load power but the converter shouldbe designed to provide the maximum power demandedsimultaneously by the battery and the load.The system performance could be observed during inputsource voltage sag in Fig. 13 and 14 for two instances of linearand non-linear loads. Compared to DF operation, the loadcurrent has not changed since the inverter modulation index isfixed but the input current has risen to supply the batterypower. The input current THDs for linear and non-linear loadsFig. 11. DF mode of operation, linear loada- Input source voltages and currentsb- Load currentsc- Dc bus voltaged- Input active/reactive powerare 1.93% and 2.36% respectively. Operation of the converterwhen the input is experiencing voltage sag, is distinguishedfrom the normal mode via dotted line in all the result figures. Itcan be seen that the system has a fast dynamic responsewhether working in DF or EF modes of operation under bothlinear and non-linear load conditions.Voltage(V)-Current(A)-110,0,110Time (sec)(a)Current(A)-10,0,10Time (sec)(b)Time (sec)(c)Voltage(V)250,360P(W),Q(var)-50,0,1200Time (sec)(d)Normal input Input voltage sag412
  • 6. Fig. 12. DF mode of operation, non-linear loada- Input source voltages and currentsb- Load currentsc- Dc bus voltaged- Input active/reactive powerVII. CONCLUSIONA new two-leg type reduced-switch-count topology wasintroduced and a modulation scheme was elaborated for it. Anew method of determining optimal operating point wasdeveloped. This method is also applicable to three-phaseconverters of the same type.Fig. 13. EF mode of operation, linear loada- Input source voltages and currentsb- Load currentsc- Dc bus voltaged- Input active/reactive powerOverall, the proposed converter and the suggested operatingpoint along with the proposed strategy for the battery chargingenjoys several advantages over its three-phase counterpart suchas being suitable for low power/voltage applications, enhanceddc bus utilization, reduced switching loss, improved outputvoltage THD, expedited battery charging rate, etc.Voltage(V)-Current(A)-110,0,110Time (sec)(a)Current(A)-20,0,20Time (sec)(b)Time (sec)(c)Voltage(V)250,360P(W),Q(var)-50,0,1200Time (sec)(d)Normal input Input voltage sagVoltage(V)-Current(A)-110,0,110Time (sec)(a)Current(A)-10,0,10Time (sec)(b)Time (sec)(c)Voltage(V)250,360P(W),Q(var)-50,0,1850Time (sec)(d)Normal input Input voltage sag413
  • 7. Fig. 14. EF mode of operation, non-linear loada- Input source voltages and currentsb- Load currentsc- Dc bus voltaged- Input active/reactive powerThe validity of stated features of the converter wasconfirmed by simulation results.REFERENCES[1] Gui-Jia Su ; Ohno, T,"A novel topology for single phase UPS systems",Industry Applications Conference IEEE 1997,vol.2,pp.1376-1382.[2] Bekiarov, S.B.; Nasiri, A.; Emadi, A,"A new reduced parts on-linesingle-phase UPS system ",Industrial Electronics Society, 2003. IECON03. The 29th Annual Conference of the IEEE ,vol.1.pp.688-693.[3] Uematsu, T.; Ikeda, T.; Hirao, N.; Totsuka, S.; Ninomiya, T.;Kawamoto, H.,"A study of the high performance single-phase UPS",Power Electronics Specialists Conference, 1998. PESC 98 Record.29th Annual IEEE ,vol.2,pp.1872-1878.[4] Hirachi, K.; Kurokawa, M.; Nakaoka, M., "Feasible compact UPSincorporating current-mode controlled two-quadrant chopper-fedbattery”, International Conference on Power Electronics and DriveSystems, 1997. Proceedings., 1997 , vol.1, pp. 418 - 424[5] Gui-Jia Su; Ohno, T.,"A new topology for single phase UPS systems",Power Conversion Conference - Nagaoka 1997., Proceedings of the,vol.2,pp.913-918.[6] Chia-Chou Yeh; Manjrekar, M.D,"A Reconfigurable UninterruptiblePower Supply System for Multiple Power Quality Applications",IEEETransactions on Power Elecronics,2005,vol.3,pp.1842-1830.[7] Congwei Liu; Bin Wu; Zargari, N.R.; Dewei Xu; Jiacheng Wang.,"ANovel Three-Phase Three-Leg AC/AC Converter Using NineIGBTs",IEEE Transactions on Power Electronics,2008,vol.24,pp.1151-1160.[8] T. Kominami, Y. Fujimoto : "A Novel Nine-Switch Inverter forIndependent Control of Two Three-phase Loads", IEEE IndustryApplications Society Annual Conference (IAS) , 2007, pp. 2346-2350.[9] Dehghan, S. M.; Mohamadian, M.; Yazdian, A.,"Hybrid ElectricVehicle Based on Bidirectional Z-Source Nine-Switch Inverter",IEEETransactions on Vehicular Technology,2010,vol.59.pp.2641-2653.[10] Azizi, M. ; Fatemi, A. ; Mohamadian, M. ; Yazdian, A ,"A novel Z-source four-leg inverter with two independent four-wire outputs" , 1stPower Electronic & Drive System Technologies Conference (PEDSTC),2010,2010,PP.163 - 168.[11] C.Liu , B.Wu, N.Zargari and D.Xu: "A novel nine-switch PWMrectifier-inverter topology for three phase UPS applications", Journal ofEuropean Power Electronics (EPE), vol. 19, no. 2, 2009, pp. 1 -10.[12] Feng Gao ; Lei Zhang ; Ding Li ; Poh Chiang Loh ; Yi Tang ; HouleiGao , "Optimal Pulse width Modulation of Nine-Switch Converter",Power Electronics, IEEE Transactions on ,vol.25,no.9, 2010, PP.2331 –2343.[13] Haque, M.T, "Single-phase PQ theory" ,Power Electronics SpecialistsConference PESC 2002 IEEE 33rd Annual ,vol.4, pp.1815-1820.[14] Gonzalez, M.; Cardenas, V.; Pazos, F.,"DQ transformation developmentfor single-phase systems to compensate harmonic distortion and reactivepower" ,Power Electronics Congress, 2004. CIEP 2004. 9th IEEEInternational ,pp.177-182.Voltage(V)-Current(A)-110,0,110Time (sec)(a)Current(A)-20,0,20Time (sec)(b)Time (sec)(c)Voltage(V)250,360P(W),Q(var)-50,0,1850Time (sec)(d)Normal input Input voltage sag414