TERM PAPER on Integrated circuits Submitted to Amity School Of Engineering Submitted ByChundru Raga Sumanth B.Tech-EEE,EEE2Enroll:A12424611007 Under the supervision Of MsRashmiswarnakar (Asst. Professor) ASET Amity University, Uttar Pradesh
ACKNOWLEDGMENTAny work visible is not the effort of the presenter only,but there are manyothers behind the camera and my report is not an exception to this.So,in processof recognizing the effort of those behind the scene,we would like to sincerely-thank the teachers of AMITY UNIVERSITY for sharing thier valuable viewsand time in completion of this project. Above all Iam highly grateful to Ms RashmiSwarnkar,whose continuousmotivation,guidance and suggestions backed us in completing the project mostproductively.Finally,not to forget the cooperation made by our classmate inproviding any relevant data they came across. FROM:-Chundru Raga SumanthB.tech-EEEA12424611007
DeclarationI, Chundru Raga Sumanthof Amity School of Engineering declare that the workembedded in this term paper entitled Integrated Circuits . It is an authenticrecord of the work carried out by the author under the supervision of AssistantProfessor Ms RashmiSwarnkar of Amity School Of Engineering, Noida. Thematter presented in this term paper is original and has not been submitted inparts or in full for diploma or degree for this or any other institution.Chundru Raga SumanthA12424611007
CertificateThis is to certify that Mr.Chundru Raga Sumanth student of B.Tech. inElectrical and Electronics Engineering (2011-2015) has carried out the workpresented in the project of the Term paper entitle "INTEGRATEDCIRCUITS” as a part of First year programme of Bachelor of Technology in2012 from Amity School of Engineering , Amity University, Noida, UttarPradesh under my supervision. MsRashmiSwarnakar (Asst.Professor) ASET Amity University Noida, U.P.
INDEXSr.no Topic 1 INTEGRATE CIRCUITS 2 HISTORY 3 EVOLUTION OF MICROELECTRONICS 4 VACUUM-TUBE EQUIPMENT 5 SOLID-STATE DEVICES 6 PRINTED CIRCUIT BOARD 7 DIFFERENCE BETWEEN DISCRETE AND INTEGRATED CIRCUITS 8 RELIABILITY 9 CLASSIFICATION OF INTEGRATED CIRCUITS 10 GENERATIONS OF INTEGRATED CIRCUITS 11 MANFACTURING OF INTEGRATED CIRCUITS 12 ThE 555 TIMER 13 3-D INTEGRATED CIRCUITS
TERM PAPER ONINTEGRATED CIRCUITSINTEGRATED CIRCUITS:An integrated circuit (IC) can be the equivalent of dozens, hundreds, or thousands ofseparate electronic parts.Digital ICs, such as microprocessors, can equal millions of parts. Now, digital andmixedsignal ICs are finding more applications in analog systemsA mixed-signal printed circuit board containing both analog and digital components.HISTORY:The integrated circuit was introduced in 1958.It has been called the most significant technological development of the twentieth century.Integrated circuits have allowed electronics to expand at an amazing rate. Much of thegrowth has been in the area of digital electronics.Lately, analog ICs have received more attention, and the designation “mixed-signal” isnow applied to ICs that combine digital and analog functions.
JACK KILBY’S ORIGINAL INTEGRATED CIRCUITSKilby won the 2000 Nobel Prize in Physics for his part of the invention of the integratedcircuit.Evaluation of integrated circuit/history of integrated circuitEVOLUTION OF MICROELECTRONICS:The earliest electronic circuits were fairly simple. They were composed of a few tubes,transformers, resistors,capacitors, and wiring. As more was learned by designers, they began to increase both thesizeand complexity of circuits. Component limitations were soon identified as this technologydeveloped.VACUUM-TUBE EQUIPMENTVacuum tubes were found to have several built-in problems. Although the tubes werelightweight,associated components and chassis were quite heavy. It was not uncommon for such chassisto weigh 40 to 50 pounds. In addition, the tubes generated a lot of heat, required a warm-up time from 1 to 2 minutes, and required hefty power supply voltages of 300 volts dc andmore.No two tubes of the same type were exactly alike in output characteristics. Therefore,designers were
required to produce circuits that could work with any tube of a particular type. This meantthat additional components were often required to tune the circuit to the outputcharacteristics required for the tube used. Figure 1-1 shows a typical vacuum-tube chassis.The actual size of the transformer is approximately 4 × 4 × 3 inches. Capacitors areapproximately 1 × 3 inches. The components in the figure are very large when compare to modern microelectronics Typical vacuum tube circuit. A circuit could be designed either as a complete system or as a functional part of a larger system. In complex systems, such as radar, many separate circuits were needed to accomplish the desired tasks.Multiple-function tubes, such as dual diodes, dual triodes, tetrodes, and others helpedconsiderably toreduce the size of circuits. However, weight, heat, and power consumption continued to beproblems that plagued designers.Another major problem with vacuum-tube circuits was themethod of wiring components referred toas POINT-TO-POINT WIRING. Figure 1-2 is anexcellent example of point-to-point wiring. Not onlydid this wiring look like a rats nest, but it often caused unwanted interactions betweencomponents. For example, it was not at all unusual to have inductive or capacitive effectsbetween wires. Also, point-topoint wiring posed a safety hazard when troubleshooting wasperformed on energized circuits because of exposed wiring and test points. Point-to-pointwiring was usually repaired with general purpose test equipment and common hand tools.SOLID-STATE DEVICESThe transition from vacuum tubes to solid-state devices took place rapidly. As new types oftransistors and diodes were created, they were adapted to circuits. The reductions in size,weight, and power use were impressive. Circuits that earlier weighed as much as 50 poundswere reduce in weight to just a few ounces by replacing bulky components with the muchlighter solid-state devices. The earliest solid-state circuits still relied on point-to-point wiringwhich caused many of the disadvantages mentioned earlier. A metal chassis, similar to thetype used with tubes, was required to provide physical support for the components. The
solid-state chassis was still considerably smaller and lighter than the older, tube chassis. Stillgreater improvements in component mounting methods were yet to come. One of the mostsignificant developments in circuit packaging has been the PRINTED CIRCUIT BOARD (pcb),as shown in figure 1-3. The pcb is usually an epoxy board on which the circuit leads havebeen added by the PHOTOETCHING process. This process is similar to photography in thatcopper-clad boards are exposed to controlled light in the desired circuit pattern and thenetched to remove the unwanted copper. This process leaves copper strips (LANDS) that areused to connect the components. In general, printed circuit boards eliminate both theheavy, metal chassis and the point-to-point wiring.Printed circuit board (pcb).Although printed circuit boards represent a major improvement over tube technology, theyare notwithout fault. For example, the number of components on each board is limited by the sizesand shapes of components. Also, while vacuum tubes are easily removed for testing orreplacement, pcb components are soldered into place and are not as easily removed.Normally, each pcb contains a single circuit or a subassembly of a system. All printed circuitboards within the system are routinely interconnected through CABLING HARNESSES(groups of wiring orribbons of wiring). You may be confronted with problems in faultyharness connections that affect system reliability. Such problems are often caused by wiringerrors, because of the large numbers of wires in aharness, and by damage to those wiresand connectors.
Another mounting form that has been used to increase the number of components in agiven space isthe cord word module perpendicular to the end plates. The components arepacked very closely together, appearing to be stacked like cordwood for a fireplace. The endplates are usually small printed circuit boards, but may beinsulators and solid wire, as shownin the figure. Cordwood modules may or may not be ENCAPSULATED (totally imbedded in solid material) but in either case they are difficult torepair.DIFFERENCE BETWEEN DISCRETE CIRCUITS ANDINTEGRATED CIRCUITS :Discrete circuits use individual resistors, capacitors, diodes, transistors, and other devices toachieve the circuit function. These individual or discrete parts must be interconnected. Theusual approach is to use a circuit board. This method, however, increases the cost of thecircuit. The board, assembly, soldering, and testing all make up a part of the cost.Integrated circuits do not eliminate the needfor circuit boards, assembly, soldering, andtesting.However, with ICs the number of discreteparts can be reduced. This means that thecircuitboards can be smaller, often use less power, andIntegrated Circuits that they will costless to produce. It may also be possible to reduce the overall size of the equipment usingintegrated circuits, which can reduce costs in the chassis and cabinet.RELIABILITY : Integrated circuits may lead to circuits that require fewer alignment steps at thefactory. This is especially true with digital devices.Reliability is related indirectly to the number of parts in the equipment. As the number ofparts goes up, the reliability comes down. Integrated circuits make it possible to reduce thenumber of discrete parts in a piece of equipment. Thus, electronic equipment can be mademore reliable by the use of more ICs and fewer discrete components.
CLASSIFICATION OF INTEGRATED CIRCUITS:INTEGRATED CIRCUITS CAN BE CLASSIFIED INTO THREE CATEGORIES1) ANALOG IC2) DIGITAL IC3) MIXED SIGNAL(both analog and on digital on one chip)ANALOG IC’S:Analog ICs, such as sensors, power management circuits, and operational amplifiers, workby processing continuous signals. They perform functions like amplification, active filtering,demodulation, and mixing. Analog ICs ease the burden on circuit designers byhavingexpertly designed analog circuits available instead of designing a difficult analog circuit fromscratch.
Kit to make aanalog integrated circuit.DIGITAL IC’S: Digital integrated circuits can contain anything from one to millions of logic gates,flip-flops, multiplexers, and other circuits in a few square millimeters. The small size of thesecircuits allows high speed, low power dissipation, and reduced manufacturing costcompared with board-level integration. These digital ICs, typically microprocessors, DSPs,and micro controllers, work using binary mathematics to process "one" and "zero" signals.MIXED SIGNAL: ICs can also combine analog and digital circuits on a single chip to createfunctions such as A/D converters and D/A converters. Such circuits offer smaller size andlower cost, but must carefully account for signal interference
GENERATIONS OF INTEGRATED CIRCUITS:SMALL SCALE INTEGRATION :The first integrated circuits contained only a fewtransistors. Called "small-scale integration" (SSI), digital circuits containing transistorsnumbering in the tens provided a few logic gatesMEDIUM SCALE INTEGRATION :The next step in the development of integrated circuits, taken in the late 1960s, introduceddevices which contained hundreds of transistors on each chip, called "medium-scaleintegration" (MSI).VERY LARGE SCALE INTEGRATION :The final step in the development process, starting in the 1980s and continuing through thepresent, was "very large-scale integration" (VLSI). The development started with hundredsof thousands of transistors in the early 1980s, and continues beyond several billiontransistors as of 2009.Manfacturing of integrated circuitFabrication:Placing over 1 million transistors on a piece ofsilicon the size of a fingertip is intricate work.The current precision is less than one micron,with one-tenth of a micron now being used. A
micron is only about one-hundredth the diameter of a human hair.The fabrication process isapplied to thinwafers of silicon. There are eight basic steps.Some of these steps arerepeatedmany timesmaking the total number of steps one hundredor more. The entire processusually takes from10 to 30 days. The eight basic steps are:• Deposition (forming an insulating layerof SiO2 on the silicon wafer)• Photolithography (light-sensitive layerexposed through a patterned photomask)• Etching (removal of patterned areas usingplasma gas or chemicals)• Doping (placing donor and acceptor impuritiesinto the wafer by diffusion or by using ionimplantation)• Metallization (formation of interconnectsand connection pads by depositing metal)• Passivation (application of a protective layer)• Testing (probes check each circuit for proper electrical function)• Packaging (wafers are separated into chips, the chips are mounted, bonded/ wired, andthe packages are sealed) Sand is the base material for making the wafers. It is melted,purified and then melted again in a radio frequency (RF) furnace. Figure13-4 shows the molten silicon in a quartz crucible. A seed crystal is lowered into thefurnace until it touches the melt. After a little of the molten silicon freezes around the seedcrystal, the seed begins to rotate and is slowly retracted from the furnace. A large, singlecrystal of silicon forms as the silicon moves away from the melt and cools. Pulled crystals arealso called ingots. Ingotsn are ground to a cylindrical shape and then slicedinto thin wafers with a diamond saw. The wafers then ground flat and polished to a mirrorfinish.n The polished wafers are sent on to the wafer fabrication area, or clean room wheretemperature, humidity, and dust are all tightly controlled. After a thorough cleaning, thewafers are exposed to ultra pure oxygen to form a layer of silicon dioxide (SiO2). Next, thewafers are coated with photoresist, which is a material that hardens when exposed to light.The exposure is
made through a photomask. Each mask has a pattern that will be transferred to the wafer.The unhardened areas of the photoresist, caused by the opaque areas of the photomask,wash away during the developing step. The wafer is then etched to remove the silicondioxide and expose the patterned areas of the substrate. The exposed areas act as windowsto allow penetration by impurity atoms. The remains of the photoresist are removed withchemicals or plasma gas. Figure 13-5 shows the major steps in this mostly photolithographicprocess. The wafer is reoxidized and the photolithographic sequence is repeated from 8 to20 times, depending on the complexity of the IC being manufactured. Thus,photolithography is considered the core process in IC fabrication. When the basic circuit hasfinally been completed, the surface is passivatedusing a silicon nitride coating. This coatingacts as an insulator and also serves to protect the surface from damage and contamination.The wafer size back in 1971 was about 2 inches in diameter. Now, wafers as large as12 inches in diameter are being processed. This means that ICs are being manufactured ineverincreasing batch sizes, and that’s one of the reasons costs are decreasing. A large waferwill yield hundreds or thousands of individual chips (Figure 13-6 on page 390). Some of theindividual chips might be defective. Figure 13-7 on page 390 shows that needle sharp probesare used to electrically test each chip. The defective ones are marked with a dot of ink forlater disposal. The wafer is cut apart with a diamond saw and the good circuits, now calledchips, are mounted onto metal headers as shown in Figure13-8 on page 390. The chip padsand header tabs are connected with very fine wire. Ball bonding, or more likely ultrasonicbonding, is used to make the connections. The package is
most common and ceramic or metal packages are used for military or other criticalapplications. A general overview of IC fabrication hasbeen presented so far and more detail about transistor, diode, resistor, and capacitor circuitfunctions will now be offered. Figure 13-9 shows one way to fabricate an NPN junctiontransistor. A P type substrate is shown. An N_ layer is diffused into the substrate to form thecollector of the transistor. N_ means that more than the average number of impurity atomsenter the crystal. This is called heavy doping and it serves to lower the resistance of thecollector. An N layer is then formed over the substrateusing an epitaxial process. Epitaxy isthe controlled growth on a crystalline substrate of a crystalline layer, called an epilayer. Theepilayer exactly duplicates the properties and crystal structure of the substrate. The epilayeris oxidized and exposed through a photomask. After developing, a P type impurity such asboron is diffused into the windows until the substrate is reached. This electrically isolatesan entire region on the N type epilayer. This is called the isolation diffusion and allowsseparate electrical functions to exist in a single layer. Refer again to Fig. 13-9. Again,photolithography opens up a window and a P-type impurity can be diffused in to form thebase of the transistor. Later, an N-type diffusion will form the emitter. Polarity reversals byrepeated diffusions would eventually saturate the crystal so their number is usually limitedto three. Since emitters are normally heavily doped in any case, the process is designed sothat the emitter diffusion is the last one. The transistor has now been electrically isolatedand its three regions have been formed. To be useful, it must be connected. Once again,thewafer is oxidized and photolithography is used to open up windows as shown in Figure13-10 on page 392. These expose the connection points for the emitter, base, and thecollector.Aluminum is evaporated and then deposited onto the surface of the wafer to makecontactthrough the windows. Photolithography is used to pattern the metal layer. Etchingremoves the unwanted aluminum and Fig. 13-10(c) and (d) shows what remains. ComplexICs can have two or even three separate aluminumlayers separated by dielectriclayers.While the transistors are being formed, diodes are also being formed.
Figure 13-12 shows how a capacitor might be formed. The N type region acts as one plate,analuminum layer as the other, and silicon dioxide serves as the insulator. Anotherapproach is to use a reverse-biased P-N junction as a capacitor. Both methods are used.Figure 13-13 illustrates resistor formation. Different values of resistance are realized bycontrolling the size of the N channel and the level of doping. Once again, heavy dopingproduces less resistance. An MOS transistor is shown in Figure 13-14. Notice the insulating(SiO2) layer between the gate and the channel. MOS transistors take up less space than BJTsand are often preferred for that reason. IC components have certain limitationswhencompared with discrete components:• Resistor accuracy is limited. However, resistors in hybrid ICs can be laser trimmed toovercome this.• Very low and very high resistor values are not practical.• Inductors are usually not practical.• Only small values of capacitance arepractical.• PNP transistors tend to not perform as well as discrete types.The 555 Timer :The NE555 IC timer offers low cost and versatility.
It is available in the 8-pin mini-DIP and in the miniature molded small outline package(MSOP).The 555 provides stable time delays or free running oscillation. The time-delay mode is RC-controlled by two external components.Timing from microseconds to hours is possible. The oscillator mode requires three or moreexternal components, depending on the desired output waveform. Frequencies from less than 1 Hz to 500 kHz with duty cycles from 1 to 99 percent can be attained .Advances in integrated circuitsAmong the most advanced integrated circuits are the microprocessors or "cores", whichcontrol everything fromcomputers and cellular phones to digital microwave ovens. Digitalmemory chips and ASICs are examples ofother families of integrated circuits that areimportant to the modern information society. While the cost ofdesigning and developing acomplex integrated circuit is quite high, when spread across typically millions ofproduction
units the individual IC cost is minimized. The performance of ICs is high because the smallsize allows short traces which in turn allows low power logic (such as CMOS) to be used atfast switching speeds.ICs have consistently migrated to smaller feature sizes over the years,allowing more circuitry to be packed oneach chip. This increased capacity per unit area canbe used to decrease cost and/or increase functionality—see Moores law which, in itsmodern interpretation, states that the number of transistors in an integrated circuitdoublesevery two years. In general, as the feature size shrinks, almost everything improves—thecost per unitand the switching power consumption go down, and the speed goes up.However, ICs with nanometer-scaledevices are not without their problems, principal amongwhich is leakage current (see subthreshold leakage for adiscussion of this), although theseproblems are not insurmountable and will likely be solved or at leastameliorated by theintroduction of high-k dielectrics. Since these speed and power consumption gainsareapparent to the end user, there is fierce competition among the manufacturers to usefiner geometries. This process, and the expected progress over the next few years, is welldescribed by the International Technology Roadmap for Semiconductors (ITRS).In currentresearch projects, integrated circuits are also developed for sensoric applications in medicalimplants or other bioelectronicdevices.Particular sealing strategies have to be taken in suchbiogenic environments to avoid corrosion or biodegradation of the exposedsemiconductormaterials. As one of the few materials well established in CMOStechnology, titaniumnitride (TiN) turned out as exceptionally stable and well suited forelectrode applications in medical implants.Three-dimensional integrated circuitFrom Wikipedia, the free encyclopediaIn electronics, a three-dimensional integrated circuit(3D IC, 3D-IC, or 3-D IC) is a chip in which two or morelayers of active electronic componentsare integrated both vertically and horizontally into a single circuit. The semiconductorindustry is pursuing this promising technology in many different forms, but it is not yetwidely used;consequently, the definition is still somewhat fluid.3D ICs vs. 3D packaging:3D packaging saves space by stacking separate chips in a single package. This packaging,known as System inPackage (SiP) or Chip Stack MCM, does not integrate the chips into asingle circuit. The chips in the packagecommunicate using off-chip signaling, much as if theywere mounted in separate packages on a normal circuit board. In contrast, a 3D IC is asingle chip. All components on the layers communicate using on-chip signaling, whethervertically or horizontally. A 3D IC bears the same relation to a 3D package that a SoC bearsto a circuit board.
Notable 3D chipsThe Teraflops Research Chip introduced in 2007 by Intel is an experimental 80-core designwith stacked memory. Due to the high demand for memory bandwidth, a traditional IOapproach would consume 10 to 25W. To improveupon that, Intel designers implementeda TSV-based memory bus. Each core is connected to one memory tile in theSRAM die with alink that provides 12 GB/s bandwidth, resulting in a total bandwidth of 1 TB/s whileconsumingonly 2.2W.In 2004, Intel presented a 3D version of the Pentium 4 CPU. Thechip was manufactured with two dies using faceto-face stacking, which allowed a dense viastructure. Backside TSVs are used for IO and power supply. For the 3D floorplan, designersmanually arranged functional blocks in each die aiming for power reduction andperformanceimprovement. Splitting large and high-power blocks and careful rearrangementallowed to limit thermal hotspots.The 3D design provides 15% performance improvement(due to eliminated pipeline stages) and 15% power saving(due to eliminated repeaters andreduced wiring) compared to the 2D PentiumAn academic implementation of a 3Dprocessor was presented in 2008 at the University of Rochester by Professor Eby Friedmanand his students. The chip runs at a 1.4 GHz and it was designed for optimized verticalprocessingbetween the stacked chips which gives the 3D processor abilities that thetraditional one layered chip could notreach. One challenge in manufacturing of the three-dimensional chip was to make all of the layers work inharmony without any obstacles that would interfere with a piece ofinformation travelingfrom one layer to another. In ISSCC 2012, two 3D-IC-based multi-core designs usingGlobalFoundries 130 nm process and TezzazonsFaStack technology were presented anddemonstrated. 3D-MAPS, a 64 custom core implementation with twologic-die stack wasdemonstrated by researchers from the School of Electrical and Computer Engineering atGeorgia Institute of Technology. The second prototype was from the Department ofElectrical Engineering andComputer Science at University of Michigan called Centip3De, anear-threshold design based on ARM Cortex-M3Types of integrated circuit packages
PQFP - Plastic Quad FlatPack;PSOP - Power SmallOutlinePackage;QFN - Quad FlatNoLeadsPackage;QSOP - Quarter SizeOutlinePackage;SBDIP - SidebrazeDualin-LinePackage;SC-70 - Small OutlineTransistor;SIP - Single-In-LinePackage;SOIC - Small OutlineICPackage;SOJ - Small Outline JLead Package;SOT-23 - Small OutlineTransistor;SPDIP - ShrinkPlasticDual-in-Line Package;SSOP - Shrink SmallOutlinePackage;TDFN - Thin Dual FlatNoLeads Package;Moores law
Constructing Gates� transistor has three terminals A� source (feed with 5 volts) A+5 volts� base A� emitter, typically connected to Ana ground wire� the base signal is high (close to+5 volts), the source signal is grounded and the output Ifsignal is low (0). If the base signal is low(close to 0 volts), the source signalstays high andthe output signal is high (1) It turns out that, because the way a transistor works, theeasiest gates tocreate are the NOT, NAND, and NOR gate