ETE411 :: Lec16MOS<br />Dr. MashiurRahman<br />Copyright: Semiconductor Physics And Devices 3rd ed. - J. Neamen<br />
Basic MOS capacitor structure<br />
How it works?<br />A parallel-plate capacitor showing the electric field and conductor charges<br />A corresponding MOS ca...
MOS capacitor with a moderate positive gate bias<br />Induced space charge region<br />Electric field and charge flow<br />
MOS capacitor with a p-type substrate<br />A negative gate bias<br />Moderate positive gate bias<br />We have inverted the...
A “large” positive gate bias<br />
N-type substrate<br />Positive gate bias<br />Moderate negative gate bias<br />
MOS with n-type substrate<br />Positive gate bias<br />Moderate negative gate bias<br />A “large” negative gate bias<br />
Depletion layer thickness<br />Acceptor doping concentration<br />Surface potential<br />Permittivity of the semiconductor...
Maximum space charge width<br />Фs = 2 Фfp<br />eФs = 2e Фfp<br />This condition is known as threshold inversion point<br ...
Quiz 6<br />Quiz 6 will be held on Tuesday 4 July. <br />Lec 13<br />Lec 14<br />Mid 2 (8 August, Saturday) Lec 8 - Lec 15...
The energy-band diagram in the n-type semiconductor at the threshold inversion point<br />
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Ete411 Lec16 Mos

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Lecture on Introduction of Semiconductor at North South University as the undergraduate course (ETE411)
=======================
Dr. Mashiur Rahman
Assistant Professor
Dept. of Electrical Engineering and Computer Science
North South University, Dhaka, Bangladesh
http://mashiur.biggani.org

Published in: Technology, Business
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Ete411 Lec16 Mos

  1. 1. ETE411 :: Lec16MOS<br />Dr. MashiurRahman<br />Copyright: Semiconductor Physics And Devices 3rd ed. - J. Neamen<br />
  2. 2. Basic MOS capacitor structure<br />
  3. 3. How it works?<br />A parallel-plate capacitor showing the electric field and conductor charges<br />A corresponding MOS capacitor with a negative gate bias showing the electric field and charge flow<br />The MOS capacitor with an accumulation layer of holes<br />
  4. 4. MOS capacitor with a moderate positive gate bias<br />Induced space charge region<br />Electric field and charge flow<br />
  5. 5. MOS capacitor with a p-type substrate<br />A negative gate bias<br />Moderate positive gate bias<br />We have inverted the surface of the semiconductor from a p-type to an n-type semiconductor<br />
  6. 6. A “large” positive gate bias<br />
  7. 7. N-type substrate<br />Positive gate bias<br />Moderate negative gate bias<br />
  8. 8. MOS with n-type substrate<br />Positive gate bias<br />Moderate negative gate bias<br />A “large” negative gate bias<br />
  9. 9. Depletion layer thickness<br />Acceptor doping concentration<br />Surface potential<br />Permittivity of the semiconductor<br />
  10. 10. Maximum space charge width<br />Фs = 2 Фfp<br />eФs = 2e Фfp<br />This condition is known as threshold inversion point<br />Applied voltage is the threshold voltage<br />
  11. 11. Quiz 6<br />Quiz 6 will be held on Tuesday 4 July. <br />Lec 13<br />Lec 14<br />Mid 2 (8 August, Saturday) Lec 8 - Lec 15<br />Votes:<br />10-1: 0<br />2-4: 5 person<br />3-5: 14 person<br />6-8: 9 person <br />
  12. 12. The energy-band diagram in the n-type semiconductor at the threshold inversion point<br />
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