Computer Architecture: A quantitative approach - Cap4 - Section 6

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Computer Architecture: A quantitative approach - Cap4 - Section 6

  1. 1. Multiprocessors and Thread-Level Parallelism Models of Memory Consistency “ I'm radically increasing Sun's focus on storage today” Sun President Jonathan Schwartz (Oct, 2007)
  2. 2. What behavior should we expect?
  3. 3. <ul><li>Sequential consistency model </li></ul><ul><li>Data-race-free programs </li></ul><ul><li>Synchronization mechanism are extremely tricky </li></ul>The programmer's view
  4. 4. <ul><li>W->R: total store ordering / processor consistency </li></ul><ul><li>W->W: partial store order </li></ul><ul><li>R->W / R->R: weak ordering, PowerPC, </li></ul><ul><li>release consistency </li></ul>Relaxed Consistency Models
  5. 5. Thank you! Author: Prof. Sergio Takeo, Marcelo Arbore. Bibliography: Patterson, D. A.; Hennessy, J. L. Computer Architecture: A quantitative Approach, 4 th Ed. Morgan Kaufmann Publishers. “ I'm radically increasing Sun's focus on storage today” Sun President Jonathan Schwartz (Oct, 2007)

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