Boundary Scan Over In Circuit Test
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Boundary Scan Over In Circuit Test

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ICT Analysis

ICT Analysis

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Boundary Scan Over In Circuit Test Boundary Scan Over In Circuit Test Document Transcript

  • Boundary Scan over In-Circuit Test? It's often heard and read that In-Circuit Test has come to its limits in terms of board accessibility and utilization flexibility. Is Boundary Scan the logical successor or what makes most sense for achieving highest possible test coverage? Answers: The question is far to simplified. There are numerous factors that determine method of testability. With regard to Boundary Scan: 1. Are there boundary scan devices on the board? 2. Is there a chain of boundary scan devices or only one? 3. How do I power the board? 4. Is there connector access to the JTAG signals or do I need a fixtured access? 5. Are there mechanical needs such as heat sinks that must be attached if power is applied? Any of the above could remove Boundary Scan as a viable test method and force the issue to ICT. But then the limitations of fixtured access come into play. The combination of Boundary Scan and ICT is a powerful tool and can reduce the mechanical access that normal ICT requires. Too little fixtured access and the ICT process even with boundary scan are not cost effective. There is another process here that is ignored. The combination of Flying Probe Test and Boundary Scan. The limits of Boundary Scan are with the analog and non-boundary scan devices. The limit of flying probe is the ability to provide sufficient stimulus and measurement to make powered testing viable. When Flying Probe and Boundary Scan can be combined many of the limitations for the stand alone tests are removed. Full Boundary Scan coverage, full flying probe coverage and the extended coverage that using the flying probes as mobile stem and response units for the boundary scan. The NRE for a test fixture is gone but due to the extended test time the per-unit test cost increases. No one process can fit all types of board, the need is to determine best available method and the starting point is always the design of the board. Matt Turpin Sr. Test Engineer www.datest.com
  • There is no right or wrong answer, perhaps just a more correct answer. In-Circuit Test is a very powerful tool for testing printed circuit boards, below is a short list of what can be tested for:      Opens Shorts Miss oriented devices Out of tolerance device values Incorrect parts As circuit boards have become more electrically complex and physical component densities have increased to unimaginable levels ICT has also evolved and become much more capable. As stated with other’s answers to the ICT vs. B Scan; the board and devices must be boundary scan compliant and you must have access to their test ports. Please remember ICT testers also have different capabilities, and a thorough well thought out test plan, test program and fixturing can make a world of difference in gaining acceptable test coverage versus an average test. As with many of today’s advanced telecom boards’ electrical networks far exceed the available resources of today’s best ICT testers. This doesn’t render ICT useless by any means, advanced testing uses several different methods which have resolution down to the component lead level, or in today’s terms BGA ball. In many cases today’s ICT testers roll Boundary Scan in to their test tools to enhance test total coverage. Just as ICT usually is not the sole test for a circuit board, it is just one of the tools required to complete the coverage. Total coverage may require automated optical inspection (AOI), automated X-Ray inspection (AXI) and in some case flying probe testing followed by a functional and system test. Boundary Scan rolled into the ICT test is just one of many tools required to test today complex board. ICT does provide the resolution required to easily repair the printed circuit board before incurring any additional value add. www.circuitcheck.com Neil Adams Product Manager Circuit Check, Inc.
  • Boundary-scan plays a large role in solving the problem of diminishing test access from ICT. Combining it with other non-intrusive board test (NBT) technologies such as processor-controlled test, FPGA-controlled test, IJTAG test, and High-Speed IO testing will take you a long way in the quest to counter the diminishing test coverage on expensive heavy irons like ICT, and Flying Probe. So the question “Would you recommend non-intrusive board test (NBT) over In-Circuit Test (ICT)?” would definitely be YES, providing the design allows test NBT type testing. One tip is to start with a potent, highly automated boundary-scan tool as a base, and add other nonintrusive test technologies to counter the diminishing test coverage on expensive heavy irons like ICT, and Flying Probe. Here’s some interesting reading: Solving the Problem of Diminishing Test Coverage from In-Circuit Test (ICT). Kent Zetterberg ASSET Inter Tech Inc Kent Zetterberg Product Manager ASSET InterTech Inc. It took a while before the first (or the second) Boundary Scan vendor reacted to this question :-) As the opener of this thread I'd like to refer to GOEPEL electronic's JTAG/Boundary Scan solutions, being far more than just tools for test coverage increase or test problem track down. They help all the way for test, programming, validation, emulation or debugging: http://www.goepel.com/en/jtag-boundary-scan/application.html In this day and age of highly complex electronics and firmware, I would recommend doing functional testing of boards. Quentin Hardin GameTech View slide
  • For some reason this question shows up on the daily e-mail (at least the one I received today) even though it was asked several months ago. To determine the proper test strategy you need to ask why you test. From my perspective, there are two philosophies to testing, one to detect defects and one to verify performance to specifications. Depending on which philosophy is chosen, or a combination of both, will determine the test strategy. If you are testing to detect defects, perhaps the best way to begin is with an FMEA – Failure Modes and Effects Analysis. What possible defects could occur, what is the frequency, likelihood and severity of these defects, and what can be done to detect them? Decide what is an acceptable amount of risk in having a defect escape, and design your test strategy and process accordingly. Your strategy may include ICT, functional testing, boundary scan, AOI, visual inspection, x-ray and the like in order to accomplish your goals. If you test to verify performance to specifications, you should also analyze the test process to determine if possible defects can escape and what effect this may have on your product in service, for example, can reliability and durability be compromised? Then, to top it all off, you must look into the cost and throughput of your test strategy and determine if this fits in with the overall process parameters for production to meet demand and profitability. Blair Hogg Director, CI GAI-Tronics Corp. http://www.globalsmt.net/smt/index.php?option=com_jooanswers&task=details&id=56&Itemid=405 View slide