(Artech.) radio frequency integrated circuit design

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(Artech.) radio frequency integrated circuit design

  1. 1. Radio Frequency Integrated Circuit Design
  2. 2. For a listing of recent titles in the Artech House Microwave Library, turn to the back of this book.
  3. 3. Radio Frequency Integrated Circuit Design John Rogers Calvin Plett Artech House Boston • London www.artechhouse.com
  4. 4. Library of Congress Cataloging-in-Publication DataRogers, John (John W. M.) Radio frequency integrated circuit design / John Rogers, Calvin Plett. p. cm. — (Artech House microwave library) Includes bibliographical references and index. ISBN 1-58053-502-x (alk. paper) 1. Radio frequency integrated circuits—Design and construction. 2. Very high speed integrated circuits. I. Plett, Calvin. II. Title. III. Series. TK7874.78.R64 2003 621.3845—dc21 2003041891British Library Cataloguing in Publication DataRogers, John Radio frequency integrated circuit design. — (Artech House microwave library) 1. Radio circuits—Design and construction 2. Linear integrated circuits—Design and construction 3. Microwave integrated circuits—Design and construction 4. Bipolar integrated circuits—Design and construction I. Title II. Plett, Calvin 621.3’812 ISBN 1-58053-502-xCover design by Igor Valdman© 2003 ARTECH HOUSE, INC.685 Canton StreetNorwood, MA 02062All rights reserved. Printed and bound in the United States of America. No part of this bookmay be reproduced or utilized in any form or by any means, electronic or mechanical, includingphotocopying, recording, or by any information storage and retrieval system, without permissionin writing from the publisher. All terms mentioned in this book that are known to be trademarks or service marks have beenappropriately capitalized. Artech House cannot attest to the accuracy of this information. Useof a term in this book should not be regarded as affecting the validity of any trademark or servicemark.International Standard Book Number: 1-58053-502-xLibrary of Congress Catalog Card Number: 200304189110 9 8 7 6 5 4 3 2 1
  5. 5. Contents Foreword xv Acknowledgments xix 1 Introduction to Communications Circuits 1 1.1 Introduction 1 1.2 Lower Frequency Analog Design and Microwave Design Versus Radio Frequency Integrated Circuit Design 2 1.2.1 Impedance Levels for Microwave and Low- Frequency Analog Design 2 1.2.2 Units for Microwave and Low-Frequency Analog Design 3 1.3 Radio Frequency Integrated Circuits Used in a Communications Transceiver 4 1.4 Overview 6 References 6 2 Issues in RFIC Design, Noise, Linearity, and Filtering 9 2.1 Introduction 9 v
  6. 6. vi Radio Frequency Integrated Circuit Design 2.2 Noise 9 2.2.1 Thermal Noise 10 2.2.2 Available Noise Power 11 2.2.3 Available Power from Antenna 11 2.2.4 The Concept of Noise Figure 13 2.2.5 The Noise Figure of an Amplifier Circuit 14 2.2.6 The Noise Figure of Components in Series 16 2.3 Linearity and Distortion in RF Circuits 23 2.3.1 Power Series Expansion 23 2.3.2 Third-Order Intercept Point 27 2.3.3 Second-Order Intercept Point 29 2.3.4 The 1-dB Compression Point 30 2.3.5 Relationships Between 1-dB Compression and IP3 Points 31 2.3.6 Broadband Measures of Linearity 32 2.4 Dynamic Range 35 2.5 Filtering Issues 37 2.5.1 Image Signals and Image Reject Filtering 37 2.5.2 Blockers and Blocker Filtering 39 References 41 Selected Bibliography 42 3 A Brief Review of Technology 43 3.1 Introduction 43 3.2 Bipolar Transistor Description 43 3.3 ␤ Current Dependence 46 3.4 Small-Signal Model 47 3.5 Small-Signal Parameters 48 3.6 High-Frequency Effects 49 3.6.1 f T as a Function of Current 51 3.7 Noise in Bipolar Transistors 53 3.7.1 Thermal Noise in Transistor Components 53 3.7.2 Shot Noise 53 3.7.3 1/f Noise 54
  7. 7. Contents vii3.8 Base Shot Noise Discussion 553.9 Noise Sources in the Transistor Model 553.10 Bipolar Transistor Design Considerations 563.11 CMOS Transistors 573.11.1 NMOS 583.11.2 PMOS 583.11.3 CMOS Small-Signal Model Including Noise 583.11.4 CMOS Square Law Equations 60 References 614 Impedance Matching 634.1 Introduction 634.2 Review of the Smith Chart 664.3 Impedance Matching 694.4 Conversions Between Series and Parallel Resistor- Inductor and Resistor-Capacitor Circuits 744.5 Tapped Capacitors and Inductors 764.6 The Concept of Mutual Inductance 784.7 Matching Using Transformers 814.8 Tuning a Transformer 824.9 The Bandwidth of an Impedance Transformation Network 834.10 Quality Factor of an LC Resonator 854.11 Transmission Lines 884.12 S, Y, and Z Parameters 89 References 935 The Use and Design of Passive Circuit Elements in IC Technologies 955.1 Introduction 955.2 The Technology Back End and Metallization in IC Technologies 95
  8. 8. viii Radio Frequency Integrated Circuit Design 5.3 Sheet Resistance and the Skin Effect 97 5.4 Parasitic Capacitance 100 5.5 Parasitic Inductance 101 5.6 Current Handling in Metal Lines 102 5.7 Poly Resistors and Diffusion Resistors 103 5.8 Metal-Insulator-Metal Capacitors and Poly Capacitors 103 5.9 Applications of On-Chip Spiral Inductors and Transformers 104 5.10 Design of Inductors and Transformers 106 5.11 Some Basic Lumped Models for Inductors 108 5.12 Calculating the Inductance of Spirals 110 5.13 Self-Resonance of Inductors 110 5.14 The Quality Factor of an Inductor 111 5.15 Characterization of an Inductor 115 5.16 Some Notes About the Proper Use of Inductors 117 5.17 Layout of Spiral Inductors 119 5.18 Isolating the Inductor 121 5.19 The Use of Slotted Ground Shields and Inductors 122 5.20 Basic Transformer Layouts in IC Technologies 122 5.21 Multilevel Inductors 124 5.22 Characterizing Transformers for Use in ICs 127 5.23 On-Chip Transmission Lines 129 5.23.1 Effect of Transmission Line 130 5.23.2 Transmission Line Examples 131 5.24 High-Frequency Measurement of On-Chip Passives and Some Common De-Embedding Techniques 134
  9. 9. Contents ix5.25 Packaging 1355.25.1 Other Packaging Techniques 138 References 1396 LNA Design 1416.1 Introduction and Basic Amplifiers 1416.1.1 Common-Emitter Amplifier (Driver) 1416.1.2 Simplified Expressions for Widely Separated Poles 1466.1.3 The Common-Base Amplifier (Cascode) 1466.1.4 The Common-Collector Amplifier (Emitter Follower) 1486.2 Amplifiers with Feedback 1526.2.1 Common-Emitter with Series Feedback (Emitter Degeneration) 1526.2.2 The Common-Emitter with Shunt Feedback 1546.3 Noise in Amplifiers 1586.3.1 Input-Referred Noise Model of the Bipolar Transistor 1596.3.2 Noise Figure of the Common-Emitter Amplifier 1616.3.3 Input Matching of LNAs for Low Noise 1636.3.4 Relationship Between Noise Figure and Bias Current 1696.3.5 Effect of the Cascode on Noise Figure 1706.3.6 Noise in the Common-Collector Amplifier 1716.4 Linearity in Amplifiers 1726.4.1 Exponential Nonlinearity in the Bipolar Transistor 1726.4.2 Nonlinearity in the Output Impedance of the Bipolar Transistor 1806.4.3 High-Frequency Nonlinearity in the Bipolar Transistor 1826.4.4 Linearity in Common-Collector Configuration 1826.5 Differential Pair (Emitter-Coupled Pair) and Other Differential Amplifiers 1836.6 Low-Voltage Topologies for LNAs and the Use of On-Chip Transformers 184
  10. 10. x Radio Frequency Integrated Circuit Design 6.7 DC Bias Networks 187 6.7.1 Temperature Effects 189 6.8 Broadband LNA Design Example 189 References 194 Selected Bibliography 195 7 Mixers 197 7.1 Introduction 197 7.2 Mixing with Nonlinearity 197 7.3 Basic Mixer Operation 198 7.4 Controlled Transconductance Mixer 198 7.5 Double-Balanced Mixer 200 7.6 Mixer with Switching of Upper Quad 202 7.6.1 Why LO Switching? 203 7.6.2 Picking the LO Level 204 7.6.3 Analysis of Switching Modulator 205 7.7 Mixer Noise 206 7.8 Linearity 215 7.8.1 Desired Nonlinearity 215 7.8.2 Undesired Nonlinearity 215 7.9 Improving Isolation 217 7.10 Image Reject and Single-Sideband Mixer 217 7.10.1 Alternative Single-Sideband Mixers 219 7.10.2 Generating 90° Phase Shift 220 7.10.3 Image Rejection with Amplitude and Phase Mismatch 224 7.11 Alternative Mixer Designs 227 7.11.1 The Moore Mixer 228 7.11.2 Mixers with Transformer Input 228 7.11.3 Mixer with Simultaneous Noise and Power Match 229 7.11.4 Mixers with Coupling Capacitors 230
  11. 11. Contents xi7.12 General Design Comments 2317.12.1 Sizing Transistors 2327.12.2 Increasing Gain 2327.12.3 Increasing IP3 2327.12.4 Improving Noise Figure 2337.12.5 Effect of Bond Pads and the Package 2337.12.6 Matching, Bias Resistors, and Gain 2347.13 CMOS Mixers 242 References 244 Selected Bibliography 2448 Voltage-Controlled Oscillators 2458.1 Introduction 2458.2 Specification of Oscillator Properties 2458.3 The LC Resonator 2478.4 Adding Negative Resistance Through Feedback to the Resonator 2488.5 Popular Implementations of Feedback to the Resonator 2508.6 Configuration of the Amplifier (Colpitts or −G m ) 2518.7 Analysis of an Oscillator as a Feedback System 2528.7.1 Oscillator Closed-Loop Analysis 2528.7.2 Capacitor Ratios with Colpitts Oscillators 2558.7.3 Oscillator Open-Loop Analysis 2588.7.4 Simplified Loop Gain Estimates 2608.8 Negative Resistance Generated by the Amplifier 2628.8.1 Negative Resistance of Colpitts Oscillator 2628.8.2 Negative Resistance for Series and Parallel Circuits 2638.8.3 Negative Resistance Analysis of −G m Oscillator 2658.9 Comments on Oscillator Analysis 2688.10 Basic Differential Oscillator Topologies 270
  12. 12. xii Radio Frequency Integrated Circuit Design 8.11 A Modified Common-Collector Colpitts Oscillator with Buffering 270 8.12 Several Refinements to the −G m Topology 270 8.13 The Effect of Parasitics on the Frequency of Oscillation 274 8.14 Large-Signal Nonlinearity in the Transistor 275 8.15 Bias Shifting During Startup 277 8.16 Oscillator Amplitude 277 8.17 Phase Noise 283 8.17.1 Linear or Additive Phase Noise and Leeson’s Formula 283 8.17.2 Some Additional Notes About Low-Frequency Noise 291 8.17.3 Nonlinear Noise 292 8.18 Making the Oscillator Tunable 295 8.19 VCO Automatic-Amplitude Control Circuits 302 8.20 Other Oscillators 313 References 316 Selected Bibliography 317 9 High-Frequency Filter Circuits 319 9.1 Introduction 319 9.2 Second-Order Filters 320 9.3 Integrated RF Filters 321 9.3.1 A Simple Bandpass LC Filter 321 9.3.2 A Simple Bandstop Filter 322 9.3.3 An Alternative Bandstop Filter 323 9.4 Achieving Filters with Higher Q 327 9.4.1 Differential Bandpass LNA with Q -Tuned Load Resonator 327 9.4.2 A Bandstop Filter with Colpitts-Style Negative Resistance 329 9.4.3 Bandstop Filter with Transformer-Coupled −G m Negative Resistance 331
  13. 13. Contents xiii9.5 Some Simple Image Rejection Formulas 3339.6 Linearity of the Negative Resistance Circuits 3369.7 Noise Added Due to the Filter Circuitry 3379.8 Automatic Q Tuning 3399.9 Frequency Tuning 3429.10 Higher-Order Filters 343 References 346 Selected Bibliography 34710 Power Amplifiers 34910.1 Introduction 34910.2 Power Capability 35010.3 Efficiency Calculations 35010.4 Matching Considerations 35110.4.1 Matching to S 22 Versus Matching to ⌫opt * 35210.5 Class A, B, and C Amplifiers 35310.5.1 Class A, B, and C Analysis 35610.5.2 Class B Push-Pull Arrangements 36210.5.3 Models for Transconductance 36310.6 Class D Amplifiers 36710.7 Class E Amplifiers 36810.7.1 Analysis of Class E Amplifier 37010.7.2 Class E Equations 37110.7.3 Class E Equations for Finite Output Q 37210.7.4 Saturation Voltage and Resistance 37310.7.5 Transition Time 37310.8 Class F Amplifiers 37510.8.1 Variation on Class F: Second-Harmonic Peaking 37910.8.2 Variation on Class F: Quarter-Wave Transmission Line 37910.9 Class G and H Amplifiers 38110.10 Class S Amplifiers 383
  14. 14. xiv Radio Frequency Integrated Circuit Design 10.11 Summary of Amplifier Classes for RF Integrated Circuits 384 10.12 AC Load Line 385 10.13 Matching to Achieve Desired Power 385 10.14 Transistor Saturation 388 10.15 Current Limits 388 10.16 Current Limits in Integrated Inductors 390 10.17 Power Combining 390 10.18 Thermal Runaway—Ballasting 392 10.19 Breakdown Voltage 393 10.20 Packaging 394 10.21 Effects and Implications of Nonlinearity 394 10.21.1 Cross Modulation 395 10.21.2 AM-to-PM Conversion 395 10.21.3 Spectral Regrowth 395 10.21.4 Linearization Techniques 396 10.21.5 Feedforward 396 10.21.6 Feedback 397 10.22 CMOS Power Amplifier Example 398 References 399 About the Authors 401 Index 403
  15. 15. ForewordI enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-level book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary. Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communica-tions. The circuits usually used have evolved through experience, without asatisfying intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anintellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise. xv
  16. 16. xvi Radio Frequency Integrated Circuit Design In the latter part of the book, the RF circuits analyzed are ones thatexperience has shown to be good ones. Concentration is on bipolar circuits,not metal oxide semiconductors (MOS). Bipolar still has many advantages athigh frequency. The depth with which design issues are addressed would notbe possible if similar MOS coverage was attempted. However, there might beroom for a similar book, which concentrates on MOS. In this book there is a lot of detailed academic exploration of someimportant high-frequency RF bipolar ICs. One might ask if this is importantin design for application, and the answer is yes. To understand why, one mustappreciate the central role of analog circuit simulators in the design of suchcircuits. At the beginning of my career (around 1955–1960) discrete circuitswere large enough that good circuit topologies could be picked out by bread-boarding with the actual parts themselves. This worked fairly well with someanalog circuits at audio frequencies, but failed completely in the progression tointegrated circuits. In high-speed IC design nowadays, the computer-based circuit simulatoris crucial. Such simulation is important at four levels. The first level is the useof simplified models of the circuit elements (idealized transistors, capacitors,and inductors). The use of such models allows one to pick out good topologiesand eliminate bad ones. This is not done well with just paper analysis becauseit will miss key factors, such as the complexities of the transistor, particularlynonlinearity and bias and signal interaction effects. Exploration of topologieswith the aid of a circuit simulator is necessary. The simulator is useful for quickiteration of proposed circuits, with simplified models to show any fundamentalproblems with a proposed circuit. This brings out the influence of modelparameters on circuit performance. This first level of simulation may be avoidedif the best topology, known through experience, is picked at the start. The second level of simulation is where the models are representative ofthe type of fabrication technology being used. However, we do not yet usespecific numbers from the specific fabrication process and make an educatedapproximation to likely parasitic capacitances. Simulation at this level can beused to home in on good values for circuit parameters for a given topologybefore the final fabrication process is available. Before the simulation begins,detailed preliminary analysis at the level of this book is possible, and manyparameters can be wisely chosen before simulation begins, greatly shorteningthe design process and the required number of iterations. Thus, the analysisshould focus on topics that arise, given a typical fabrication process. I believethis has been done well here, and the authors, through scholarly work and realdesign experience, have chosen key circuits and topics. The third level of design is where a link with a proprietary industrialprocess has been made, and good simulator models are supplied for the process.The circuit is laid out in the proprietary process and simulation is done, including
  17. 17. Foreword xviiestimates of parasitic capacitances from interconnections and detailed modelsof the elements used. The incorporation of the proprietary models in the simulation of thecircuit is necessary because when the IC is laid out in the actual process,fabrication of the result must be successful to the highest possible degree. Thisis because fabrication and testing is extremely expensive, and any failure canresult in the necessity to change the design, requiring further fabrication andretesting, causing delay in getting the product to market. The fourth design level is the comparison of the circuit behavior predictedfrom simulation with that of measurements of the actual circuit. Discrepanciesmust be explained. These may be from design errors or from inadequacies inthe models, which are uncovered by the experimental result. These modelinadequacies, when corrected, may result in further simulation, which causesthe circuit design and layout to be refined with further fabrication. This discussion has served to bring attention to the central role thatcomputer simulation has in the design of integrated RF circuits, and the accompa-nying importance of circuit analysis such as presented in this book. Such detailedanalysis may save money by facilitating the early success of applications. Thisbook can be beneficial to designers, or by those less focused on specific design,for recognizing key constraints in the area, with faith justified, I believe, thatthe book is a correct picture of the reality of high-speed RF communicationscircuit design. Miles A. Copeland Fellow IEEE Professor Emeritus Carleton University Department of Electronics Ottawa, Ontario, Canada April 2003
  18. 18. AcknowledgmentsThis book has evolved out of a number of documents including technical papers,course notes, and various theses. We decided that we would organize some ofthe research we and many others had been doing and turn it into a manuscriptthat would serve as a comprehensive text for engineers interested in learningabout radio frequency integrated circuits (RFIC). We have focused mainly onbipolar technology in the text, but since many techniques in RFICs are indepen-dent of technology, we hope that designers working with other technologieswill also find much of the text useful. We have tried very hard to identify andexterminate bugs and errors from the text. Undoubtedly there are still manyremaining, so we ask you, the reader, for your understanding. Please feel freeto contact us with your comments. We hope that these pages add to yourunderstanding of the subject. Nobody undertakes a project like this without support on a number oflevels, and there are many people that we need to thank. Professors MilesCopeland and Garry Tarr provided technical guidance and editing. We wouldlike to thank David Moore for his input and consultation on many aspects ofRFIC design. David, we have tried to add some of your wisdom to these pages.Thanks also go to Dave Rahn and Steve Kovacic, who have both contributedto our research efforts in a variety of ways. We would like to thank Sandi Plettwho tirelessly edited chapters, provided formatting, and helped beat the wordprocessor into submission. She did more than anybody except the authors tomake this project happen. We would also like to thank a number of graduatestudents, alumni, and colleagues who have helped us with our understandingof RFICs over the years. This list includes but is not limited to Neric Fong, xix
  19. 19. xx Radio Frequency Integrated Circuit Design ´Bill Toole, Jose Macedo, Sundus Kubba, Leonard Dauphinee, Rony Amaya,John J. Nisbet, Sorin Voinegescu, John Long, Tom Smy, Walt Bax, BrianRobar, Richard Griffith, Hugues Lafontaine, Ash Swaminathan, Jugnu Ojha,George Khoury, Mark Cloutier, John Peirce, Bill Bereza, and Martin Snelgrove.
  20. 20. 1Introduction to CommunicationsCircuits1.1 IntroductionRadio frequency integrated circuit (RFIC) design is an exciting area for researchor product development. Technologies are constantly being improved, and asthey are, circuits formerly implemented as discrete solutions can now be inte-grated onto a single chip. In addition to widely used applications such as cordlessphones and cell phones, new applications continue to emerge. Examples of newproducts requiring RFICs are wireless local-area networks (WLAN), keyless entryfor cars, wireless toll collection, Global Positioning System (GPS) navigation,remote tags, asset tracking, remote sensing, and tuners in cable modems. Thus,the market is expanding, and with each new application there are uniquechallenges for the designers to overcome. As a result, the field of RFIC designshould have an abundance of products to keep designers entertained for yearsto come. This huge increase in interest in radio frequency (RF) communications hasresulted in an effort to provide components and complete systems on an integratedcircuit (IC). In academia, there has been much research aimed at putting acomplete radio on one chip. Since complementary metal oxide semiconductor(CMOS) is required for the digital signal processing (DSP) in the back end,much of this effort has been devoted to designing radios using CMOS technolo-gies [1–3]. However, bipolar design continues to be the industry standardbecause it is a more developed technology and, in many cases, is better modeled.Major research is being done in this area as well. CMOS traditionally had theadvantage of lower production cost, but as technology dimensions become 1
  21. 21. 2 Radio Frequency Integrated Circuit Designsmaller, this is becoming less true. Which will win? Who is to say? Ultimately,both will probably be replaced by radically different technologies. In any case,as long as people want to communicate, engineers will still be building radios.In this book we will focus on bipolar RF circuits, although CMOS circuits willalso be discussed. Contrary to popular belief, most of the design concepts inRFIC design are applicable regardless of what technology is used to implementthem. The objective of a radio is to transmit or receive a signal between sourceand destination with acceptable quality and without incurring a high cost. Fromthe user’s point of view, quality can be perceived as information being passedfrom source to destination without the addition of noticeable noise or distortion.From a more technical point of view, quality is often measured in terms of biterror rate, and acceptable quality might be to experience less than one error inevery million bits. Cost can be seen as the price of the communications equipmentor the need to replace or recharge batteries. Low cost implies simple circuits tominimize circuit area, but also low power dissipation to maximize battery life.1.2 Lower Frequency Analog Design and Microwave Design Versus Radio Frequency Integrated Circuit DesignRFIC design has borrowed from both analog design techniques, used at lowerfrequencies [4, 5], and high-frequency design techniques, making use of micro-wave theory [6, 7]. The most fundamental difference between low-frequencyanalog and microwave design is that in microwave design, transmission lineconcepts are important, while in low-frequency analog design, they are not.This will have implications for the choice of impedance levels, as well as howsignal size, noise, and distortion are described. On-chip dimensions are small, so even at RF frequencies (0.1–5 GHz),transistors and other devices may not need to be connected by transmissionlines (i.e., the lengths of the interconnects may not be a significant fraction ofa wavelength). However, at the chip boundaries, or when traversing a significantfraction of a wavelength on chip, transmission line theory becomes veryimportant. Thus, on chip we can usually make use of analog design concepts,although, in practice, microwave design concepts are often used. At the chipinterfaces with the outside world, we must treat it like a microwave circuit.1.2.1 Impedance Levels for Microwave and Low-Frequency Analog DesignIn low-frequency analog design, input impedance is usually very high (ideallyinfinity), while output impedance is low (ideally zero). For example, an opera-tional amplifier can be used as a buffer because its high input impedance doesnot affect the circuit to which it is connected, and its low output impedance
  22. 22. Introduction to Communications Circuits 3can drive a measurement device efficiently. The freedom to choose arbitraryimpedance levels provides advantages in that circuits can drive or be driven byan impedance that best suits them. On the other hand, if circuits are connectedusing transmission lines, then these circuits are usually designed to have aninput and output impedance that match the characteristic impedance of thetransmission line.1.2.2 Units for Microwave and Low-Frequency Analog DesignSignal, noise, and distortion levels are also described differently in low frequencyanalog versus microwave design. In microwave circuits, power is usually usedto describe signals, noise, or distortion with the typical unit of measure beingdecibels above 1 milliwatt (dBm). However, in analog circuits, since infinite orzero impedance is allowed, power levels are meaningless, so voltages and currentare usually chosen to describe the signal levels. Voltage and current are expressedas peak, peak-to-peak, or root-mean-square (rms). Power in dBm, P dBm , can berelated to the power in watts, Pwatt , as shown in (1.1) and Table 1.1, wherevoltages are assumed to be across 50⍀. P dBm = 10 log 10 ͩ ͪPwatt 1 mW (1.1) Assuming a sinusoidal voltage waveform, Pwatt is given by 2 v rms Pwatt = (1.2) Rwhere R is the resistance the voltage is developed across. Note also that v rmscan be related to the peak voltage v pp by Table 1.1 Power Relationships v pp v rms P watt (50⍀) P dBm (50⍀) 1 nV 0.3536 nV 2.5 × 10−21 −176 1 ␮V 0.3536 ␮ V 2.5 × 10−15 −116 1 mV 353.6 ␮ V 2.5 nW −56 10 mV 3.536 mV 250 nW −36 100 mV 35.36 mV 25 ␮ W −16 632.4 mV 223.6 mV 1 mW 0 1V 353.6 mV 2.5 mW +4 10V 3.536V 250 mW +24
  23. 23. 4 Radio Frequency Integrated Circuit Design v pp v rms = (1.3) 2√2 Similarly, noise in analog signals is often defined in terms of volts oramperes, while in microwave it will be in terms of dBm. Noise is usuallyrepresented as noise density per hertz of bandwidth. In analog circuits, noiseis specified as squared volts per hertz, or volts per square root of hertz. Inmicrowave circuits, the usual measure of noise is dBm/Hz or noise figure, whichis defined as the reduction in signal-to-noise ratio caused by the addition ofthe noise. In both analog and microwave circuits, an effect of nonlinearity is theappearance of harmonic distortion or intermodulation distortion, often at newfrequencies. In low-frequency analog circuits, this is often described by the ratioof the distortion components compared to the fundamental components. Inmicrowave circuits, the tendency is to describe distortion by gain compression(power level where the gain is reduced due to nonlinearity) or third-orderintercept point (IP3). Noise and linearity are discussed in detail in Chapter 2. A summary oflow-frequency analog and microwave design is shown in Table 1.2.1.3 Radio Frequency Integrated Circuits Used in a Communications TransceiverA typical block diagram of most of the major circuit blocks that make up atypical superheterodyne communications transceiver is shown in Figure 1.1.Many aspects of this transceiver are common to all transceivers. Table 1.2 Comparison of Analog and Microwave Design Parameter Analog Design Microwave Design (most often used on chip) (most often used at chip boundaries and pins) Impedance Z in ⇒ ∞ Z in ⇒ 50⍀ Z out ⇒ 0 Z out ⇒ 50⍀ Signals Voltage, current, often peak Power, often dBm or peak-to-peak Noise nV/√Hz Noise factor F, noise figure NF Nonlinearity Harmonic distortion, Third-order intercept point IP3 intermodulation, clipping 1-dB compression
  24. 24. Introduction to Communications Circuits 5Figure 1.1 Typical transceiver block diagram. This transceiver has a transmit side (Tx) and a receive side (Rx), whichare connected to the antenna through a duplexer that can be realized as a switchor a filter, depending on the communications standard being followed. Theinput preselection filter takes the broad spectrum of signals coming from theantenna and removes the signals not in the band of interest. This may berequired to prevent overloading of the low-noise amplifier (LNA) by out-of-band signals. The LNA amplifies the input signal without adding much noise.The input signal can be very weak, so the first thing to do is strengthen thesignal without corrupting it. As a result, noise added in later stages will be ofless importance. The image filter that follows the LNA removes out-of-bandsignals and noise (which will be discussed in detail in Chapter 2) before thesignal enters the mixer. The mixer translates the input RF signal down to theintermediate frequency, since filtering, as well as circuit design, becomes mucheasier at lower frequencies for a multitude of reasons. The other input to themixer is the local oscillator (LO) signal provided by a voltage-controlled oscillatorinside a frequency synthesizer. The desired output of the mixer will be thedifference between the LO frequency and the RF frequency. At the input of the radio there may be many different channels or frequencybands. The LO frequency is adjusted so that the desired RF channel or frequencyband is mixed down to the same intermediate frequency (IF) in all cases. TheIF stage then provides channel filtering at this one frequency to remove theunwanted channels. The IF stage provides further amplification and automaticgain control (AGC) to bring the signal to a specific amplitude level before thesignal is passed on to the back end of the receiver. It will ultimately be convertedinto bits (most modern communications systems use digital modulation schemes)that could represent, for example, voice, video, or data through the use of ananalog-to-digital converter.
  25. 25. 6 Radio Frequency Integrated Circuit Design On the transmit side, the back-end digital signal is used to modulate thecarrier in the IF stage. In the IF stage, there may be some filtering to removeunwanted signals generated by the baseband, and the signal may or may notbe converted into an analog waveform before it is modulated onto the IF carrier.A mixer converts the modulated signal and IF carrier up to the desired RFfrequency. A frequency synthesizer provides the other mixer input. Since theRF carrier and associated modulated data may have to be transmitted over largedistances through lossy media (e.g., air, cable, and fiber), a power amplifier (PA)must be used to increase the signal power. Typically, the power level is increasedfrom the milliwatt range to a level in the range of hundreds of milliwatts towatts, depending on the particular application. A lowpass filter after the PAremoves any harmonics produced by the PA to prevent them from also beingtransmitted.1.4 OverviewWe will spend the rest of this book trying to convey the various design constraintsof all the RF building blocks mentioned in the previous sections. Componentsare designed with the main concerns being frequency response, gain, stability,noise, distortion (nonlinearity), impedance matching, and power dissipation.Dealing with design constraints is what keeps the RFIC designer employed. The focus of this book will be how to design and build the major circuitblocks that make up the RF portion of a radio using an IC technology. Tothat end, block level performance specifications are described in Chapter 2. Abrief overview of IC technologies and transistor performance is given in Chapter3. Various methods of matching impedances, which are very important at chipboundaries and for some interconnections of circuits on-chip, will be discussedin Chapter 4. The realization and limitations of passive circuit components inan IC technology will be discussed in Chapter 5. Chapters 6 through 10 willbe devoted to individual circuit blocks such as LNAs, mixers, voltage-controlledoscillators (VCOs), filters, and power amplifiers. However, the design of completesynthesizers is beyond the scope of this book. The interested reader is referredto [8–10]. References [1] Lee, T. H., The Design of CMOS Radio Frequency Integrated Circuits, Cambridge, England: Cambridge University Press, 1998. [2] Razavi, B., RF Microelectronics, Upper Saddle River, NJ: Prentice Hall, 1998.
  26. 26. Introduction to Communications Circuits 7 [3] Crols, J., and M. Steyaert, CMOS Wireless Transceiver Design, Dordrecht, the Netherlands: Kluwer Academic Publishers, 1997. [4] Gray, P. R., et al., Analysis and Design of Analog Integrated Circuits, 4th ed., New York: John Wiley & Sons, 2001. [5] Johns, D. A., and K. Martin, Analog Integrated Circuit Design, New York: John Wiley & Sons, 1997. [6] Gonzalez, G., Microwave Transistor Amplifiers Analysis and Design, 2nd ed., Upper Saddle River, NJ: Prentice Hall, 1997. [7] Pozar, D. M., Microwave Engineering, 2nd ed., New York: John Wiley & Sons, 1998. [8] Crawford, J. A., Frequency Synthesizer Design Handbook, Norwood, MA: Artech House, 1994. [9] Wolaver, D. H., Phase-Locked Loop Circuit Design, Englewood Cliffs, NJ: Prentice Hall, 1991.[10] Razavi, B., (ed.), Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design, New York: IEEE Press, 1996.
  27. 27. 2Issues in RFIC Design, Noise, Linearity,and Filtering2.1 IntroductionIn this chapter we will have a brief look at some general issues in RF circuitdesign. Nonidealities we will consider include noise and nonlinearity. We willalso consider the effect of filtering. An ideal circuit, such as an amplifier, producesa perfect copy of the input signal at the output. In a real circuit, the amplifierwill introduce both noise and distortion to that waveform. Noise, which ispresent in all resistors and active devices, limits the minimum detectable signalin a radio. At the other amplitude extreme, nonlinearities in the circuit blockswill cause the output signal to become distorted, limiting the maximum signalamplitude. At the system level, specifications for linearity and noise as well as manyother parameters must be determined before the circuit can be designed. Inthis chapter, before we look at circuit details, we will look at some of thesesystem issues in more detail. In order to design radio frequency integratedcircuits with realistic specifications, we need to understand the impact of noiseon minimum detectable signals and the effect of nonlinearity on distortion.Knowledge of noise floors and distortion will be used to understand the require-ments for circuit parameters.2.2 NoiseSignal detection is more difficult in the presence of noise. In addition to thedesired signal, the receiver is also picking up noise from the rest of the universe. 9
  28. 28. 10 Radio Frequency Integrated Circuit DesignAny matter above 0K contains thermal energy. This thermal energy movesatoms and electrons around in a random way, leading to random currents incircuits, which are also noise. Noise can also come from man-made sourcessuch as microwave ovens, cell phones, pagers, and radio antennas. Circuitdesigners are mostly concerned with how much noise is being added by thecircuits in the transceiver. At the input to the receiver, there will be some noisepower present that defines the noise floor. The minimum detectable signal mustbe higher than the noise floor by some signal-to-noise ratio (SNR) to detectsignals reliably and to compensate for additional noise added by circuitry. Theseconcepts will be described in the following sections. We note that to find the total noise due to a number of sources, therelationship of the sources with each other has to be considered. The mostcommon assumption is that all noise sources are random and have no relationshipwith each other, so they are said to be uncorrelated. In such a case, noise poweris added instead of noise voltage. Similarly, if noise at different frequencies isuncorrelated, noise power is added. We note that signals, like noise, can alsobe uncorrelated, such as signals at different unrelated frequencies. In such acase, one finds the total output signal by adding the powers. On the otherhand, if two sources are correlated, the voltages can be added. As an example,correlated noise is seen at the outputs of two separate paths that have the sameorigin.2.2.1 Thermal NoiseOne of the most common noise sources in a circuit is a resistor. Noise inresistors is generated by thermal energy causing random electron motion [1–3].The thermal noise spectral density in a resistor is given by N resistor = 4kTR (2.1)where T is the Kelvin temperature of the resistor, k is Boltzmann’s constant(1.38 × 10−23 J/K), and R is the value of the resistor. Noise power spectraldensity is expressed using volts squared per hertz (power spectral density). Inorder to find out how much power a resistor produces in a finite bandwidth,simply multiply (2.1) by the bandwidth of interest ⌬ f : 2 v n = 4kTR ⌬ f (2.2)where v n is the rms value of the noise voltage in the bandwidth ⌬f . This canalso be written equivalently as a noise current rather than a noise voltage: 2 4kT ⌬ f in = (2.3) R
  29. 29. Issues in RFIC Design, Noise, Linearity, and Filtering 11 Thermal noise is white noise, meaning it has a constant power spectraldensity with respect to frequency (valid up to approximately 6,000 GHz) [4].The model for noise in a resistor is shown in Figure 2.1.2.2.2 Available Noise PowerMaximum power is transferred to the load when R LOAD is equal to R . Thenv o is equal to v n /2. The output power spectral density Po is then given by 2 2 vo vn Po = = = kT (2.4) R 4R Thus, available power is kT, independent of resistor size. Note that kT isin watts per hertz, which is a power density. To get total power out P out inwatts, multiply by the bandwidth, with the result that P out = kTB (2.5)2.2.3 Available Power from AntennaThe noise from an antenna can be modeled as a resistor [5]. Thus, as in theprevious section, the available power from an antenna is given by P available = kT = 4 × 10−21 W/Hz (2.6)Figure 2.1 Resistor noise model: (a) with a voltage source, and (b) with a current source.
  30. 30. 12 Radio Frequency Integrated Circuit Designat T = 290K, or in dBm per hertz, P available = 10 log 10 ͩ 4 × 10−21 1 × 10−3 ͪ = −174 dBm/Hz (2.7) Note that using 290K as the temperature of the resistor modeling theantenna is appropriate for cell phone applications where the antenna is pointedat the horizon. However, if the antenna were pointed at the sky, the equivalentnoise temperature would be much lower, more typically 50K [6]. For any receiver required to receive a given signal bandwidth, the minimumdetectable signal can now be determined. As can be seen from (2.5), the noisefloor depends on the bandwidth. For example, with a bandwidth of 200 kHz,the noise floor is Noise floor = kTB = 4 × 10−21 × 200,000 = 8 × 10−16 (2.8) More commonly, the noise floor would be expressed in dBm, as in thefollowing for the example shown above: Noise floor = −174 dBm/Hz + 10 log 10 (200,000) = −121 dBm (2.9) Thus, we can now also formally define signal-to-noise ratio. If the signalhas a power of S, then the SNR is S SNR = (2.10) Noise floor Thus, if the electronics added no noise and if the detector required asignal-to-noise ratio of 0 dB, then a signal at −121 dBm could just be detected.The minimum detectable signal in a receiver is also referred to as the receiversensitivity. However, the SNR required to detect bits reliably (e.g., bit errorrate (BER) = 10−3 ) is typically not 0 dB. The actual required SNR dependson a variety of factors, such as bit rate, energy per bit, IF filter bandwidth,detection method (e.g., synchronous or not), and interference levels. Suchcalculations are the topics for a digital communications course [6, 7] and willnot be discussed further here. But typical results for a bit error rate of 10−3 isabout 7 dB for quadrature phase shift keying (QPSK), about 12 dB for 16quadrature amplitude modulation (QAM), and about 17 dB for 64 QAM, thoughoften higher numbers are quoted to leave a safety margin. It should be notedthat for data transmission, lower BER is often required (e.g., 10−6 ), resultingin an SNR requirement of 11 dB or more for QPSK. Thus, the input signal
  31. 31. Issues in RFIC Design, Noise, Linearity, and Filtering 13level must be above the noise floor level by at least this amount. Consequently,the minimum detectable signal level in a 200-kHz bandwidth is more like −114dBm (assuming no noise is added by the electronics).2.2.4 The Concept of Noise FigureNoise added by electronics will be directly added to the noise from the input.Thus, for reliable detection, the previously calculated minimum detectable signallevel must be modified to include the noise from the active circuitry. Noisefrom the electronics is described by noise factor F, which is a measure of howmuch the signal-to-noise ratio is degraded through the system. We note that So = G и Si (2.11)where S i is the input signal power, S o is the output signal power, and G is thepower gain S o /S i . We derive the following equation for noise factor: SNR i S i /N i (source) S i /N i (source) N o (total) F= = = = (2.12) SNR o S o /N o (total) (S i и G )/N o (total) G и N i (source)where N o (total) is the total noise at the output. If N o (source) is the noise at theoutput originating at the source, and N o (added) is the noise at the output addedby the electronic circuitry, then we can write: N o (total) = N o (source) + N o (added) (2.13)Noise factor can be written in several useful alternative forms: N o (total) N N + N o (added) N F= = o (total) = o (source) = 1 + o (added) G и N i (source) N o (source) N o (source) N o (source) (2.14) This shows that the minimum possible noise factor, which occurs if theelectronics adds no noise, is equal to 1. Noise figure NF is related to noisefactor F by NF = 10 log 10 F (2.15) Thus, while noise factor is at least 1, noise figure is at least 0 dB. In otherwords, an electronic system that adds no noise has a noise figure of 0 dB. In the receiver chain, for components with loss (such as switches andfilters), the noise figure is equal to the attenuation of the signal. For example,
  32. 32. 14 Radio Frequency Integrated Circuit Designa filter with 3 dB of loss has a noise figure of 3 dB. This is explained by notingthat output noise is approximately equal to input noise, but signal is attenuatedby 3 dB. Thus, there has been a degradation of SNR by 3 dB.2.2.5 The Noise Figure of an Amplifier CircuitWe can now make use of the definition of noise figure just developed and applyit to an amplifier circuit [8]. For the purposes of developing (2.14) into a moreuseful form, it is assumed that all practical amplifiers can be characterized byan input-referred noise model, such as the one shown in Figure 2.2, where theamplifier is characterized with current gain A i . (It will be shown in later chaptershow to take a practical amplifier and make it fit this model.) In this model, allnoise sources in the circuit are lumped into a series noise voltage source v n anda parallel current noise source i n placed in front of a noiseless transfer function. If the amplifier has finite input impedance, then the input current willbe split by some ratio ␣ between the amplifier and the source admittance Ys : 2 ␣ 2i in SNR in = (2.16) ␣ 2i ns 2 Assuming that the input-referred noise sources are correlated, the outputsignal-to-noise ratio is 2 2 ␣ 2 A i i in SNR out = (2.17) ␣ 2 A 2 ΀i ns + | i n + v n Ys | ΁ 2 2 i Thus, the noise factor can now be written in terms of the preceding twoequations:Figure 2.2 Input-referred noise model for a device.
  33. 33. Issues in RFIC Design, Noise, Linearity, and Filtering 15 i ns + | i n + v n Ys | 2 2 N o (total) F= 2 = (2.18) i ns N o (source) This can also be interpreted as the ratio of the total output noise to thetotal output noise due to the source admittance. In (2.17), it was assumed that the two input noise sources were correlatedwith each other. In general, they will not be correlated with each other, butrather the current i n will be partially correlated with v n and partially uncorrelated.We can expand both current and voltage into these two explicit parts: in = ic + iu (2.19) vn = vc + vu (2.20) In addition, the correlated components will be related by the ratio i c = Yc v c (2.21)where Yc is the correlation admittance. The noise figure can now be written as i u + | Yc + Ys | v c2 + v u | Ys | 2 2 2 2 NF = 1 + 2 (2.22) i ns The noise currents and voltages can also be written in terms of equivalentresistance and admittance (these resistors would have the same noise behavior): v c2 Rc = (2.23) 4kT ⌬ f 2 vu Ru = (2.24) 4kT ⌬ f 2 iu Gu = (2.25) 4kT ⌬ f 2 i ns Gs = (2.26) 4kT ⌬ f
  34. 34. 16 Radio Frequency Integrated Circuit Design Thus, the noise figure is now written in terms of these parameters: G u + | Yc + Ys | R c + | Ys | R u 2 2 NF = 1 + (2.27) Gs G u + [(G c + G s )2 + (B c + B s )2 ] R c + (G s2 + B s2 ) R u NF = 1 + Gs (2.28) It can be seen from this equation that NF is dependent on the equivalentsource impedance. Equation (2.28) can be used not only to determine the noise figure, butalso to determine the source loading conditions that will minimize the noisefigure. Differentiating with respect to G s and B s and setting the derivative tozero yields the following two conditions for minimum noise (G opt and B opt )after several pages of math: √ ͩ ͪ ͩ ͪ 2 2 R c Bc R c Bc Gu + R u + G c2 R c + B c − Rc G opt = Rc + Ru Rc + Ru Rc + Ru (2.29) −R c B c B opt = (2.30) Rc + Ru2.2.6 The Noise Figure of Components in SeriesFor components in series, as shown in Figure 2.3, one can calculate the totaloutput noise (N o (total) ) and output noise due to the source (N o (source) ) todetermine the noise figure. The output signal S o is given by So = Si и Gi и G2 и G3 (2.31)Figure 2.3 Noise figure in cascaded circuits with gain and noise added shown in each.
  35. 35. Issues in RFIC Design, Noise, Linearity, and Filtering 17 The input noise is N i (source) = kT (2.32) The total output noise is N o (total) = N i (source) G 1 G 2 G 3 + N o1(added) G 2 G 3 + N o2(added) G 3 + N o3(added) (2.33) The output noise due to the source is N o (source) = N i (source) G 1 G 2 G 3 (2.34) Finally, the noise factor can be determined as N o (total) N o1(added) N o2(added) N o3(added) F= =1+ + + N o (source) N i (source) G 1 N i (source) G 1 G 2 N i (source) G 1 G 2 G 3 F2 − 1 F3 − 1 = F1 + + (2.35) G1 G1 G2 The above formula shows how the presence of gain preceding a stagecauses the effective noise figure to be reduced compared to the measured noisefigure of a stage by itself. For this reason, we typically design systems with alow-noise amplifier at the front of the system. We note that the noise figureof each block is typically determined for the case in which a standard inputsource (e.g., 50⍀) is connected. The above formula can also be used to derivean equivalent model of each block as shown in Figure 2.4. If the input noisewhen measuring noise figure is N i (source) = kT (2.36)and noting from manipulation of (2.14) thatFigure 2.4 Equivalent noise model of a circuit.
  36. 36. 18 Radio Frequency Integrated Circuit Design N o1(added) = (F − 1) N o (source) (2.37) Now dividing both sides of (2.37) by G 1 , N o (source) N i (added) = (F − 1) = (F − 1) N i (source) = (F − 1) kT (2.38) G1 Then the total input-referred noise to the first stage is N i 1 = N i (source) + (F 1 − 1) kT = kT + (F 1 − 1) kT = kTF 1 (2.39) Thus, the input-referred noise model for cascaded stages as shown inFigure 2.4 can be derived.Example 2.1 Noise CalculationsFigure 2.5 shows a 50-⍀ source resistance loaded with 50⍀. Determine howmuch noise voltage per unit bandwidth is present at the output. Then, for anyR L , what is the maximum noise power that this source can deliver to any load?Also find the noise factor, assuming that R L does not contribute to noise factor,and compare to the case where R L does contribute to noise factor.SolutionThe noise from the 50⍀ source is √4kTR ≈ 0.9 nV/√Hz at a temperature of290K, which, after the voltage divider, becomes one half of this value, orv o = 0.45 nV/√Hz . Now, for maximum power transfer, the load must remain matched, soR L = R S = 50⍀. Then the complete available power from the source is deliveredto the load. In this case, 2 vo Po = = P in(available) 4R LFigure 2.5 Simple circuit used for noise calculations.
  37. 37. Issues in RFIC Design, Noise, Linearity, and Filtering 19 2 vo 4kTR S P in(available) = = = kT = 4 × 10−21 4R L 4R L At the output, the complete noise power (available) appears, and so if R Lis noiseless, the noise factor = 1. However, if R L has noise of√4kTR L V/√Hz , then at the output, the total noise power is 2kT, where kTis from R S and kT is from R L . Therefore, for a resistively matched circuit, thenoise figure is 3 dB. Note that the output noise voltage is0.45 nV/√Hz from each resistor for a total of √2 и 0.45 nV/√Hz =0.636 nV/√Hz (with noise the power adds because the noise voltage is uncorre-lated).Example 2.2 Noise Calculation with Gain StagesIn this example, Figure 2.6, a voltage gain of 20 has been added to the originalcircuit of Figure 2.5. All resistor values are still 50⍀. Determine the noise atthe output of the circuit due to all resistors and then determine the circuit noisefigure and signal-to-noise ratio assuming a 1-MHz bandwidth and the input isa 1-V sine wave.SolutionIn this example, at v x the noise is still due to only R S and R 2 . As before, thenoise at this point is 0.636 nV/√Hz . The signal at this point is 0.5V, thus atpoint v y the signal is 10V and the noise due to the two input resistors R S andR 2 is 0.636 и 20 = 12.72 nV/√Hz . At the output, the signal and noise fromthe input sources, as well as the noise from the two output resistors, all see avoltage divider. Thus, one can calculate the individual components. For thecombination of R S and R 2 , one obtains vR = 0.5 × 12.72 = 6.36 nV/√Hz S +R2 The noise from the source can be determined from this equation:Figure 2.6 Noise calculation with a gain stage.
  38. 38. 20 Radio Frequency Integrated Circuit Design 6.36 nV/√Hz vR = = 4.5 nV/√Hz S √2 For the other resistors, the voltage is v R = 0.5 и 0.9 = 0.45 nV/√Hz S v R = 0.5 и 0.9 = 0.45 nV/√Hz L Total output noise is given by √v (R + R √ 6.36 2 2 2 2 v no(total) = + vR + vR = + 0.452 + 0.452 S L) S L = 6.392 nV/√Hz Therefore, the noise figure can now be determined: ͩ ͪ 2 N 6.392 Noise factor = F = o (total) = = (1.417)2 = 2.018 N o (source) 4.5 NF = 10 log 10 F = 10 log 10 2.018 = 3.05 dB Since the output voltage also sees a voltage divider of 1/2, it has a valueof 5V. Thus, the signal-to-noise ratio is ΂ ΃ S 5 = 20 log = 117.9 dB N 6.392 nV и √1 MHz √Hz This example illustrates that noise from the source and amplifier inputresistance are the dominant noise sources in the circuit. Each resistor at theinput provides 4.5 nV/√Hz , while the two resistors behind the amplifier eachonly contribute 0.45 nV/√Hz . Thus, as explained earlier, after a gain stage,noise is less important.Example 2.3 Effect of Impedance Mismatch on Noise FigureFind the noise figure of Example 2.2 again, but now assume that R 2 = 500⍀.SolutionAs before, the output noise due to the resistors is as follows: 500 v no(R S ) = 0.9 и и 20 и 0.5 = 8.181 nV/√Hz 550
  39. 39. Issues in RFIC Design, Noise, Linearity, and Filtering 21where 500/550 accounts for the voltage division from the noise source to thenode v x . 50 v no(R 2 ) = 0.9 и √10 и 550 и 20 и 0.5 = 2.587 nV/√Hzwhere the √10 accounts for the higher noise in a 500-⍀ resistor compared toa 50-⍀ resistor. v no(R 3 ) = 0.9 и 0.5 = 0.45 nV/√Hz v no(R L ) = 0.9 и 0.5 = 0.45 nV/√Hz The total output noise voltage is v no(total) = √ v R + v R + v R + v R = √ 8.1812 + 2.5872 + 0.452 + 0.452 2 2 2 2 S 2 3 L = 8.604 nV/√Hz ͩ ͪ 2 N o (total) 8.604 Noise factor = F = = = 1.106 N o (source) 8.181 NF = 10 log 10 F = 10 log 10 1.106 = 0.438 dB Note: This circuit is unmatched at the input. This example illustrates thata mismatched circuit may have better noise performance than a matched one.However, this assumes that it is possible to build a voltage amplifier that requireslittle power at the input. This may be possible on an IC. However, if transmissionlines are included, power transfer will suffer. A matching circuit may need tobe added.Example 2.4 Cascaded Noise Figure and Sensitivity CalculationFind the effective noise figure and noise floor of the system shown in Figure2.7. The system consists of a filter with 3-dB loss, followed by a switch with1-dB loss, an LNA, and a mixer. Assume the system needs an SNR of 7 dBfor a bit error rate of 10−3. Also assume that the system bandwidth is 200 kHz.SolutionSince the bandwidth of the system has been given as 200 kHz, the noise floorof the system can be determined:
  40. 40. 22 Radio Frequency Integrated Circuit DesignFigure 2.7 System for performance calculation. Noise floor = −174 dBm + 10 log 10 (200,000) = −121 dBm We make use of the cascaded noise figure equation and determine thatthe overall system noise figure is given by NF TOTAL = 3 dB + 1 dB + 10 log 10 1.78 + ͫ 15.84 − 1 20 ͬ ≈ 8 dB Note that the LNA noise figure of 2.5 dB corresponds to a noise factorof 1.78 and the gain of 13 dB corresponds to a power gain of 20. Furthermore,the noise figure of 12 dB corresponds to a noise factor of 15.84. Note that if the mixer also has gain, then possibly the noise due to theIF stage may be ignored. In a real system this would have to be checked, buthere we will ignore noise in the IF stage. Since it was stated that the system requires an SNR of 7 dB, the sensitivityof the system can now be determined: Sensitivity = −121 dBm + 7 dB + 8 dB = −106 dBm Thus, the smallest allowable input signal is −106 dBm. If this is notadequate for a given application, then a number of things can be done toimprove this: 1. A smaller bandwidth could be used. This is usually fixed by IF require- ments. 2. The loss in the preselect filter or switch could be reduced. For example, the LNA could be placed in front of one or both of these components. 3. The noise figure of the LNA could be improved. 4. The LNA gain could be increased reducing the effect of the mixer on the system NF. 5. A lower NF in the mixer would also improve the system NF. 6. If a lower SNR for the required BER could be tolerated, then this would also help.
  41. 41. Issues in RFIC Design, Noise, Linearity, and Filtering 232.3 Linearity and Distortion in RF CircuitsIn an ideal system, the output is linearly related to the input. However, in anyreal device the transfer function is usually a lot more complicated. This can bedue to active or passive devices in the circuit or the signal swing being limitedby the power supply rails. Unavoidably, the gain curve for any component isnever a perfectly straight line, as illustrated in Figure 2.8. The resulting waveforms can appear as shown in Figure 2.9. For amplifiersaturation, typically the top and bottom portions of the waveform are clippedequally, as shown in Figure 2.9(b). However, if the circuit is not biased betweenthe two clipping levels, then clipping can be nonsymmetrical as shown in Figure2.9(c).2.3.1 Power Series ExpansionMathematically, any nonlinear transfer function can be written as a series expan-sion of power terms unless the system contains memory, in which case a Volterraseries is required [9, 10]: 2 3 v out = k 0 + k 1 v in + k 2 v in + k 3 v in + . . . (2.40) To describe the nonlinearity perfectly, an infinite number of terms isrequired; however, in many practical circuits, the first three terms are sufficientto characterize the circuit with a fair degree of accuracy.Figure 2.8 Illustration of the nonlinearity in (a) a diode, and (b) an amplifier.
  42. 42. 24 Radio Frequency Integrated Circuit DesignFigure 2.9 Distorted output waveforms: (a) input; (b) output, clipping; and (c) output, bias wrong. Symmetrical saturation as shown in Figure 2.8(b) can be modeled withodd order terms; for example, 1 3 y=x− x (2.41) 10looks like Figure 2.10. In another example, an exponential nonlinearity as shownin Figure 2.8(a) has the form x2 x3 x+ + +... (2.42) 2! 3!which contains both even and odd power terms because it does not havesymmetry about the y -axis. Real circuits will have more complex power seriesexpansions. One common way of characterizing the linearity of a circuit is called thetwo-tone test. In this test, an input consisting of two sine waves is applied tothe circuit.Figure 2.10 Example of output or input nonlinearity with first- and third-order terms.
  43. 43. Issues in RFIC Design, Noise, Linearity, and Filtering 25 v in = v 1 cos ␻ 1 t + v 2 cos ␻ 2 t = X 1 + X 2 (2.43) When this tone is applied to the transfer function given in (2.40), theresult is a number of terms: v 0 = k 0 + k 1 (X 1 + X 2 ) + k 2 (X 1 + X 2 )2 + k 3 (X 1 + X 2 )3 (2.44) Ά Ά Ά desired second order third order 2 2 v 0 = k 0 + k 1 (X 1 + X 2 ) + k 2 (X 1 + 2X 1 X 2 + X 2 ) (2.45) 3 2 2 3 + k 3 (X 1 + 3X 1 X 2 + 3X 1 X 2 + X 1 ) These terms can be further broken down into various frequency compo- 2nents. For instance, the X 1 term has a zero frequency (dc) component andanother at the second harmonic of the input: 2 v1 X 1 = (v 1 cos ␻ 1 t )2 = 2 (1 + cos 2␻ 1 t ) (2.46) 2 The second-order terms can be expanded as follows: (X 1 + X 2 )2 = 2 X1 + 2X 1 X 2 + 2 X2 (2.47) Ά Ά Ά dc + MIX dc + HD2 HD2where second-order terms are composed of second harmonics HD2, and mixingcomponents, here labeled MIX but sometimes labeled IM2 for second-orderintermodulation. The mixing components will appear at the sum and differencefrequencies of the two input signals. Note also that second-order terms causean additional dc term to appear. The third-order terms can be expanded as follows: (X 1 + X 2 )3 = 3 X1 2 2 + 3X 1 X 2 + 3X 1 X 2 + 3 X2 (2.48) Ά Ά Ά Ά FUND IM3 + IM3 + FUND + HD3 FUND FUND + HD3 Third-order nonlinearity results in third harmonics HD3 and third-orderintermodulation IM3. Expansion of both the HD3 and IM3 terms showsoutput signals appearing at the input frequencies. The effect is that third-ordernonlinearity can change the gain, which is seen as gain compression. This issummarized in Table 2.1.
  44. 44. 26 Radio Frequency Integrated Circuit Design Table 2.1 Summary of Distortion Components Frequency Component Amplitude k2 2 2 dc ko + (v + v 2 ) 2 1 ␻1 ͩ 3 2 3 2 k 1v 1 + k 3v 1 v 1 + v 2 4 2 ͪ ␻2 2 ͩ 3 2 3 2 k 1v 2 + k 3v 2 v 2 + v 1 4 2 ͪ 2␻ 1 k 2v 1 2 2 2␻ 2 k 2 v2 2 ␻1 ± ␻2 k 2v 1v 2 ␻2 ± ␻1 k 2v 1v 2 3 3␻ 1 k 3v 1 4 3 3␻ 2 k 3v 2 4 3 2 2␻ 1 ± ␻ 2 k 3v 1 v 2 4 3 2␻ 2 ± ␻ 1 k v v2 4 3 1 2 Note that in the case of an amplifier, only the terms at the input frequencyare desired. Of all the unwanted terms, the last two at frequencies 2␻ 1 − ␻ 2and 2␻ 2 − ␻ 1 are the most troublesome, since they can fall in the band of thedesired outputs if ␻ 1 is close in frequency to ␻ 2 and therefore cannot be easilyfiltered out. These two tones are usually referred to as third-order intermodula-tion terms (IM3 products).Example 2.5 Determination of Frequency Components Generated in a NonlinearSystemConsider a nonlinear circuit with 7- and 8-MHz tones applied at the input.Determine all output frequency components, assuming distortion componentsup to the third order.SolutionTable 2.2 and Figure 2.11 show the outputs. It is apparent that harmonics can be filtered out easily, while the third-order intermodulation terms, being close to the desired tones, may be difficultto filter.
  45. 45. Issues in RFIC Design, Noise, Linearity, and Filtering 27 Table 2.2 Outputs from Nonlinear Circuits with Inputs at f 1 = 7, f 2 = 8 MHz Symbolic Example Frequency Frequency Name Comment First order f 1, f 2 7, 8 Fundamental Desired output Second order 2f 1 , 2f 2 14, 16 HD2 (harmonics) Can filter f 2 − f 1, f 2 + f 1 2, 15 IM2 (mixing) Can filter Third order 3f 1 , 3f 2 21, 24 HD3 (harmonic) Can filter harmonics 2f 1 − f 2 , 6 IM3 (intermod) Close to fundamental, 2f 2 − f 1 9 IM3 (intermod) difficult to filterFigure 2.11 Output spectrum with inputs at 7 and 8 MHz.2.3.2 Third-Order Intercept PointOne of the most common ways to test the linearity of a circuit is to apply twosignals at the input, having equal amplitude and offset by some frequency, andplot fundamental output and intermodulation output power as a function ofinput power as shown in Figure 2.12. From the plot, the third-order interceptpoint (IP3) is determined. The third-order intercept point is a theoretical pointwhere the amplitudes of the intermodulation tones at 2␻ 1 − ␻ 2 and 2␻ 2 −␻ 1 are equal to the amplitudes of the fundamental tones at ␻ 1 and ␻ 2 . From Table 2.1, if v 1 = v 2 = v i , then the fundamental is given by 9 fund = k 1 v i + k v3 (2.49) 4 3 i The linear component of (2.49) given by fund = k 1 v i (2.50)can be compared to the third-order intermodulation term given by
  46. 46. 28 Radio Frequency Integrated Circuit DesignFigure 2.12 Plot of input output power of fundamental and IM3 versus input power. 3 IM3 = k v3 (2.51) 4 3 i Note that for small v i , the fundamental rises linearly (20 dB/decade) andthat the IM3 terms rise as the cube of the input (60 dB/decade). A theoreticalvoltage at which these two tones will be equal can be defined: 3 k v3 4 3 IP3 =1 (2.52) k 1 v IP3 This can be solved for v IP3 : √ k1 v IP3 = 2 (2.53) 3k 3 Note that (2.53) gives the input voltage at the third-order intercept point.The input power at this point is called the input third-order intercept point(IIP3). If IP3 is specified at the output, it is called the output third-order interceptpoint (OIP3).
  47. 47. Issues in RFIC Design, Noise, Linearity, and Filtering 29 Of course, the third-order intercept point cannot actually be measureddirectly, since by the time the amplifier reached this point, it would be heavilyoverloaded. Therefore, it is useful to describe a quick way to extrapolate it ata given power level. Assume that a device with power gain G has been measuredto have an output power of P 1 at the fundamental frequency and a power ofP 3 at the IM3 frequency for a given input power of P i , as illustrated in Figure2.12. Now, on a log plot (for example, when power is in dBm) of P 3 and P 1versus P i , the IM3 terms have a slope of 3 and the fundamental terms have aslope of 1. Therefore, OIP3 − P 1 =1 (2.54) IIP3 − P i OIP3 − P 3 =3 (2.55) IIP3 − P isince subtraction on a log scale amounts to division of power. Also note that G = OIP3 − IIP3 = P 1 − P i (2.56) These equations can be solved to give 1 1 IIP3 = P 1 + [P − P 3 ] − G = P i + [P 1 − P 3 ] (2.57) 2 1 22.3.3 Second-Order Intercept PointA second-order intercept point (IP2) can be defined that is similar to the third-order intercept point. Which one is used depends largely on which is moreimportant in the system of interest; for example, second-order distortion isparticularly important in direct downconversion receivers. If two tones are present at the input, then the second-order output isgiven by v IM2 = k 2 v i2 (2.58) Note that in this case, the IM2 terms rise at 40 dB/decade rather than at60 dB/decade, as in the case of the IM3 terms. The theoretical voltage at which the IM2 term will be equal to thefundamental term given in (2.50) can be defined:
  48. 48. 30 Radio Frequency Integrated Circuit Design 2 k 2 v IP2 =1 (2.59) k 1 v IP2This can be solved for v IP2 : k1 v IP2 = (2.60) k22.3.4 The 1-dB Compression PointIn addition to measuring the IP3 or IP2 of a circuit, the 1-dB compressionpoint is another common way to measure linearity. This point is more directlymeasurable than IP3 and requires only one tone rather than two (although anynumber of tones can be used). The 1-dB compression point is simply the powerlevel, specified at either the input or the output, where the output power is 1dB less than it would have been in an ideally linear device. It is also markedin Figure 2.12. We first note that at 1-dB compression, the ratio of the actual outputvoltage v o to the ideal output voltage v oi is 20 log 10 ͩ ͪ vo v oi = −1 dB (2.61)or vo = 0.89125 (2.62) v oi Now referring again to Table 2.1, we note that the actual output voltagefor a single tone is 3 vo = k 1vi + k v3 (2.63) 4 3 ifor an input voltage v i . The ideal output voltage is given by v oi = k 1 v i (2.64) Thus, the 1-dB compression point can be found by substituting (2.63)and (2.64) into (2.62):
  49. 49. Issues in RFIC Design, Noise, Linearity, and Filtering 31 3 k 1 v 1dB + k v3 4 3 1dB = 0.89125 (2.65) k 1 v 1dB Note that for a nonlinearity that causes compression, rather than one thatcauses expansion, k 3 has to be negative. Solving (2.65) for v 1dB gives √ k1 v 1dB = 0.38 (2.66) k3 If more than one tone is applied, the 1-dB compression point will occurfor a lower input voltage. In the case of two equal amplitude tones applied tothe system, the actual output power for one frequency is 9 vo = k 1vi + k v3 (2.67) 4 3 i The ideal output voltage is still given by (2.64). So now the ratio is 9 k 1 v 1dB + k v3 4 3 1dB = 0.89125 (2.68) k 1 v 1dB Therefore, the 1-dB compression voltage is now √ k1 v 1dB = 0.22 (2.69) k3 Thus, as more tones are added, this voltage will continue to get lower.2.3.5 Relationships Between 1-dB Compression and IP3 PointsIn the last two sections, formulas for the IP3 and the 1-dB compression pointhave been derived. Since we now have expressions for both these values, wecan find a relationship between these two points. Taking the ratio of (2.53)and (2.66) gives √ k1 2 v IP3 3k 3 = = 3.04 (2.70) √ v 1dB k1 0.38 k3
  50. 50. 32 Radio Frequency Integrated Circuit Design Thus, these voltages are related by a factor of 3.04, or about 9.66 dB,independent of the particulars of the nonlinearity in question. In the case ofthe 1-dB compression point with two tones applied, the ratio is larger. In thiscase, √ k1 v IP3 2 3k 3 = = 5.25 (2.71) √ v 1dB k1 0.22 k3 Thus, these voltages are related by a factor of 5.25 or about 14.4 dB. Thus, one can estimate that for a single tone, the compression point isabout 10 dB below the intercept point, while for two tones, the 1-dB compressionpoint is close to 15 dB below the intercept point. The difference between thesetwo numbers is just the factor of three (4.77 dB) resulting from the secondtone. Note that this analysis is valid for third-order nonlinearity. For strongernonlinearity (i.e., containing fifth-order terms), additional components are foundat the fundamental as well as at the intermodulation frequencies. Nevertheless,the above is a good estimate of performance.Example 2.6 Determining IIP3 and 1-dB Compression Point from MeasurementDataAn amplifier designed to operate at 2 GHz with a gain of 10 dB has two signalsof equal power applied at the input. One is at a frequency of 2.0 GHz andanother at a frequency of 2.01 GHz. At the output, four tones are observed at1.99, 2.0, 2.01, and 2.02 GHz. The power levels of the tones are −70, −20,−20, and −70 dBm, respectively. Determine the IIP3 and 1-dB compressionpoint for this amplifier.SolutionThe tones at 1.99 and 2.02 GHz are the IP3 tones. We can use (2.57) directlyto find the IIP3: 1 1 IIP3 = P 1 + [P 1 − P 3 ] − G = −20 + [−20 + 70] − 10 = −5 dBm 2 2 The 1-dB compression point for a signal tone is 9.66 dB lower than thisvalue, about −14.7 dBm at the input.2.3.6 Broadband Measures of LinearityIntercept and 1-dB compression points are two common measures of linearity,but they are by no means the only ones. Many others exist and, in fact, more

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