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Graduate Seminar - Deadlock Avoidance in FMS, June 2002




    Deadlock Avoidance Methods

in Flexible Manufacturing Systems

                 Jacob Rubinovitz
   Technion - Israel Institute of Technology
     Faculty of Industrial Engineering & Mgmt.




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

   Introduction: Flexible Manufacturing Systems
    An automatic, programmable manufacturing system
Volume
         Transfer
          Lines

              Dedicated                   CIM
               Systems
                          Flexible
                          Systems
                                     Automated
                                       Cells
                                                  Job
                                                 Shops

                                                           Variety
                                                    Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

 Introduction: Flexible Manufacturing Systems

Components of the System
•Programmable machines (CNC, Robots)
•Flexible tools and fixtures
• Flexible MH systems (AGV’s, Robots)
•Automated Storage and Retrieval System
•Computer control

                                              Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Introduction: Flexible Manufacturing Systems




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Introduction: Flexible Manufacturing Systems




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002



Deadlock-free operation is crucial
  to the operation of an FMS
Research of Deadlock Avoidance Methods:
• Evaluation of different policies.
• Integration of avoidance policies into the control
  software of Flexible Manufacturing Cells.
• A joint work with Jean-David Salama.

                                                Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Deadlock - background
  Parts in FMS compete for a finite number of
  resources (like robots, tools, pallets, fixtures, etc),
  and share buffers or queues having limited
  capacities.
 A deadlock state occurs when each process in a
 set of processes is blocked indefinitely from
 access to resources held by other processes
 within the set.
 A good FMS control method must resolve or avoid
 all the potential deadlocks during operation,
 without seriously degrading the system
 performance
                                               Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Necessary conditions for deadlocks
 Mutual exclusion: resources can be allocated to
 only one process at a time.
 No preemption: resources held by one process
 cannot be allocated to another process until they
 are released by the process holding them.
 Hold and wait: processes hold their resources
 when waiting for the next required resources.

 Circular wait: closed chain of processes, where
 each process waits for a resource held by the next
 process in the chain.


                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Part Flow Deadlock

 Machine M1                       Machine M2           P1: M1→M2
(No Buffer )                     (No Buffer )          P2: M2→M1
Part P1                               Part P2         M1        M2
               )‫ טובורובוט‬MHD(




                         M2                      M1
                                                                M2
   P1: M1→M2
               M1
   P2: M2→M3
   P3: M3→M1
                           M3        P1: M1→M2             M3
                                     P2: M2→M3
                                     P3: M3→M1



                                                       Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Methods for handling Deadlocks
  Detection/Recovery (Wysk et al., 1994)

Prevention – System design, such that
deadlocks are impossible
      (Epzeleta et al., 1995;Minoura and Ding, 1991;
      Viswanadham et al., 1990)
Avoidance – a control policy that
examines each request for resource
allocation prior to its execution
       (Banaszak and Krogh,1990; Ferrarini and Maroni,1998;
       Hsieh and Chang,1994; Lee and Lin, 1995; Revelotis
       and Ferreira,1996; Xing et al.,1996;Yim et al.,1990)
                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


   (Capacity-Designated Graph (CDG


                         Mi         Ni

                                            3
                   IBi

                  A machine and its CDG node.



Yim, D.S., Kim, J.I. and Woo, H.S. (1997) Avoidance of deadlocks
in flexible manufacturing systems using a capacity-designated
directed graph. International Journal of Production Research, 35
(9), 2459-2475.
                                                   Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


   (Capacity-Designated Graph (CDG

                                                           N2
  |N|=4,                              N1
  A12=A21=A24=A43=A32=A14=A41=1               2           2
  A42=A13=A31=A34=A23=0
                                       N4
  X={1,2,0,1}                                             N3
  C={2,2,1,3}                                  3         1
     Fully detailed CDG graph G=(N,A,X,C).

Yim, D.S., Kim, J.I. and Woo, H.S. (1997) Avoidance of deadlocks
in flexible manufacturing systems using a capacity-designated
directed graph. International Journal of Production Research, 35
(9), 2459-2475.
                                                   Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Loops in a Capacity-Designated Graph
                                          N2
                          N1
                        Cycle S1: N1→N2→N1
  N1             N2                                N3
                        Cycle S2: N1→N2→N4→N1
                        Cycle S3: N2→N4→N3→N2
  A4CDG G=(N,A) Cycle S : N →N →N
  N           N3
  containing 57 cycles. 4 1   4   1

                     Cycle S : N1→N →N3→N2→N1
   A CDG G=(N,A) containingN5 cycles. 4
                           5
                               5
                                                   N4

                      N
                               N!
        Smax =  [Σ    i =1   (N -i) !·i
                                          ] -N
                                               Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Loops in a Capacity-Designated Graph
                                        N2
                      N1
                                               N3


  A CDG G=(N,A)
  containing 57 cycles.
                           N5
                                              N4



 Routing Intensity Index
                            N       N

                           ΣΣA
                           i = 1 j =1,j = i
                                              ij
     RII =                                          ; 0<RII<1
                            N (N - )
                                 1
                                                      Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

 Necessary Condition for a Deadlock
There is a loop S i
such that :                      ΣX(N ) = ΣC(N )
                                Nj ∈ Sj
                                               j
                                                       Nj ∈ Sj
                                                                      j


 Macro         N1       N2    S1: N1→N2→N1

 Nodes                        S2: N2→N3→N2
                              S3: N1→N3→N1
                                                   MN1={N1,N2}
                                                   MN2={N2,N3}
                              S4: N1→N2→N3→N1      MN3={N1,N3}
               N3             S5: N1→N3→N2→N1      MN4={N1,N2,N3}

                    A CDG G=(N,A)
                    with 5 cycles and 4 macro nodes.

Deadlock
Avoidance Policy:            C(MNi ) < Σ C(Nj)-1
                                            Nj ∈ Si
                                                       Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


 Impending (Policy-Induced) Deadlocks
                                   N2
        MN1={N1,N2,N4,N5}   N1                      N3
         MN2={N2,N3,N4}
                                           1

           2 constraints:    1                           1
            X(MN1) ≤ 3
            X(MN2) ≤ 2       N5                 1
                                           N4
                                     1



In order to avoid the impending deadlocks,
CDG graph (cycle) reduction is needed

                                                Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


 Cycle reduction in a CDG graph
                                                                   Cycle Reduction Algorithm output
                          N2
             N1                                 N3            Macro Node elements Macro node capacity
Level 0                        1                              node
                 1
                                                1
                N5
                                                              MN1    {N1,N2,N4,N5}   C(MN1)=C(N1)+C(N2)
                          1        N4       1            G1                          +C(N4)+C(N5)-1=3
Level 1
                                   N
                                   N11          MN2 2
                                                 MN
          MN1        N3                                       MN2    {N2,N3,N4}      C(MN2)=C(N2)+C(N3)
                                   1                                                 +C(N4)-1=2
                                      1                   2
                                                          2
            3     1                  N5 5
                                                    11
  G2                          G3                                     {MN1,N3}=        C(MN3)=C(MN1)
                                                              MN3
                                                                     {N1,N2,N3,N4,N5} +C(N3)-1=3
       MN3                              MN4
                     Level 2

 G4         3                                   3        G5   MN4    {MN2,N1,N5}=     C(MN4)=C(MN2)
                                                                     {N1,N2,N3,N4,N5} +C(N1)+C(N5)-1=3



                                                                                      Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Objective- Deadlock Avoidance Policies
  To propose various control solutions for part flow
  regulation in FMCs, all structured around four
  different deadlock avoidance policies (DAPs).

  The DAPs will be          evaluated     by   their
  properties of:
   correctness,
   scalability,
   configurability,
   efficiency.




                                               Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


 DAP properties
   Correctness
   Guarantees always a deadlock-free operation

  Scalability
  Computational complexity for the control system
  is independent of the FMC complexity

  Configurability
  Can be applied to various FMC configurations

  Efficiency
  FMC operation is not restricted by policies that
  degrade its performance

                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002




The Deadlock Avoidance Method

  Request for movement        Compute the current number of parts in
  of a part to a node in a    each relevant macro node assuming that
    given CDG graph G           the requesting part was transported




                        Yes         Condition           No
            Allow the           X(RMNi)≤C(RMNi)               Refuse the
            movement            satisfied for all i ?          movement




                                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Part Flow Management
      Operation on part completed...           The robot completed a delivery...


Is the robot idle and is there some open
  space in the downstream station ?             Checking if the transfer of each
                                                   waiting part is unfeasible,
   No                        Yes                feasible but refused, or feasible
                                                          and accepted
   Transfer           Transfer feasible:
                                                                     2 or
  unfeasible:            DAP applied to                              more
Part waiting for      allow or refuse the                                     A part
                                                           Number
future transfer            transfer                                         selection
                                                        of accepted
                                                   0     transfers ?         rule is
           Transfer          Transfer                              1         used to
           refused:          allowed:       Parts requesting               pick a part
        Part waiting for   Part actually       movement        The requesting
        future transfer    moved by the      remain at their    part picked by
                               robot           locations.         the robot




                                                                  Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Four Different Deadlock Avoidance Policies

   Static (SDAP)                                          M1   M2
   Dynamic (DDAP)
     FIFO Loading Discipline                                   M3
     applied to parts in the                   Entry Buffer
     Input Buffer
  Selective Static (SSDAP)
  Selective Dynamic (SDDAP)              Step-by-step
                                                          M1   M2

    Selection from all the              backward search


    different part types waiting                               M3

    in the input buffer                        Entry Buffer




                                                   Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002
Static Strategy
   Off-line                                        Movement of a waiting
                                        On-line
    Create a CDG from the static                       part feasible
 information on machines, machine
  capacities and complete part type     Determine the resulting number of parts
               routes                    in each relevant macro node X(RMN)

 Compute the relevant macro nodes
 RMNs and their capacities C(RMNs)                    Apply the deadlock
                                                      avoidance method


Dynamic Strategy
               On-line        Movement of a waiting part feasible

       Create a CDG considering remaining machine sequences of each part
             in the system, and assuming that the requesting part was
                                   transported.
                                            Determine the current number of parts
        Compute the relevant macro
                                             in each relevant macro node X(RMN)
          nodes RMNs and their
                                            assuming that the requesting part was
           capacities C(RMNs).
                                                          transported.
                                 Apply the deadlock
                                 avoidance method

                                                                    Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002
                                            R1 : M1→M2→M3                                                                               M1                              M2                                  M3
Illustrative                                R2 : M3→M2→M1
                                            |N|=3
Example                                     A12=A23=A21=A32=1                                                     Entry Buffer
                                            C={1,1,1}
                                       Gantt chart, schedule under a static strategy - SDAP or SSDAP
         M1
         M2
         M3
               1       1       1        1       1       1       1        1       1       1       1       1        1        1        1        1        1        1        1        1        1        1        1        1
        WIP
                   1       2       3        4       5       6        7       8       9   10      11      12       13       14       15       16       17       18       19       20        21      22       23       24
        Time
                                                                Gantt chart, schedule under a dynamic strategy - DDAP
                   M1
                   M2
                   M3
                               1        2       3       2        1       1       2       2       1       1        1        1        1        2        2        1        1        1         1       1        1        1        1        1
                   WIP
                                   1        2       3       4        5       6       7       8       9       10       11       12       13       14       15       16       17       18       19       20       21       22       23       24
               Time
                                                                             Gantt chart, schedule under a dynamic strategy - SDDAP
                                   M1
                                   M2
                                   M3
                                                1       2        3       3       2       1       2       2        3        3        2        1        1        2        2        1        1        1        1        1        1        1        1    1
                               WIP
                                                    1       2        3       4       5       6       7       8        9        10       11       12       13       14       15       16       17       18       19       20   21       22       23   24
                               Time



                                                                                                                                                                                          Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Experimental Setup
 CENTRAL                                                                         STATION 2                   # Processed Parts
 WAREHOUSE                         Initial
                                   State                                                                               0
                                                                                                            EXIT STATION

                                                                            0
  0
                                                                                  STARVED
                                                STATION 1                                                     STATION 3

                                                                                          CENTRAL
                                                                                          BUFFER

                                                                     IDLE                                     STARVED
                                         0      STARVED                                                 0
                                                                                      0
                 0                                                                                          STATION 4

                                                                            STATION 5
                                                                            INSPECTION


          ENTRY STATION                      # Parts in System
                                                                                                    0
                     Replication
                     Number
                                                        0                                                    STARVED
  Current Time                                                   0          STARVED
  08:00:00                   0

                                                                                                        Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


System Structure
   BP    Static Deadlock           Dynamic Deadlock       External
         Avoidance Module          Avoidance Module        Module
   SBP   SDAP SSDAP                DDAP SDDAP

                                                           Deadlock
                  Cycle Reduction Algorithm
                                                           Detection
                                                            Module
   Part Flow                                              Cycle Search
 Control Module     Part Selection Rules Module
                                                           Algorithm
                     PSR1   PSR2    PSR3   PSR4




                                   FMC Simulation Model
                                         (Arena)



                                                            Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Experimental Design
Four Different Deadlock Avoidance Policies
                                                  M1        M2
     Static (SDAP)
     Dynamic (DDAP)                                         M3

                                       Entry Buffer

FIFO Loading Discipline applied to parts in the Input Buffer

                                                            M1    M2
     Selective Static (SSDAP)               Step-by-step
                                          backward search


                                                                  M3
    Selective Dynamic (SDDAP)
                                                Entry Buffer

 Selection from all the different part types waiting in the
 input buffer

                                                      Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

 Experimental Design – 2 cell types
   part types machines, 4 : Cell A 3
   part types machines, 5 : Cell B 6
Buffer Capacities
              Cell A                      Cell B
 1    C(CB)=0, C(IB)={0}, CBS=4   C(CB)=0, C(IB)={0}, CBS=5

 2    C(CB)=4, C(IB)={0}, CBS=8   C(CB)=5, C(IB)={0}, CBS=10

 3    C(CB)=0, C(IB)={1}, CBS=8   C(CB)=0, C(IB)={1}, CBS=10

 4   C(CB)=4, C(IB)={1}, CBS=12   C(CB)=5, C(IB)={1}, CBS=15

 5   C(CB)=0, C(IB)={2}, CBS=12   C(CB)=0, C(IB)={2}, CBS=15

                                                Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Experimental Design
(Part Selection Rules (PSR
   PSR1 – priority to parts with minimum
   remaining processes
   PSR2 – priority to parts with
   maximum remaining processes
  PSR3 – priority based on part type
   PSR4 – priority based on resource
   (machine) type

                                              Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Experimental Design
RII – Routing Intensity Index

                       High RII           Low RII
      Cell A            RII = 1          RII = 2/3
      Cell B           RII = 0.9         RII = 0.6




                                              Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Experimental Design
   High Routing Intensity                    Low Routing Intensity
R1: M4→ M2→ M1→ M4→ M3→ M1                   R1: M1→ M2→ M4→ M3                   Cell
R2: M1→ M2→ M3→ M4                           R2: M4→ M1→ M3→ M2
R3: M3→ M2→ M4→ M1→ M3
                        N     1        N2
                                             R3: M3→ M4→ M2       N1        N2     A
                          N4           N3                         N4        N3

R1: M1→ M5→ M3→ M4→ M2                       R1: M1→ M2→ M3→ M4                   Cell
R2: M2→ M3→ M1                               R2: M2→ M1→ M4
R3: M4→ M5→ M2→ M4                           R3: M4→ M5→ M1
                                                                                   B
R4: M1→ M4→ M3→ M5                           R4: M5→ M4→ M2→ M1
R5: M5→ M4→ M3→ M2→ M1            N2         R5: M3→ M4→ M1            N2
                         N1                                   N
R6: M4→ M1→ M2→ M5
                                                                  1
                                        N3   R6: M4→ M3→ M1                  N3

                         N5                                    N5           N4
                                       N4




                                                            Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Experimental Design – Product Mix
    Unbalanced mix             Balanced mix
         P1=0.65               P1=P2=P3=0.333             Cell
         P2=0.25                                           A
         P3=0.10
         P1=0.55         P1=P2=P3=P4=P5=P6= 0. 1666       Cell
         P2=0.20                                           B
         P3=0.10
          P4=0.5
          P5=0.5
          P6=0.5

         4 * 2 * 5 * 2 * 2 = 160
                                                Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Results : C(CB)=0, C(IB)={0}




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Results : C(CB)=M, C(IB)={0}




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Results : C(CB)=0, C(IB)={1}




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Results : SDDAP performance for different buffer sizes




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Results : SDDAP performance for different buffer sizes




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002

Results : SDDAP performance for different buffer sizes




. #Config      Cell A             Cell B
   1        [87.8%,67.3%]      [79.4%,69.7%]
   2        [90.6%,82.3%]      [92.4%,78.9%]
   3        [92.4%,84.1%]      [98.5%,80.9%]
   4        [99.5%,92.2%]      [98.7%,88.3%]
   5        [96.2%,82.4%]      [99.8%,81.8%]

                                               Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002



Incorporating a Central Buffer

 Operation on a part completed: if the transfer
 is unfeasible or refused by the DAP, the part is
 moved to the central buffer CB, provided that
 there is some open space in it .

 The robot completed a delivery: the control
 system checks first all the parts currently in the CB.
 Priority is given to these parts in order to reduce
 the amount of average WIP in the CB.



                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Conclusions - Efficiency:
 The static policies are inefficient and generate low
 throughput rates in single capacity cells (SCCs(, even after
 incorporating a central buffer. For this system configuration,
 SDDAP is the most appropriate operating policy.
 The DAPs have similar performance for double capacity cells
 (DCCs( with no central buffer; Throughput is slightly higher
 with SDDAP. The use of SDDAP is recommended for a high
 routing intensity level.
 High throughput rate is achieved for manufacturing cells of |
 M| machines with attached input buffers of single capacity
 and a |M| capacity central buffer.
 The superiority in terms of throughput of a selective policy
 (such as SSDAP or SDDAP( over a standard one (like
 SDAP or DDAP( is, as expected, more apparent when the
 part mix is balanced.
                                                      Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


  Conclusions - Computational Complexity

   The computational complexity becomes higher in the
   following order of DAPs application: SDAP, SSDAP, DDAP,
   and SDDAP.

   SDDAP is computationally more intensive when applied
   respectively to Single, Double and Triple Capacity Cells.

   As a result, a static strategy may represent the best
   alternative for operating a system including machines with
   buffers of capacity two or more. Under such conditions, a
   static policy is not less efficient than a dynamic one,
   generates less WIP, and is computationally much less
   complex.


                                                   Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002


Potential Implementation: Cluster Tools
                  NEXUS 600
                  Six-port cluster tool that will
                  accommodate four process
                  modules and dual load-locks
                  and integrated wafer handler.
  NEXUS 600


                  NEXUS 800
                  Eight-port cluster tool that
                  will accommodate six process
                  modules and dual load-locks
                  and integrated wafer handler.
  NEXUS 800



                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002



Questions?




                                             Dr. Jacob Rubinovitz
Graduate Seminar - Deadlock Avoidance in FMS, June 2002
Results : Part Selection Rules




                                             Dr. Jacob Rubinovitz

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Deadlock avoid

  • 1. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Deadlock Avoidance Methods in Flexible Manufacturing Systems Jacob Rubinovitz Technion - Israel Institute of Technology Faculty of Industrial Engineering & Mgmt. Dr. Jacob Rubinovitz
  • 2. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Introduction: Flexible Manufacturing Systems An automatic, programmable manufacturing system Volume Transfer Lines Dedicated CIM Systems Flexible Systems Automated Cells Job Shops Variety Dr. Jacob Rubinovitz
  • 3. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Introduction: Flexible Manufacturing Systems Components of the System •Programmable machines (CNC, Robots) •Flexible tools and fixtures • Flexible MH systems (AGV’s, Robots) •Automated Storage and Retrieval System •Computer control Dr. Jacob Rubinovitz
  • 4. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Introduction: Flexible Manufacturing Systems Dr. Jacob Rubinovitz
  • 5. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Introduction: Flexible Manufacturing Systems Dr. Jacob Rubinovitz
  • 6. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Deadlock-free operation is crucial to the operation of an FMS Research of Deadlock Avoidance Methods: • Evaluation of different policies. • Integration of avoidance policies into the control software of Flexible Manufacturing Cells. • A joint work with Jean-David Salama. Dr. Jacob Rubinovitz
  • 7. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Deadlock - background Parts in FMS compete for a finite number of resources (like robots, tools, pallets, fixtures, etc), and share buffers or queues having limited capacities. A deadlock state occurs when each process in a set of processes is blocked indefinitely from access to resources held by other processes within the set. A good FMS control method must resolve or avoid all the potential deadlocks during operation, without seriously degrading the system performance Dr. Jacob Rubinovitz
  • 8. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Necessary conditions for deadlocks Mutual exclusion: resources can be allocated to only one process at a time. No preemption: resources held by one process cannot be allocated to another process until they are released by the process holding them. Hold and wait: processes hold their resources when waiting for the next required resources. Circular wait: closed chain of processes, where each process waits for a resource held by the next process in the chain. Dr. Jacob Rubinovitz
  • 9. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Part Flow Deadlock Machine M1 Machine M2 P1: M1→M2 (No Buffer ) (No Buffer ) P2: M2→M1 Part P1 Part P2 M1 M2 )‫ טובורובוט‬MHD( M2 M1 M2 P1: M1→M2 M1 P2: M2→M3 P3: M3→M1 M3 P1: M1→M2 M3 P2: M2→M3 P3: M3→M1 Dr. Jacob Rubinovitz
  • 10. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Methods for handling Deadlocks Detection/Recovery (Wysk et al., 1994) Prevention – System design, such that deadlocks are impossible (Epzeleta et al., 1995;Minoura and Ding, 1991; Viswanadham et al., 1990) Avoidance – a control policy that examines each request for resource allocation prior to its execution (Banaszak and Krogh,1990; Ferrarini and Maroni,1998; Hsieh and Chang,1994; Lee and Lin, 1995; Revelotis and Ferreira,1996; Xing et al.,1996;Yim et al.,1990) Dr. Jacob Rubinovitz
  • 11. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 (Capacity-Designated Graph (CDG Mi Ni 3 IBi A machine and its CDG node. Yim, D.S., Kim, J.I. and Woo, H.S. (1997) Avoidance of deadlocks in flexible manufacturing systems using a capacity-designated directed graph. International Journal of Production Research, 35 (9), 2459-2475. Dr. Jacob Rubinovitz
  • 12. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 (Capacity-Designated Graph (CDG N2 |N|=4, N1 A12=A21=A24=A43=A32=A14=A41=1 2 2 A42=A13=A31=A34=A23=0 N4 X={1,2,0,1} N3 C={2,2,1,3} 3 1 Fully detailed CDG graph G=(N,A,X,C). Yim, D.S., Kim, J.I. and Woo, H.S. (1997) Avoidance of deadlocks in flexible manufacturing systems using a capacity-designated directed graph. International Journal of Production Research, 35 (9), 2459-2475. Dr. Jacob Rubinovitz
  • 13. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Loops in a Capacity-Designated Graph N2 N1 Cycle S1: N1→N2→N1 N1 N2 N3 Cycle S2: N1→N2→N4→N1 Cycle S3: N2→N4→N3→N2 A4CDG G=(N,A) Cycle S : N →N →N N N3 containing 57 cycles. 4 1 4 1 Cycle S : N1→N →N3→N2→N1 A CDG G=(N,A) containingN5 cycles. 4 5 5 N4 N N! Smax = [Σ i =1 (N -i) !·i ] -N Dr. Jacob Rubinovitz
  • 14. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Loops in a Capacity-Designated Graph N2 N1 N3 A CDG G=(N,A) containing 57 cycles. N5 N4 Routing Intensity Index N N ΣΣA i = 1 j =1,j = i ij RII = ; 0<RII<1 N (N - ) 1 Dr. Jacob Rubinovitz
  • 15. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Necessary Condition for a Deadlock There is a loop S i such that : ΣX(N ) = ΣC(N ) Nj ∈ Sj j Nj ∈ Sj j Macro N1 N2 S1: N1→N2→N1 Nodes S2: N2→N3→N2 S3: N1→N3→N1 MN1={N1,N2} MN2={N2,N3} S4: N1→N2→N3→N1 MN3={N1,N3} N3 S5: N1→N3→N2→N1 MN4={N1,N2,N3} A CDG G=(N,A) with 5 cycles and 4 macro nodes. Deadlock Avoidance Policy: C(MNi ) < Σ C(Nj)-1 Nj ∈ Si Dr. Jacob Rubinovitz
  • 16. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Impending (Policy-Induced) Deadlocks N2 MN1={N1,N2,N4,N5} N1 N3 MN2={N2,N3,N4} 1 2 constraints: 1 1 X(MN1) ≤ 3 X(MN2) ≤ 2 N5 1 N4 1 In order to avoid the impending deadlocks, CDG graph (cycle) reduction is needed Dr. Jacob Rubinovitz
  • 17. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Cycle reduction in a CDG graph Cycle Reduction Algorithm output N2 N1 N3 Macro Node elements Macro node capacity Level 0 1 node 1 1 N5 MN1 {N1,N2,N4,N5} C(MN1)=C(N1)+C(N2) 1 N4 1 G1 +C(N4)+C(N5)-1=3 Level 1 N N11 MN2 2 MN MN1 N3 MN2 {N2,N3,N4} C(MN2)=C(N2)+C(N3) 1 +C(N4)-1=2 1 2 2 3 1 N5 5 11 G2 G3 {MN1,N3}= C(MN3)=C(MN1) MN3 {N1,N2,N3,N4,N5} +C(N3)-1=3 MN3 MN4 Level 2 G4 3 3 G5 MN4 {MN2,N1,N5}= C(MN4)=C(MN2) {N1,N2,N3,N4,N5} +C(N1)+C(N5)-1=3 Dr. Jacob Rubinovitz
  • 18. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Objective- Deadlock Avoidance Policies To propose various control solutions for part flow regulation in FMCs, all structured around four different deadlock avoidance policies (DAPs). The DAPs will be evaluated by their properties of:  correctness,  scalability,  configurability,  efficiency. Dr. Jacob Rubinovitz
  • 19. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 DAP properties Correctness Guarantees always a deadlock-free operation Scalability Computational complexity for the control system is independent of the FMC complexity Configurability Can be applied to various FMC configurations Efficiency FMC operation is not restricted by policies that degrade its performance Dr. Jacob Rubinovitz
  • 20. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 The Deadlock Avoidance Method Request for movement Compute the current number of parts in of a part to a node in a each relevant macro node assuming that given CDG graph G the requesting part was transported Yes Condition No Allow the X(RMNi)≤C(RMNi) Refuse the movement satisfied for all i ? movement Dr. Jacob Rubinovitz
  • 21. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Part Flow Management Operation on part completed... The robot completed a delivery... Is the robot idle and is there some open space in the downstream station ? Checking if the transfer of each waiting part is unfeasible, No Yes feasible but refused, or feasible and accepted Transfer Transfer feasible: 2 or unfeasible: DAP applied to more Part waiting for allow or refuse the A part Number future transfer transfer selection of accepted 0 transfers ? rule is Transfer Transfer 1 used to refused: allowed: Parts requesting pick a part Part waiting for Part actually movement The requesting future transfer moved by the remain at their part picked by robot locations. the robot Dr. Jacob Rubinovitz
  • 22. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Four Different Deadlock Avoidance Policies Static (SDAP) M1 M2 Dynamic (DDAP) FIFO Loading Discipline M3 applied to parts in the Entry Buffer Input Buffer Selective Static (SSDAP) Selective Dynamic (SDDAP) Step-by-step M1 M2 Selection from all the backward search different part types waiting M3 in the input buffer Entry Buffer Dr. Jacob Rubinovitz
  • 23. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Static Strategy Off-line Movement of a waiting On-line Create a CDG from the static part feasible information on machines, machine capacities and complete part type Determine the resulting number of parts routes in each relevant macro node X(RMN) Compute the relevant macro nodes RMNs and their capacities C(RMNs) Apply the deadlock avoidance method Dynamic Strategy On-line Movement of a waiting part feasible Create a CDG considering remaining machine sequences of each part in the system, and assuming that the requesting part was transported. Determine the current number of parts Compute the relevant macro in each relevant macro node X(RMN) nodes RMNs and their assuming that the requesting part was capacities C(RMNs). transported. Apply the deadlock avoidance method Dr. Jacob Rubinovitz
  • 24. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 R1 : M1→M2→M3 M1 M2 M3 Illustrative R2 : M3→M2→M1 |N|=3 Example A12=A23=A21=A32=1 Entry Buffer C={1,1,1} Gantt chart, schedule under a static strategy - SDAP or SSDAP M1 M2 M3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 WIP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Time Gantt chart, schedule under a dynamic strategy - DDAP M1 M2 M3 1 2 3 2 1 1 2 2 1 1 1 1 1 2 2 1 1 1 1 1 1 1 1 1 WIP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Time Gantt chart, schedule under a dynamic strategy - SDDAP M1 M2 M3 1 2 3 3 2 1 2 2 3 3 2 1 1 2 2 1 1 1 1 1 1 1 1 1 WIP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Time Dr. Jacob Rubinovitz
  • 25. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Experimental Setup CENTRAL STATION 2 # Processed Parts WAREHOUSE Initial State 0 EXIT STATION 0 0 STARVED STATION 1 STATION 3 CENTRAL BUFFER IDLE STARVED 0 STARVED 0 0 0 STATION 4 STATION 5 INSPECTION ENTRY STATION # Parts in System 0 Replication Number 0 STARVED Current Time 0 STARVED 08:00:00 0 Dr. Jacob Rubinovitz
  • 26. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 System Structure BP Static Deadlock Dynamic Deadlock External Avoidance Module Avoidance Module Module SBP SDAP SSDAP DDAP SDDAP Deadlock Cycle Reduction Algorithm Detection Module Part Flow Cycle Search Control Module Part Selection Rules Module Algorithm PSR1 PSR2 PSR3 PSR4 FMC Simulation Model (Arena) Dr. Jacob Rubinovitz
  • 27. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Experimental Design Four Different Deadlock Avoidance Policies M1 M2 Static (SDAP) Dynamic (DDAP) M3 Entry Buffer FIFO Loading Discipline applied to parts in the Input Buffer M1 M2 Selective Static (SSDAP) Step-by-step backward search M3 Selective Dynamic (SDDAP) Entry Buffer Selection from all the different part types waiting in the input buffer Dr. Jacob Rubinovitz
  • 28. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Experimental Design – 2 cell types part types machines, 4 : Cell A 3 part types machines, 5 : Cell B 6 Buffer Capacities Cell A Cell B 1 C(CB)=0, C(IB)={0}, CBS=4 C(CB)=0, C(IB)={0}, CBS=5 2 C(CB)=4, C(IB)={0}, CBS=8 C(CB)=5, C(IB)={0}, CBS=10 3 C(CB)=0, C(IB)={1}, CBS=8 C(CB)=0, C(IB)={1}, CBS=10 4 C(CB)=4, C(IB)={1}, CBS=12 C(CB)=5, C(IB)={1}, CBS=15 5 C(CB)=0, C(IB)={2}, CBS=12 C(CB)=0, C(IB)={2}, CBS=15 Dr. Jacob Rubinovitz
  • 29. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Experimental Design (Part Selection Rules (PSR PSR1 – priority to parts with minimum remaining processes PSR2 – priority to parts with maximum remaining processes PSR3 – priority based on part type PSR4 – priority based on resource (machine) type Dr. Jacob Rubinovitz
  • 30. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Experimental Design RII – Routing Intensity Index High RII Low RII Cell A RII = 1 RII = 2/3 Cell B RII = 0.9 RII = 0.6 Dr. Jacob Rubinovitz
  • 31. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Experimental Design High Routing Intensity Low Routing Intensity R1: M4→ M2→ M1→ M4→ M3→ M1 R1: M1→ M2→ M4→ M3 Cell R2: M1→ M2→ M3→ M4 R2: M4→ M1→ M3→ M2 R3: M3→ M2→ M4→ M1→ M3 N 1 N2 R3: M3→ M4→ M2 N1 N2 A N4 N3 N4 N3 R1: M1→ M5→ M3→ M4→ M2 R1: M1→ M2→ M3→ M4 Cell R2: M2→ M3→ M1 R2: M2→ M1→ M4 R3: M4→ M5→ M2→ M4 R3: M4→ M5→ M1 B R4: M1→ M4→ M3→ M5 R4: M5→ M4→ M2→ M1 R5: M5→ M4→ M3→ M2→ M1 N2 R5: M3→ M4→ M1 N2 N1 N R6: M4→ M1→ M2→ M5 1 N3 R6: M4→ M3→ M1 N3 N5 N5 N4 N4 Dr. Jacob Rubinovitz
  • 32. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Experimental Design – Product Mix Unbalanced mix Balanced mix P1=0.65 P1=P2=P3=0.333 Cell P2=0.25 A P3=0.10 P1=0.55 P1=P2=P3=P4=P5=P6= 0. 1666 Cell P2=0.20 B P3=0.10 P4=0.5 P5=0.5 P6=0.5 4 * 2 * 5 * 2 * 2 = 160 Dr. Jacob Rubinovitz
  • 33. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Results : C(CB)=0, C(IB)={0} Dr. Jacob Rubinovitz
  • 34. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Results : C(CB)=M, C(IB)={0} Dr. Jacob Rubinovitz
  • 35. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Results : C(CB)=0, C(IB)={1} Dr. Jacob Rubinovitz
  • 36. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Results : SDDAP performance for different buffer sizes Dr. Jacob Rubinovitz
  • 37. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Results : SDDAP performance for different buffer sizes Dr. Jacob Rubinovitz
  • 38. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Results : SDDAP performance for different buffer sizes . #Config Cell A Cell B 1 [87.8%,67.3%] [79.4%,69.7%] 2 [90.6%,82.3%] [92.4%,78.9%] 3 [92.4%,84.1%] [98.5%,80.9%] 4 [99.5%,92.2%] [98.7%,88.3%] 5 [96.2%,82.4%] [99.8%,81.8%] Dr. Jacob Rubinovitz
  • 39. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Incorporating a Central Buffer Operation on a part completed: if the transfer is unfeasible or refused by the DAP, the part is moved to the central buffer CB, provided that there is some open space in it . The robot completed a delivery: the control system checks first all the parts currently in the CB. Priority is given to these parts in order to reduce the amount of average WIP in the CB. Dr. Jacob Rubinovitz
  • 40. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Conclusions - Efficiency: The static policies are inefficient and generate low throughput rates in single capacity cells (SCCs(, even after incorporating a central buffer. For this system configuration, SDDAP is the most appropriate operating policy. The DAPs have similar performance for double capacity cells (DCCs( with no central buffer; Throughput is slightly higher with SDDAP. The use of SDDAP is recommended for a high routing intensity level. High throughput rate is achieved for manufacturing cells of | M| machines with attached input buffers of single capacity and a |M| capacity central buffer. The superiority in terms of throughput of a selective policy (such as SSDAP or SDDAP( over a standard one (like SDAP or DDAP( is, as expected, more apparent when the part mix is balanced. Dr. Jacob Rubinovitz
  • 41. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Conclusions - Computational Complexity The computational complexity becomes higher in the following order of DAPs application: SDAP, SSDAP, DDAP, and SDDAP. SDDAP is computationally more intensive when applied respectively to Single, Double and Triple Capacity Cells. As a result, a static strategy may represent the best alternative for operating a system including machines with buffers of capacity two or more. Under such conditions, a static policy is not less efficient than a dynamic one, generates less WIP, and is computationally much less complex. Dr. Jacob Rubinovitz
  • 42. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Potential Implementation: Cluster Tools NEXUS 600 Six-port cluster tool that will accommodate four process modules and dual load-locks and integrated wafer handler. NEXUS 600 NEXUS 800 Eight-port cluster tool that will accommodate six process modules and dual load-locks and integrated wafer handler. NEXUS 800 Dr. Jacob Rubinovitz
  • 43. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Questions? Dr. Jacob Rubinovitz
  • 44. Graduate Seminar - Deadlock Avoidance in FMS, June 2002 Results : Part Selection Rules Dr. Jacob Rubinovitz