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Harsh Vardhani, Deepak Agrawal, Abhishek Tripathi / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 6, November- December 2012, pp.343-346 Optimal Design Of CMOS Op- Amp Using Geometric Programming Harsh Vardhani*, Deepak Agrawal**, Abhishek Tripathi ^ *(Department of Electronics and communication, Suresh Gyan Vihar University, Jaipur.) ** (Department of Electronics and communication , Government Engineering College Jhalawar) ^(Department of Electronics and communication, Singhania University, Jhunjhunu, Rajasthan)ABSTRACTThe problem of CMOS op-amp circuit sizing is integrated system on a single chip, the digital andaddressed here. Given a circuit and its analog circuits are combined together. Thisperformance specifications, the goal is to integration of analog and digital circuits results in soautomatically determine the device sizes in order called mixed-signal integrated circuits. Though in anto meet the given performance specifications integrated system, the analog circuitry occupies awhile minimizing a cost function, such as a small physical area compared to the digitalweighted sum of the active area and power counterpart and becomes the bottleneck in designdissipation. The approach is based on the time reduction. The main reason for this is that theobservation that the first order behavior of a number of performance functions in an analogMOS transistor in the saturation region is such circuit is much larger than that in a digital circuit.that the cost and the constraint functions for this Further, analog performances are very sensitive tooptimization problem can be modeled as the design variables and variation in theposynomial in the design variables. The problem performance across the design space is quite high.is then solved efficiently as a convex optimization Increase of design complexity and, at the same time,problem. Second order effects are then handled demand of design cycle time reduction due to highlyby formulating the problem as one of solving a competitive market can be managed only by the usesequence of convex programs. Numerical of computer aided design. CAD tools specificallyexperiments show that the solutions to the made to analog integrated circuit design promise tosequence of convex programs converge to the improve the design process in a variety of ways:--same design point for widely varying initial 1) By shortening design times:guesses. This strongly suggests that the approach 2) By simplifying the design process:is capable of determining the globally optimal 3) By improving the likelihood of error-free designssolution to the problem. Accuracy of from the first fabrication run:performance prediction in the sizing program 4) By reducing design and production cost:(implemented in MATLAB) is maintained by 5) By improving manufacturing yield:using a newly proposed MOS transistor model 6) By allowing easier tracking of fabricationand verified against detailed SPICE simulation. processeINTRODUCTION Design Formulation for Two-Stage CMOS The current trend in microelectronics is to OP-AMP Sizingintegrate a complete system that previously Two stage refers to the number of gainoccupied one or more boards on one or a few chips. stages. First gain stage is a differential input singleAlthough most of the functionality in an integrated ended output stage. The second gain stage issystem is implemented in digital circuitry, analog normally a common source gain stage that has ancircuits are needed to interface between the core active load. Capacitor Cc is included to ensuredigital system and the real world. Analog interface stability when the op-amp is used with feedback.circuits have, thus, become vital and indispensable Because Cc is between the input and the output ofparts of most digital circuits. They provide the the high gain second stage, it is often called Millernecessary signal conditioning and modification so capacitance. Since it’s effective capacitive load onthat they can be processed digitally. Interface the first stage is larger than its physical value In thecircuits span a wide variety of functions and class of two-stage op-amps, there is a basicapplications such as data acquisition systems, A/D structural similarity, namely the hierarchicaland D/A converters, particle and radiation detection structure of different configurations is the same. It iscircuits, automotive electronics, biomedical only the sub circuits, which are the leaf cells of theinstrumentation and control circuits, robot sensing, hierarchy that are different across the variousindustrial process monitoring, implantable topologies. A two-stage op-amp consists of an inputbiomedical instruments, preamplifiers, compressors, stage, a second stage, and a compensating circuit.power drivers, etc. Therefore, to realize an The input stage has three parts:-- 343 | P a g e
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Harsh Vardhani, Deepak Agrawal, Abhishek Tripathi / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 6, November- December 2012, pp.343-3461. Current Source, The term `monomial, which is used here (in the2. Differential Pair context of geometric programming) is similar to, but3. Current Mirror. differs from the standard definition of `monomialThe second stage has two parts:-- used in algebra. In algebra, a monomial has the form1. Transconductance Amplifier (1), but the exponents ai must be nonnegative2. Active Load. integers, and the coefficient c is one. A sum of one or more monomials, i.e., a function of Each one of the four sub circuits, namely the formdifferential pair, current mirror, transconductanceamplifier, and active load, can be either simple or K Kcascoded. For a cascoded current mirror, a levelshifter is required between the input stage and the k 1 f(x) = k 1 ckx1a1k…… xnank (2)second stage. The compensating circuit consists of acapacitor and a resistor. The transistors in the where ck > 0, is called a posynomialdifferential pair can either be n-type or p-type. The function or, a posynomial (with K terms, in thechoice of polarity of the transistors in the differentia variables x1,…….., xn). The term `posynomial isl pair also determines the polarity of the transistors meant to suggest a combination of `positive andin the other subcircuits. `polynomial. Any monomial is also a posynomial. Posynomials are closed under addition, multiplication, and positive scaling. Posynomials can be divided by monomials (with the result also a posynomial) i.e. if f is a posynomial and g is a monomial, then f/g is a posynomial. If is a nonnegative integer and f is a posynomial, then f γ is a posynomial (since it is the product of posynomials). Standard form geometric program A geometric program (GP) is an optimization problem of the form minimize f0(x) subject to fi(x) 1; i = 1,….,m; (3) gi(x) = 1; i = 1,…,p;Fig .Two Stage CMOS Op-Amp where fi are posynomial functions, gi isBasic geometric programming monomials, and xi is the optimization variables. Monomial and posynomial functions (There is an implicit constraint that the variables are Let x1,…….., xn denote n real positive positive, i.e., xi > 0.) We refer to the problem (3) asvariables and x = (x1,…….., xn) a vector with a geometric program in standard form. In a standardcomponents xi. A real valued function f of x, with form GP, the objective must be posynomial (and itthe form must be minimized) the equality constraints can only have the form of a monomial equal to one, andf(x) = cx1a1…… xnan (1) the inequality constraints can only have the form of a posynomial less than or equal to one. We can where c > 0 and ai R, is called a switch the sign of any of the exponents in anymonomial function, or more informally, a monomial monomial term in the objective or constraint(of the variables x1,…….., xn). Constant c is functions, and still have a GP. But if we change thereferred as the coefficient of the monomial, the sign of any of the coefficients, or change any of theconstants (a1,…, an) are referred as the exponents of additions to subtractions, the resulting problem isthe monomial. Any positive constant is a monomial, not a GP.as is any variable. Monomials are closed undermultiplication and division i.e. if f and g are both RESULTSmonomials then so are f*g and f/g. (This includes The CMOS op-amp sizing techniquescaling by any positive constant.) A monomial described has been implemented in MATLAB forraised to any power is also a monomial:- two stage CMOS op-amp. In the implementation ,convex programming problem is solved by using f(x ) γ =( cx1a1…… xnan )γ the sequential quadratic programming method which is available in optimization toolbox. Experimental results are given below. Table 1 consists of spice 344 | P a g e
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Harsh Vardhani, Deepak Agrawal, Abhishek Tripathi / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 6, November- December 2012, pp.343-346simulation results using optimal design point method converges to the same final design point forvariables against various given specifications. widely varying initial design points. This is achieved by modeling VGT, gm, and gd as a PoP function of the transistor sizes and the bias current at a ―relaxed‖ estimate of the dc operating point. Because of this iterative formulation, as the iterant proceed and approach convergence, the coefficient and powers of the first-order PoP model are made accurate via the use of second order model functions.Restricting the devices to operate in the saturation region is done because in standard CMOS op-amp design, the mosfets that are used as loads or amplification devices are biased in the saturation region for, among other reasons, the low gd that is achievable in this region. There are specific exceptions to this rule, e.g., when a parallel connection of an NMOS and PMOS device is used to build a resistor, or the common mode feedback transistor in a fully differential two-stage op-amp. SCP (Sequential Convex Programming) approach can be applied to MOS circuits without concerningFigure5 : Common Mode Range about the region of operation of the individual devices, or even for bipolar circuits if the iterative model-optimize approach is applied appropriately.For this it is required that the derived device parameters, e.g., gm and gd , be modeled as PoP functions of the independent design variables and that these PoP models become accurate approximations of the original device models as the iterants converge.There are certain performance metrics like settling time, which cannot be modeled as a suitable analytic function. While it is possible to meet a given settling time specification by suitably constraining slew rate, unity gain frequency, and phase margin (which are modeled as posynomials).Effort required to derive analytic expressions of performance metrics (for a new op- amp) is a hindrance to the widespread use of techniques such as described here but this hurdle should be crossed in order to bring the major advantages of convex optimization into a trulyFigure6 : Input Offset Voltage automated circuit-sizing tool.CONCLUSION References An efficient technique for sizing CMOS [1] P. Mandal and V. Visvanathan, ―A newop-amps is used .The main concept in this approach approach for CMOS op-amp synthesis,‖ inis that the CMOS op-amp sizing problem can be Proc. 12thInt. Conf. VLSI Design, 1999,formulated as a sequence of (convex)geometric pp. 189–194.programs. Such a formulation has two major [2] P.E. Allen and D.R. Holberg, CMOSadvantages as enumerated below:-- analog circuit design. Holt Rinehart and Winston, 1987.1) Since the convex programming problem is very [3]. Pradip Mandal and V. Visvanathan,”well understood, it is very straight forward to solve CMOS Op-Amp Sizing Using a Geometricit in a robust and computationally efficient manner. Programming Formulation,‖IEEE2) The sequence of solutions generated is a Transactions on Computer- Aided Designsequence of global optimal of convex programming of Integrated Circuits and Systems, Vol.sub problems. It suggests that the point to which this 20, No. 1, January 2001.sequence converges is the globally optimal solution [4] Stephen P. Boyd, Seung Jean Kim, Lievenof the original problem. This is supported by Vandenberghe and Arash Hassibi ―Aexperimental results, where it is shown that the Tutorial on Geometric Programming‖ 345 | P a g e
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Harsh Vardhani, Deepak Agrawal, Abhishek Tripathi / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue 6, November- December 2012, pp.343-346[5] C. Taumazou and C. A. Markis, ―Analog IC design automation: Part I—Automated circuit generation: New concept and methods,‖ IEEE Trans. Computer-Aided Design, vol. 14, pp. 218–238, Feb. 1995.[6] S. Boyd and L. Vandenberghe. ―Convex Optimization.‖ Cambridge University Press, 2004.[7] A. Grace, ―Optimization Toolbox User’s Guide,‖ The Math Works Inc., Nov. 1992.[8] M. M. Hershenson, S. P. Boyd, and T. H. Lee, ―GPCAD: A tool for CMOS op-amp synthesis,‖ in Proc. Int. Conf. Computer- Aided Design, 1998, pp. 296–303.[9] G W.Roberts & Adel S. Sedra,‖SPICE second edition,‖ Oxford University Press, 1959.[10] David Johns & Ken Martin,‖ Analog Integrated Circuit Design‖, John Wiley & Sons, Inc., 1958.[11] Behzad Razavi,‖ Design of Analog CMOS Integrated Circuits ―, TMH, 2002. 346 | P a g e
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