Wamicon 2005 1 G Hz Clearwater Florida

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Wamicon 2005 1GHz Clearwater Florida

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Wamicon 2005 1 G Hz Clearwater Florida

  1. 1. M. Zamin Khan & R. Raut SSUET, Pakistan & Concordia University, Canada Presented by M. Zamin Khan
  2. 2. Agenda  Introduction and Motivation  Noise Figure and Optimization  Low Noise Amplifier Topologies  Proposed Design Approach  Simulation Results  Conclusion
  3. 3. Introduction LNA is a key component in RF-Front-End receiver  Enough gain  Over all noise figure  Linearity  Low power consumption RF Filter LNA Image-reject Filter L0
  4. 4. Motivation  The apparent simplicity of an LNA is misleading.  Design should be easy because of relatively few Components.  Trade-Offs complicate the design.  Proposed topology is suitable to design LNA for 0.65V power supply
  5. 5. Noise Figure represents how much the given system degrades the signal-to-noise ratio, which is defined as Noise Figure and Optimization-I
  6. 6. Noise Figure and Optimization-II • A LNA determines the performance of the communication system. • A system noise factor is defined as N o is e S t a g e 1 N o is e S t a g e 2 N o is e S t a g e M A 1 , F 1 A 2 , F 2 A M , F M R L V O U T R S m a t c h e d m a t c h e d V I N Ftot = F1 + (F2 – 1) / A1 2 + (F3-1)/(A1 2 A2 2 ) + … + (FM-1)/(A1 2 …AM-1 2 )
  7. 7.  Sensitivity in the system  Determine the over all NF  Add as little Noise as possible  Provide enough Gain Noise Figure and Optimization-III
  8. 8. LNA Topologies-I ---- Classical noise matching • Simply to provide 50 ohm impedance matching at the input port • Large noise penalty • One cannot obtain input matching and minimum N.F simultaneously
  9. 9. LNA Topologies-II ---- Inductively degenerated common- source amplifier To achieve lower noise and input matching, input impedance of the LNA is Disadvantages: • Cascode topology needs higher power supply • Consumes more power
  10. 10. Proposed design approach • The proposed topology works for low power supply such as 0.65V • Input matching without increasing any N.F • Casecode common source common gate topology gives higher Gain
  11. 11. Complete Schematic of proposed LNA Design
  12. 12. Simulation Results-I Power Gain=23dB N.F=1.1dB
  13. 13. Simulation Results-II S11=-13.5dB S22=-21dB
  14. 14. Simulation Results-III IIP3=-29dBm
  15. 15. Layout of the Proposed LNA
  16. 16. Comparison of various recent reported LNAs
  17. 17. Conclusion  Spectre simulation TSMC 0.18um CMOS technology  Low power supply=0.7V  Low N.F=1.1dB  High power gain=23dB  S11=-13.5dB(Good input matching)  S22=-21dB(Good output matching)  S12=-72dB  Very low power consumption=8.4mw
  18. 18. Thank You!

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