Pc interface


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PC based interface by Dr. Ashraf Aboshosha

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Pc interface

  1. 1. editor @icgst.com Tel.: 0020-12-1804952 Fax.: 0020-2-24115475
  2. 2. <ul><li>Von Neumann computer model : </li></ul><ul><li>Input </li></ul><ul><li>Output </li></ul><ul><li>Memory </li></ul><ul><li>CPU Central Processing Unit </li></ul>
  3. 3. Von Neumann model of computer architecture Memory CPU Output Input Control Bus Data Bus Address Bus
  4. 4. <ul><li>Hardware is the name given to the physical devices and circuitry of the computer. </li></ul><ul><li>Software refers to the programs written for the computer. </li></ul><ul><li>Firmware is the term given to programs stored in ROMs or in Programmable devices which permanently keep their stored information. </li></ul>
  5. 5. <ul><li>Computer based control </li></ul><ul><li>PLC based Control </li></ul><ul><li>Microprocessor based control </li></ul><ul><li>Microcontroller based control </li></ul>
  6. 6. <ul><li>Analog/Digital Interface </li></ul><ul><li>To interface two peripherals one of them is digital and the other one is analog we have to add analog to digital converter ( ADC ) and digital to analog converter ( DAC ). </li></ul>Analog Digital Interface Analog Digital ADC DAC
  7. 7. <ul><li>Synchronized/Asynchronized Interface </li></ul><ul><li>Two important categories of interface are used to connect peripherals: the first one is the synchronized interface which depends on a clock to order the data transfer. The second one is the asynchronized interface which can be accomplished without clock. To interface these peripherals together we need handshaking adaptor which regulates the data exchange between them. </li></ul>Synchronized/Asynchronized Interface.
  8. 8. <ul><li>Serial/Parallel Interface </li></ul><ul><li>To interface two peripherals one of them is parallel and the second is serial we have to use parallelizing and serializing stages to connect both of them. The parallelizing stage converts the serial pulses into parallel data while the serializing stage converts the parallel data into serial pulses. </li></ul>Parallel Serial Interface Serial Parallel Parallelizing Serializing
  9. 9. <ul><li>The microprocessor can be interfaced with the peripherals via several techniques, they are: </li></ul><ul><li>Memory space interface </li></ul><ul><li>I/O ports interface such as serial and parallel ports </li></ul><ul><li>Direct/internal bus interface using internal buses such as ISA, EISA, PCI, AGP, USB, SATA, IDE, SCSI, … </li></ul><ul><li>Indirect/external bus interface using external buses such as GPIB, CAMAC, CAN, etc. </li></ul>
  10. 10. Direct/Indirect Bus Interface Microprocessor Internal Bus External Bus Peripheral Peripheral Motherboard Direct bus interface Indirect bus interface
  11. 11. Intel Hub Architecture
  12. 12. <ul><li>Classification of System Bus: </li></ul><ul><li>According to Function </li></ul><ul><li>Data Bus </li></ul><ul><li>Control Bus </li></ul><ul><li>Address Bus </li></ul><ul><li>According to Location </li></ul><ul><li>Internal / Direct ISA, EISA, PCI, AGP, USB, SCSI, IDE, SATA, … </li></ul><ul><li>External / Indirect GPIB, CAMAC, CAN, … </li></ul><ul><li>According to Purpose </li></ul><ul><li>General Purpose Bus </li></ul><ul><li>Special Purpose Bus </li></ul><ul><li>The bus is not only a cable connection but also hardware, bus architecture, protocol, software and bus controller </li></ul>
  13. 13. <ul><li>PnP: Short for Plug and Play , PnP is an ability of a computer to detect and configure a new piece of hardware automatically, without the requirement of the user to physically configure the hardware device with jumpers or dipswitches. </li></ul><ul><li>For Plug and Play to operate properly on IBM compatible computers the user must have the following: </li></ul><ul><li>BIOS supporting Plug and Play </li></ul><ul><li>Operating systems supporting PnP </li></ul><ul><li>Peripheral with PnP support. </li></ul><ul><li>Today all new computers have PnP capabilities. Computers running Microsoft Windows no longer support non PnP devices. </li></ul>
  14. 14. Throughput (Baud-rate, Speed): Also known as &quot;communication speed&quot;, throughput is a numerical value used to illustrate the total amount of data transferred being transferred through the computer or device at that given time. This number is commonly represented in bits per second (bps) or bytes per second (Bps). 
  15. 15. Proprietary Term used to describe a product that is only compatible with a specific type of hardware, software, computer or manufacturer. When referring to computer hardware, it is recommended that you do not choose a proprietary device as it reduces compatibility and generally the capability of upgrading that product in the future. 
  16. 16. ISA BUS Introduced by IBM, ISA or Industry Standard Architecture was originally an 8-bit bus that was later expanded to a 16-bit bus in 1984. When this BUS was originally released it was a proprietary BUS, which allowed only IBM to create peripherals and the actual interface. However in the early 1980's other manufacturers were creating the bus. ISA BUS
  17. 17. Short for Extended Industry Standard Architecture , EISA was announced September of 1988. EISA is a computer bus designed by 9 competitors to compete with IBM's MCA BUS. These competitors were AST Research, Compaq, Epson, Hewlett Packard, NEC, Olivetti, Tandy, WYSE, and Zenith Data Systems. The EISA Bus provided 32-bit slots at  an 8.33 MHz cycle rate for the use with 386DX, or higher processors. In addition the EISA can accommodate a 16-bit ISA card in the first row. Unfortunately, while the EISA bus is backwards compatible and is not a proprietary bus the EISA bus never became widely used and is no longer found in computers today. The EISA Bus
  18. 18. PCI BUS Introduced by Intel in 1992, revised in 1993 to version 2.0, and later revised in 1995 to PCI 2.1. PCI is short for Peripheral Component Interconnect and is a 32-bit computer bus that is also available as a 64-bit bus today. The PCI bus is the most commonly used and found bus in computers today. The PCI bus version 2.1
  19. 19. <ul><li>PCI-X is a high performance bus that is designed to meet the increased I/O demands of technologies such as Fiber Channel, Gigabit Ethernet and Ultra3 SCSI. PCI-X capabilities include: </li></ul><ul><li>Up to 133 MHz bus speed, 64-Bit bandwidth, 1GB/sec throughput </li></ul><ul><li>More efficient bus operation for easier interface </li></ul><ul><li>Split Transactions allows an indicator device to make only one data request and relinquish the bus. Instead of constantly needing to poll the bus for a response. </li></ul><ul><li>Byte Count that enables indicator to specify  in advance the specific number of bytes requested, eliminating the inefficiency of speculative prefetches. </li></ul><ul><li>Backwards compatibility </li></ul>The PCI-X PCI X PCI
  20. 20. AGP: Introduced by Intel  in 1997, AGP or Advanced Graphic Port is a 32-bit bus designed for the high demands of 3-D graphics. AGP has a direct line to the computers memory which allows 3-D elements to be stored in the system memory instead of the video memory. For AGP to work in a computer must have the AGP slot which comes with most Pentium II and Pentium III machines. The computer also needs to be running Windows 95 OSR2.1, Windows 98, Windows 98 SE, Windows 2000, Windows ME or higher. The Advanced Graphic Port, AGP
  21. 21. <ul><li>First-generation SATA devices often operated at best a little faster than parallel ATA/133 devices. Subsequently, a 3 Gbit/s signaling rate was added to the physical layer (PHY layer), effectively doubling maximum data throughput from 150 MB/s to 300 MB/s. </li></ul><ul><li>For mechanical hard drives, SATA 3 Gbit/s transfer rate is expected to satisfy drive throughput requirements for some time, as the fastest mechanical drives barely saturate a SATA 1.5 Gbit/s link. </li></ul><ul><li>SATA Revision 3.0 (SATA 6Gb/s): Serial ATA International Organization presented the draft specification of SATA 6 Gbit/s physical layer in July 2008 and ratified its physical layer specification on August 18, 2008. The full 3.0 standard (peak throughput about 600MB/s) was released on May 27, 2009. </li></ul>
  22. 22. This is the parallel bus for data transfer from hard disk drives, CD-ROMs, Tape Backup drives, Zip drives, DVD-ROM, or any ATA peripheral to the IDE capable computer. Also it is known as Parallel ATA, to contrast with Serial ATA. The latest version features an 40 pin, 80 wire ribbon cable to connect motherboards to drives. Each such cable can support up to a maximum of two devices, with one drive on a cable configured as the master drive, and the other as the slave. This setting is normally handled by a small jumper block somewhere on the drive.
  23. 23. Small Computer System Interface , or SCSI (pronounced scuzzy ), is a set of standards for physically connecting and transferring data between computers and peripheral devices. The SCSI standards define commands, protocols, and electrical and optical interfaces. SCSI is most commonly used for hard disks and tape drives, but it can connect a wide range of other devices, including scanners and CD drives. The SCSI standard defines command sets for specific peripheral device types; the presence of &quot;unknown&quot; as one of these types means that in theory it can be used as an interface to almost any device, but the standard is highly pragmatic and addressed toward commercial requirements.
  24. 24. SCSI is an intelligent, peripheral, buffered, peer to peer interface. It hides the complexity of physical format. Every device attaches to the SCSI bus in a similar manner. Up to 8 or 16 devices can be attached to a single bus. There can be any number of hosts and peripheral devices but there should be at least one host. SCSI uses hand shake signals between devices, SCSI-1, SCSI-2 have the option of parity error checking. Starting with SCSI-U160 (part of SCSI-3) all commands and data are error checked by a CRC32 checksum.
  25. 25. USB ( Universal Serial Bus ) is a new external bus developed by Intel, Compaq, DEC, IBM, Microsoft, NEC and Northern Telcom and released to the public in 1996 with the Intel 430HX Triton II Mother Board. USB has the capability of transferring 12 Mbps, supporting up to 127 devices and only utilizing one IRQ. For PC computers to take advantage of USB the user must be running Windows 95 OSR2, Windows 98 or Windows 2000. Linux users also have the capability of running USB with the proper support drivers installed. USB cables are hot swappable which allows users to connect and disconnect the cable while the computer is on without any physical damage to the cable. USB Type A & B USB Logo USB mini
  26. 26. USB VERSIONS: USB 1.0 - The original release of USB supports 127 devices transferring 12 Mbps. USB 1.1 - Also known as full-speed USB, USB 1.1 is similar to the original release of USB however minor modifications for the hardware and the specifications. This version of USB still only supports a rate of 12 Mbps. USB 2.0 - USB 2.0 also known as hi-speed USB was developed by Compaq, Hewlett Packard, Intel, Lucent, Microsoft, NEC and Philips and was introduced in 2001. Hi-speed USB is capable of supporting  a transfer rate of up to 480 Mbps and is backwards compatible meaning it is capable of supporting USB 1.0 and 1.1 devices and cables.
  27. 27. <ul><li>USB Architecture: </li></ul><ul><li>Host </li></ul><ul><ul><li>One host per system </li></ul></ul><ul><ul><li>Typically the PC in standard USB topology </li></ul></ul><ul><ul><li>Can be any device in OTG </li></ul></ul><ul><li>Hub </li></ul><ul><ul><li>Provides connecting ports, power, terminations </li></ul></ul><ul><li>Device/Node (i.e. Slave) </li></ul><ul><ul><li>Peripheral application </li></ul></ul>
  28. 28. <ul><li>USB Specifications: </li></ul><ul><li>A unique connector </li></ul><ul><li>Hub topology </li></ul><ul><li>Auto detection and configuration </li></ul><ul><li>Low power </li></ul><ul><li>High Performance </li></ul><ul><li>Supports up to 127 external devices </li></ul><ul><li>Provides power </li></ul><ul><ul><li>BW:USB 1.1: 12 Mb/s, USB 2.0: 480 Mb/s </li></ul></ul>
  29. 29. <ul><li>USB Topology: </li></ul><ul><li>Maximum cable length of 30 meters </li></ul><ul><li>Maximum of five non-root hubs </li></ul><ul><li>Only a function is allowed in tier 7 </li></ul><ul><li>Maximum of six segments </li></ul><ul><li>Hub at center of each star </li></ul><ul><li>Each segment 5m max </li></ul><ul><li>Tiered star </li></ul>
  30. 30. <ul><li>USB Devices: </li></ul><ul><li>HUB </li></ul><ul><ul><li>Simplifies USB Connectivity </li></ul></ul><ul><ul><li>Detect attach and detach </li></ul></ul><ul><li>Functions </li></ul><ul><ul><li>USB devices that transmit or receive data </li></ul></ul>
  31. 31. <ul><li>By Apple </li></ul><ul><li>BW: </li></ul><ul><ul><li>400 Mbps </li></ul></ul><ul><ul><li>800 Mbps for 1394b </li></ul></ul><ul><ul><li>Can send more than a CD every 10 sec </li></ul></ul><ul><li>Plug & play </li></ul><ul><li>Support 63 devices </li></ul><ul><li>Provides power </li></ul><ul><li>Digital audio, video, external hard drives, … </li></ul>
  32. 32. <ul><li>The original FireWire was faster than USB when it came out. </li></ul><ul><li>Transfer rates of up to 400 Mbps. </li></ul><ul><li>The maximum distance between devices is 4.5 meters of cable length. </li></ul><ul><li>Eventually, FireWire 800 replaced USB 2.0 very easily. </li></ul><ul><li>FireWire 800 had a transfer rate of up to 800 Mbps. </li></ul><ul><li>The maximum distance of cable length between devices is 100 meters. </li></ul>
  33. 33. 12Mbps 480 Mbps USB 1.1 FW 400 USB 2.0 FW 800
  34. 34. USB FireWire On-bus power 2.5W 45W (!) Max # devices 127 63 Topology Star Tree Plug & Play Yes Yes Peer-to-peer connectivity No Yes Device Cost Low High
  35. 35. <ul><li>INTRODUCTION: </li></ul><ul><li>In 1965, Hewlett-Packard designed the Hewlett-Packard Interface Bus ( HP-IB ) to connect their line of programmable instruments to their computers. Because of its high transfer rates (nominally 1 Mbytes/s), this interface bus quickly gained popularity. It was later accepted as IEEE Standard 488-1975, and has evolved to ANSI/IEEE Standard 488.1 -1987. </li></ul><ul><li>Today, the name G eneral P urpose I nterface B us ( GPIB ) is more widely used than HP-IB. ANSI/IEEE 488.2 -1987 strengthened the original standard by defining precisely how controllers and instruments communicate. </li></ul><ul><li>S tandard C ommands for P rogrammable I nstruments ( SCPI ) took the command structures defined in IEEE 488.2 and created a single, comprehensive programming command set that is used with any SCPI instrument. Figure 1 summarizes GPIB history. </li></ul>
  36. 36. <ul><li>GPIB can connect 15 instruments (0~31 address can be assigned) to a PC (controller). The PC handles the transmission on the bus. </li></ul><ul><li>8 bits parallel transmission, up to 8 Mbits/s transmission speed. </li></ul><ul><li>The total cable length in a system should not exceed 20m (2m max. between a device and next device) </li></ul><ul><li>Text mode commands. (Easy to differentiate) </li></ul><ul><li>Using three handshake line for handshaking to ensure data transmission accuracy. </li></ul>
  37. 37. Oscilloscope Digital multi-meter Switch Function generator GPIB Interface
  38. 38. GPIB Connections Linear Configuration Star Configuration
  39. 39. Controller–area network ( CAN or CAN-bus) is a vehicle bus standard designed to allow microcontrollers and devices to communicate with each other within a vehicle without a host computer. The CAN Bus is an automotive bus developed by Robert Bosch, which has quickly gained acceptance into the automotive and aerospace industries. CAN is a serial bus protocol to connect individual systems and sensors as an alternative to conventional multi-wire looms. It allows automotive components to communicate on a single or dual-wire networked data bus up to 1Mbps.
  40. 40. In 2006, over 70% of all automobiles sold in North America will utilize CAN Bus technology. Beginning in 2008, the Society of Automotive Engineers (SAE) requires 100% of the vehicles sold in the USA to use the CAN Bus communication protocol while the European Union has similar laws. Several new after market devices have been introduced into the market that utilize the CAN Bus protocol but until now, there have been no new devices that assist the aging after market remote starter and alarm system technology. Now there is an after market module that offers remote starter and alarm connectivity to the CAN Bus communication protocol.
  41. 41. C ++ LaTeX IDL Matlab Labview HP-VEE Linux Qt