Performance evaluation of reversible logic based cntfet demultiplexer 2

422 views
342 views

Published on

Published in: Technology, Business
0 Comments
0 Likes
Statistics
Notes
  • Be the first to comment

  • Be the first to like this

No Downloads
Views
Total views
422
On SlideShare
0
From Embeds
0
Number of Embeds
1
Actions
Shares
0
Downloads
0
Comments
0
Likes
0
Embeds 0
No embeds

No notes for slide

Performance evaluation of reversible logic based cntfet demultiplexer 2

  1. 1. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, May - June (2013), © IAEME53PERFORMANCE EVALUATION OF REVERSIBLE LOGIC BASEDCNTFET DEMULTIPLEXERY.Varthamanan1, V.Kannan21Research scholar, Sathyabama University, Chennai, Tamilnadu, India - 6001192Principal, Jeppiaar Institute of Technology, Kunnam, Tamilnadu, India -631604ABSTRACTThis paper discuss about the design and analysis of a demultiplexer that is realizedusing carbon nano tube transistor using reversible logic. Reversible logic realization ofthe digital circuits offers numerous advantages then the conventional circuit design.Power analysis has been performed using HSPICE simulation software and the results areobtained for the 1:2 and 1:4 demultiplexer transient behavior and the power consumptionobtained is 0.8 and 1.6 nano watts respectively. Comparative analysis has been performedwith the conventional demultiplexer design to validate the proposed design performance.Keywords: CNTFET, Demultiplexer, Power, Reversible LogicI. INTRODUCTIONThe nano electronic is one of the greatest emerging fields of Nano Technology fordeveloping such kinds of computer systems and other electronic gadgets. The Nanotechnology is being introducing in every fields of the Science and Technology such as inBio technology, Bio Medical Science, Medical Science, Research, Aerospace andeducation etc. Nanotechnology is increasingly being used in consumer products across theglobe. Nanoelectronics encompass nanoscale circuits and devices including (but notlimited to) ultra-scaled FETs, quantum SETs, RTDs, spin devices, super lattice arrays,quantum coherent devices, molecular electronic devices, and carbon nanotubes.INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING& TECHNOLOGY (IJEET)ISSN 0976 – 6545(Print)ISSN 0976 – 6553(Online)Volume 4, Issue 3, May - June (2013), pp. 53-62© IAEME: www.iaeme.com/ijeet.aspJournal Impact Factor (2013): 5.5028 (Calculated by GISI)www.jifactor.comIJEET© I A E M E
  2. 2. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, May - June (2013), © IAEME54In designing of computer depends upon the fundamental components as AND,NAND, OR, NOR, NOT and XOR gates. The designing of combinational circuits,memory and registers also depends upon these basic gates. To develop these logic gates atnano scale (10-9), the whole computer can be developed with nano electronicscomponents. [8].CNT as a channel in the Field Effect Transistors (FET) of both n-CNFET and p-CNFET types that are used. Because of its very small size, it has been s that a CNT-basedFET switches reliably using much less power than a silicon-based device, and thus thenew device will consume less power than traditional t-gate multiplexer. CNT device usesthe fundamental Lorentz magnetic force from the basic laws of Electromagnetic as aswitching mechanism between two conducting CNTs. Since a demultiplexer is afundamental logic block, the new devices can have a wide range of applications in a widevariety of nano circuits.The most desirable future work involved in CNTFETs will be the transistor with higherreliability, cheap production cost, or the one with more enhanced performances.II. CARBON NANO TUBE FETCarbon nano tube structures are prominent in reducing the packaging density ofthe very large scale integrated circuits. The exceptional electrical properties of carbonnanotubes arise from the unique electronic structure of graphene itself that can roll up andform a hollow cylinder. The circumference of such carbon nanotube can be expressed interms of a chiral vector: Ĉh=nâ1+mâ2 which connects two crystallographically equivalentsites of the two-dimensional graphene sheet. Here n and m are integers and â1 and â2 arethe unit vectors of the hexagonal honeycomb lattice. Therefore, the structure of anycarbon nanotube can be described by an index with a pair of integers (n,m) that define itschiral vector.A carbon Nanotube’s band gap is directly affected by its chirality and diameter. Ifthose properties can be controlled, CNTs would be a promising candidate for future nano-scale transistor devices. Moreover, because of the lack of boundaries in the perfect andhollow cylinder structure of CNTs, there is no boundary scattering. CNTs are also quasi-1D materials in which only forward scattering and back scattering are allowed, and elasticscattering mean free paths in carbon nanotubes are long, typically on the order ofmicrometers. As a result, quasi-ballistic transport can be observed in nanotubes atrelatively long lengths and low fields.[1].Multi walled carbon nanotubes (MWCNTs) have huge potential for applications inelectronics because of both their metallic and semiconducting properties and their abilityto carry high current. CNTs can carry current density of the order 10 µA/nm2, whilestandard metal wires have a current carrying capability of the order 10 nA/nm2.Semiconducting CNTs have been used to fabricate CNTFETs, which show promise dueto their superior electrical characteristics over silicon based MOSFETs.[7].
  3. 3. International Journal of Electrical Engineering and Technology (IJEET)6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, MayFig..1Ballistic model of CNTFET has numerous advantages over other models. Carbonnano tube is embedded between the insulator and the siorole in deciding the electrical characteristics.Fig. 2. Ballistic Carbon Nano Tube Field Effect TransistorThe valence and conduction bands of the carbon nanotube are symmetric, whichallows complementary structures in appliimplies the possibility of deriving carbon nanotube transistors. Both the metallic and semiconducting nanotubes can be exploited in integrated circuits as interconnection and actdevices respectively [3-6].Carbon nanotubes have shown reliability issues when operated under high electricfield or temperature gradients.[7].International Journal of Electrical Engineering and Technology (IJEET), ISSN 09766553(Online) Volume 4, Issue 3, May - June (2013), © IAEME55Multi-Walled Nanotube TransistorBallistic model of CNTFET has numerous advantages over other models. Carbonnano tube is embedded between the insulator and the sio2 layers. Chirality plays an importantrole in deciding the electrical characteristics.Ballistic Carbon Nano Tube Field Effect TransistorThe valence and conduction bands of the carbon nanotube are symmetric, whichallows complementary structures in applications. The nearly ballistic transport at low biasimplies the possibility of deriving carbon nanotube transistors. Both the metallic and semiconducting nanotubes can be exploited in integrated circuits as interconnection and actCarbon nanotubes have shown reliability issues when operated under high electric[7]., ISSN 0976 –June (2013), © IAEMEBallistic model of CNTFET has numerous advantages over other models. Carbonhirality plays an importantThe valence and conduction bands of the carbon nanotube are symmetric, whichcations. The nearly ballistic transport at low biasimplies the possibility of deriving carbon nanotube transistors. Both the metallic and semiconducting nanotubes can be exploited in integrated circuits as interconnection and activeCarbon nanotubes have shown reliability issues when operated under high electric
  4. 4. International Journal of Electrical Engineering and Technology (IJEET)6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, MayIII. REVERSIBLE LOGIC IN DIGITAL CIRCUITSA Reversible circuit has the facility to generate a unique output vector from eachinput vector, and vice versa .The gate/ circuit does not loose information is calledNumber of inputs is equal to the number of outputs.input to other gate or as a primary output is called garbage.gate are called “garbage”. Fig.3 represents reversible logic gate with garbage.represents typical Feynman gate. Table I represents the truth table of 2X2 Feynman Gate.Fig. 3. A typical reversible logic componentTable I:Use as many outputs of every gate as possible, and thus minimize the garbage outputs. Do notcreate more constant inputs to gates that are absolutely necessary. Use as less number ofreversible gates as possible to achieve the goal.International Journal of Electrical Engineering and Technology (IJEET), ISSN 09766553(Online) Volume 4, Issue 3, May - June (2013), © IAEME56REVERSIBLE LOGIC IN DIGITAL CIRCUITSA Reversible circuit has the facility to generate a unique output vector from eachput vector, and vice versa .The gate/ circuit does not loose information is calledequal to the number of outputs. Every gate output that is not used asinput to other gate or as a primary output is called garbage. The unutilized outputs from aFig.3 represents reversible logic gate with garbage.represents typical Feynman gate. Table I represents the truth table of 2X2 Feynman Gate.A typical reversible logic componentFig. 4. Feynman gateTable I: 2 x 2 Feynman Gate truth tableUse as many outputs of every gate as possible, and thus minimize the garbage outputs. Do notcreate more constant inputs to gates that are absolutely necessary. Use as less number ofs as possible to achieve the goal., ISSN 0976 –June (2013), © IAEMEA Reversible circuit has the facility to generate a unique output vector from eachput vector, and vice versa .The gate/ circuit does not loose information is called reversible.Every gate output that is not used aslized outputs from aFig.3 represents reversible logic gate with garbage. Fig.4represents typical Feynman gate. Table I represents the truth table of 2X2 Feynman Gate.Use as many outputs of every gate as possible, and thus minimize the garbage outputs. Do notcreate more constant inputs to gates that are absolutely necessary. Use as less number of
  5. 5. International Journal of Electrical Engineering and Technology (IJEET)6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, MayTable II is the truth table of the 4X4 Feynman gate.Table II:IV. REVERSIBLE LOGIC IMPLEMENTATION IN CNTFETLogically reversible process is that the output can binput of a logic gate, and the converse is true. A one to one mapping exists between the inputstring and output string. Mathematically speaking the function is bijective. An example of thelogically reversible gate is NOTRealization of the reversible logic using CNTFET is shown in the Fig.6 and Fig.7 forthe proposed 1X2 and 1X4 demultiplexer circuits respectively.International Journal of Electrical Engineering and Technology (IJEET), ISSN 09766553(Online) Volume 4, Issue 3, May - June (2013), © IAEME57Fig. 5. Fredkin gateTable II is the truth table of the 4X4 Feynman gate.Table II: 4x 4 Feynman Gate truth tableREVERSIBLE LOGIC IMPLEMENTATION IN CNTFETLogically reversible process is that the output can be obtained by knowing the binaryinput of a logic gate, and the converse is true. A one to one mapping exists between the inputstring and output string. Mathematically speaking the function is bijective. An example of thelogically reversible gate is NOT gate.Realization of the reversible logic using CNTFET is shown in the Fig.6 and Fig.7 forthe proposed 1X2 and 1X4 demultiplexer circuits respectively., ISSN 0976 –June (2013), © IAEMEe obtained by knowing the binaryinput of a logic gate, and the converse is true. A one to one mapping exists between the inputstring and output string. Mathematically speaking the function is bijective. An example of theRealization of the reversible logic using CNTFET is shown in the Fig.6 and Fig.7 for
  6. 6. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, May - June (2013), © IAEME58Fig. 6. 1:2 DEMUX RealizationDemultiplexer realization using ballistic model of CNTFET is a novel approach in thedigital circuit designing. This model has electrical and physical properties that are superior toother models.Fig. 7. 1:4 DEMUX RealizationM941M23B=02B=0M8324SA5A2DEMUX1:2M1SA5M5A2SM4M7 6SVddS7M3SSSM6M10
  7. 7. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, May - June (2013), © IAEME59V. RESULTS AND CONCLUSIONFig. 8 and Fig.9 represents the 1X2 and 1X4 demultiplexer transient response usingreversible logic respectively.Fig.8 Transient Response of Reversible Logic 1:2 DemultiplexerFig.9 Transient Response of Reversible Logic 1:4 DemultiplexerFig.10 and Fig.11 represents the 1X2 and 1X4 CNTFET demultiplexer transient responseusing reversible logic respectively.
  8. 8. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, May - June (2013), © IAEME60Fig. 10Transient Response of Reversible Logic based CNTFET 1:2 DemultiplexerFig.11 Transient Response of Reversible Logic based CNTFET 1:4 DemultiplexerTable III gives the details of the number of transistors that have been used for reversibleCNTFET and other models.Table IV elaborates the power consumption of 1X2 and 1X4 demultiplexer circuits usingCNTFET reversible implementation and CMOS implementation.
  9. 9. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, May - June (2013), © IAEME61Table III: No. of transistors for Different Demultiplexer designTable 1V: Power Analysis of Different Demultiplexer DesignFig.12 represents the comprehensive analysis of power consumed by CMOS, Reversible andReversible realized CNTFET.Fig. 12 Comparative analysis of Power ConsumptionDemultiplexer has been designed using CNTFET with reversible logic. Comparisontable of power dissipation shows a greatest amount of power reduction has been achievedwith the standard CNTFET model over a conventional CMOS. The dynamicallyreconfigurable universal cells exhibit the possibility to realize dense, regular and highlyreconfigurable circuits in platform-based system on chip design. The unwanted growth ofmetallic tubes during the fabrication of CNTs is a major challenge that will affect thefabrication of robust CNT-based circuits.DescriptionNo. of TransistorsCMOS ReversibleReversibleCNTFET1:2 DEMUX 14 10 101:4 DEMUX 36 22 22DescriptionTotal Power Dissipation in nano wattsCMOS ReversibleReversibleCNTFET1:2 DEMUX 6.473 3.176 0.8601:4 DEMUX 9.782 6.353 1.765
  10. 10. International Journal of Electrical Engineering and Technology (IJEET)6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, MayREFERENCES[1] H. Dai, A. Javey, E. Pop, D. Mann, Y. Lu, "Electrical Properties and FieldTransistors of Carbon Nanotubes," Nano: Brief Reports and Reviews 1, 1 (2006).[2] Anisur Rahman, Jing Guo, Sunanotransistors. Electron Devices, IEEE[3] Dafeng Zhou, Tom J Kazmierski and Bashir M Alof a numerical ballistic CNT model forSpecification and Design Languages 2008,[4] I. O’Connor, J. Liu, F. Gaffiot. “CNTFET[5] Bipul C. Paul, Shinobu Fujita, Masaki Okanalysis of circuit performance of ballistic CNFET. InSan Francisco, CA, USA, 24-28 July 2006.[6]www.siemens.com/innovation/en/about_fande/corp_technology/partnerships_experts/uc_berkeley.htm[7] www.wikipedia.org[8] Comparative Study: MOSFET and CNTFET and the Effect of Length ModulationKuldeep Niranjan, Sanjay Srivastava, Jaikaran Singh, Mukesh TiwariRecent Technology and Engineering (IJRTE) ISSN: 22772012[9] Kavita L.Awade and Dr .Babasaheb Ambedkarin Biomedical Engineering”, InternationalEngineering & Technology (IJECET), Volume0976- 6464, ISSN Online: 0976AUTHORSY.VarthamananMaster Degree in Applied Electronics from Sathyabama University in the year2007. Currently he is doing PhD in Sathyabama University. He is workAssistant Professor in DepartmentChennai. His interested areas of research are Nano Electronicand Mixed Signal circuits.V.Kannan was born in Ariyalore, Tamilnadu, India in 1970. He receivedBachelor Degree in Electronics andKamarajar University in the year1991,control from BITS, Pilani in the yeUniversity, Chennai, in the year 2006. His interested areas of research areOptoelectronic Devices, VLSIImage Processing. He has 170Conferences to his credit. He has 20Principal, Jeppiaar Institute of Technology, Kunnam, Tamilnadu, India. He is a life memberof ISTE.International Journal of Electrical Engineering and Technology (IJEET), ISSN 09766553(Online) Volume 4, Issue 3, May - June (2013), © IAEME62A. Javey, E. Pop, D. Mann, Y. Lu, "Electrical Properties and FieldTransistors of Carbon Nanotubes," Nano: Brief Reports and Reviews 1, 1 (2006).Anisur Rahman, Jing Guo, Supriyo Datta, and Mark S. Lundstrom. Theory of ballisticElectron Devices, IEEE, 50(9):1853–1864, September 2003.Dafeng Zhou, Tom J Kazmierski and Bashir M Al-Hashimi, VHDL-AMS implementationof a numerical ballistic CNT model for logic circuit simulation - In IEEESpecification and Design Languages 2008, Southampton, SO17 1BJ, UK, 2008.I. O’Connor, J. Liu, F. Gaffiot. “CNTFET-based logic circuit design. IEEE-June 2006.Bipul C. Paul, Shinobu Fujita, Masaki Okajima, and Thomas Lee.Modeling andanalysis of circuit performance of ballistic CNFET. In 2006 Design Automation Conference28 July 2006.www.siemens.com/innovation/en/about_fande/corp_technology/partnerships_experts/uc_b[8] Comparative Study: MOSFET and CNTFET and the Effect of Length ModulationKuldeep Niranjan, Sanjay Srivastava, Jaikaran Singh, Mukesh Tiwari International Journal ofRecent Technology and Engineering (IJRTE) ISSN: 2277-3878, Volume-1, IssueDr .Babasaheb Ambedkar, “Emerging Trends of NanotechnologyInternational Journal of Electronics and CommunicationTechnology (IJECET), Volume 1, Issue 1, 2010, pp. 25 - 32, ISSN Print:976 –6472.Y.Varthamanan was born in Arani, Tamilnadu, India in 1967. He receivedMaster Degree in Applied Electronics from Sathyabama University in the year2007. Currently he is doing PhD in Sathyabama University. He is workAssistant Professor in Department of ECE in Jeppiaar Engineering College,Chennai. His interested areas of research are Nano Electronics, VLSI Designwas born in Ariyalore, Tamilnadu, India in 1970. He receivedBachelor Degree in Electronics and Communication Engineering from MaduraiKamarajar University in the year1991, Masters Degree in Electronics andcontrol from BITS, Pilani in the year 1996 and Ph.D., from SathyabamaUniversity, Chennai, in the year 2006. His interested areas of research areDesign, Nano Electronics, Digital Signal Processing andResearch publications in National / International Journals /has 20 years of experience in teaching and presently working asPrincipal, Jeppiaar Institute of Technology, Kunnam, Tamilnadu, India. He is a life member, ISSN 0976 –June (2013), © IAEMEA. Javey, E. Pop, D. Mann, Y. Lu, "Electrical Properties and Field-EffectTransistors of Carbon Nanotubes," Nano: Brief Reports and Reviews 1, 1 (2006).priyo Datta, and Mark S. Lundstrom. Theory of ballisticAMS implementationIEEE Forum onSouthampton, SO17 1BJ, UK, 2008.June 2006.ajima, and Thomas Lee.Modeling and2006 Design Automation Conference,www.siemens.com/innovation/en/about_fande/corp_technology/partnerships_experts/uc_b[8] Comparative Study: MOSFET and CNTFET and the Effect of Length ModulationInternational Journal of1, Issue-4, Octoberf Nanotechnologyournal of Electronics and Communication, ISSN Print:was born in Arani, Tamilnadu, India in 1967. He receivedMaster Degree in Applied Electronics from Sathyabama University in the year2007. Currently he is doing PhD in Sathyabama University. He is working asin Jeppiaar Engineering College,s, VLSI Designwas born in Ariyalore, Tamilnadu, India in 1970. He received hisfrom MaduraiMasters Degree in Electronics and., from SathyabamaUniversity, Chennai, in the year 2006. His interested areas of research areDesign, Nano Electronics, Digital Signal Processing andnal / International Journals /years of experience in teaching and presently working asPrincipal, Jeppiaar Institute of Technology, Kunnam, Tamilnadu, India. He is a life member

×