International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN   INTERNATIONAL JOURNAL OF ...
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 097...
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 097...
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 097...
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 097...
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 097...
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 097...
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 097...
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Implementation of cmos 3

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Implementation of cmos 3

  1. 1. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN INTERNATIONAL JOURNAL OF ELECTRONICS AND 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEMECOMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)ISSN 0976 – 6464(Print)ISSN 0976 – 6472(Online)Volume 4, Issue 1, January- February (2013), pp. 256-263 IJECET© IAEME: www.iaeme.com/ijecet.aspJournal Impact Factor (2012): 3.5930 (Calculated by GISI) ©IAEMEwww.jifactor.com IMPLEMENTATION OF CMOS 3.8 GHZ NARROW BAND PASS (HIGH Q) SWITCHED CAPACITOR FILTER IN 180 NM TECHNOLOGY prashant s. patel1, mehul l. patel2 1 E&C Engg Department, L.C.Institute of Technology, Mehsana, Gujarat, India, 2 E&C Engg.Department, L.C.Institute of Technology, Mehsana, Gujarat, India, ABSTRACT In the recent era of nano technology, a surging demand for high-quality monolithic MOSFET active filters in the fields of voice/data communications and instrumentations stimulated tremendous research and development (R&D) efforts of switched-capacitor filters (SCF). The most applications in high-frequency communication systems require narrow-bandpass filters (Q ≈ 20), with a rather tight tolerance in the center frequency accuracy along with operational amplifier (opamp). In this paper a SCF with the bandpass of 3.8 GHz is reported with the simulation result obtained in Taiwan Semiconductor Manufacturing Company (TSMC) 180nm Technology using Mentor Graphics Eldo Simulation tools. KEYWORDS: Bandpass Filter (BPF), CMOS Operational Amplifier, High Quality Factor Q, Switched Capacitor Filter (SCF) 1 INTRODUCTION In the VLSI system design, implementation of passive elements such as resistors, inductors, etc on layout platform creates significant problems for the designers. Further it requires detail knowledge of the layout process with large layout area. To overcome these problems, Switched Capacitors (SC) techniques is significantly used instead of resistor. A resistor can be replaced by a combination of capacitor and two switches operated on toggle switch condition. The need to have monolithic analog filters motivated circuit designers in the late 1970s to investigate alternatives to conventional active-RC filters. With the current through the switched capacitor resistor proportional to the voltage across it, the equivalent “switched capacitor resistance (Req)” is given by [1], ܴ௘௤ ൌ 1ൗ‫ܥ ܨ‬ (1) ௦ Where Fs are the sampling frequency of the filter and C is the capacitor of the circuit. 256
  2. 2. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEME2. REALIZATION OF A SC FILTERRealizing a SC bandpass filter such as cascading simple biquadratic filters, ladder band passfilter or N-path techniques or two operational amplifiers can be implemented by variousmethods. All of them, mainly, any high-order transfer function can be realized by usingcascading biquadratic filters and first-order section, generally, the resulting circuit is oftendifficult to fabricate and very sensitive to finite op amp gain effects, stray resistance,capacitance and element-value variations. For filters that have to realize higher Q-value,ladder filter structure is employed. High capacitance spread ratio and requirement of the samenumber of op amps as the filter order for the implementation are the main difficulties inladder filter. For achieving even higher Q-values, filter designs based on the concept of N-path filter may be used. Several difficulties arise since the most high frequency applicationsrequire very narrow band filters. This lead to sensitivity problems because of the rapidlyincreased sensitivity of high Q filters for both to the ratio of the capacitors in the filter as wellas the gain and the settling behavior of the operational amplifier used in N path filter.3. A HIGH Q BANDPASS SC FILTER USING TWO OPERATIONAL AMPLIFIER In a high Q band pass filter using two operational amplifiers, the quality factor Q ofthe circuit is controllable through a single resistance. In general form the transfer function ofa band pass filter is given by [2] ௔ ௦ܶ ሺ‫ݏ‬ሻ ൌ ௔ ା௕ బ ௦మ ௦ା௕ (2) భ భ మWhere ao, a1, b1 and b2 are constantsThe quality factor Q of the band pass filter is governed by the term b1. It has infinite Q if b1approaches zero value but practically it is not possible although some high value up to Q≈20is easily possible.3.1 Two Stage Cmos Operational Amplifier Operational amplifiers are key elements in analog processing systems. Operationalamplifiers are an important part of many analog mixed signal systems. As the demand for thecompact integrated circuits increases largely, the design of analog circuits such as operationalamplifiers in CMOS technology becomes more critical. Operational amplifiers (op-amps)with moderate DC gains, high output swings and reasonable open loop gain band widthproduct (GBW) are usually implemented with two-stage structures. The op-amp which hasbeen designed is a two stage CMOS operational amplifier. Design has been carried out inMentor graphics tool. Simulation results have been verified using Eldo Simulation. Thesimulation results in a TSMC 0.18um CMOS process from a 2.3V voltage supplydemonstrate the designed has a gain 59.98dB. 257
  3. 3. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEME Fig: 1 a general structure of two stage operational amplifier [3]The general structure of two-stage op-amp is shown in Figure 1.The circuit consists of aninput differential trans-conductance stage which forms the input of the op-amp followed bycommon-source second stage. The common source second stage increases the DC gain by anorder of magnitude and maximizes the output signal swing for a given voltage supply. This isimportant for reducing the power consumption in two stage operational amplifier. Bias circuitis provided to establish the operating point for each transistor in its quiescent stage.Compensation is required to achieve stable closed loop performance. High voltage gain, largecommon-mode input range and a small number of transistors required for implementation arethe main advantages of this operational amplifier architecture. This op-amp is a widely usedgeneral purpose op-amp which finds applications in switched capacitor filters, analog todigital converters and sensing circuits.3.2 Implementation of Cmos Two Stage Operational Amplifier Using Tsmc 180nm Technology in Mentor Graphics Tool Fig: 2 Schematic of two stage CMOS operational amplifier [3] 258
  4. 4. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEME3.3 Simulation Results of Two Stage CMOS Operational Amplifier in TSMC 180nm Technology using Mentor Graphics Tool. Fig: 3 Simulation result for AC analysis for two stage operational amplifier in 180nm technology using Mentor Graphics tool. Fig: 4 Simulation result of transient analysis of two stage operational amplifier in 180nm technology using Mentor Graphics tool. 259
  5. 5. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEME3.4 Implementation of Actual Circuit for High Q Band Pass Filter using two stage operational amplifiers [2]. Fig: 5 Schematic of high Q SC bandpass filters using two stage operational amplifier [2].Simulation result (frequency response) of high Q SC bandpass filter using IC 3140 which isan operational amplifier gives the bandpass frequency of 11-40 MHz with the Q value of 1.8[2].4. Implementation of CMOS 3.8 GHz Bandpass SC Filter Using Different Voltage Sources in TSMC 180nm Technology using Mentor Graphics Tools. Fig: 6 Schematic of CMOS 3.8 GHz bandpass SCF using various voltage sources [4] 260
  6. 6. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEME Fig:7 Simulation result of bandpass filter at 3.8 GHz in TSMC 180nm Technology using Mentor Graphics Tools.Here due to some mismatch in transistors parameters and CMOS operational amplifieroperating condition, there is some fluctuation in output result shown in figure 7. Table:1 Comparison of high Q bandpass SC filter using two operational amplifier [2], CMOS 2.3 GHz Bandpass SCF using different voltage sources [4] and CMOS 3.8 GHz Bandpass SCF using different voltage sources (my work). CMOS 2.3 GHz High Q Bandpass Bandpass SCF Using My Work SCF Using Two Characteristics Different Voltage (180nm, Stage Operational Sources(350nm, TSMC) Amplifier[2] TSMC)[4] Supply Voltage (V) 12 2.3 1.8 Power Dissipation (mW) 58.356 10.356 8.835 Bandpass Frequency 11- 40 MHz 2.2- 2.4 GHz 1.8 - 3.8 GHz Slew rate N.A. 1.8721MEG 1.5955MEG Possible Q value ≈1.8 ≈26 ≈28 261
  7. 7. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEME5. CONCLUSION In most high frequency applications which require very narrow band filters whichlead to sensitivity problems because of the rapidly increased sensitivity of high Q filters.Though the sufficient level of sensitivity is achieved and the bandpass of 3.8 GHz with highQ≈28 value is achieved. This structure can further be explore using 90nm, 65nm, etc. and thestill high value of Q (≥28) can be achieved. From both the implementation method discussedin this paper, implementation of CMOS 3.8 GHz bandpass filter using different voltagesources is more preferable due to its low power dissipation and high Q value. The mostdesired application of narrow bandpass filter includes fast data/voice communication andinstrumentation.REFERENCES[1] Mingliang Liu, Demystifying switched capacitor circuits (UK: Library of Congress Catalog, ISBN 13: 978-0-7506-7907-7).[2] Seema Rana, Kapil Sharma, Kirat Pal, High Q band pass filter using two operational amplifiers, journal of physical sciences, Vol. 11, 2007, 133-138, April-2007[3] Phillip E. Allen, Douglas R. Holberg, CMOS analog circuit design, second edition (New York: Oxford University Press, 2002) 243-415.[4] David Cordova, Jorge Cruz, Carlos Silva, A 2.3 GHz CMOS high Q bandpass filter design using an active inductor, XV workshop iberchip, Buenos Aires - Argentina, 25 - 27 de Marzo de, 2009.[5] Amana Yadav, A review paper on design and synthesis of two stage CMOS Op-Amp, International journal of advances in engineering & technology, ISSN: 2231-1963, Jan 2012[6] Jose Silva Martinez, Edgar Sanchez Sinencio, Switched capacitor filter, (Texas a&M University, CRC Press LLC, Jan-2003) 85.1-85.6.[7] Rajinder Tiwari, R. K. Singh, Ganga Ram Mishra, “A New Approach For Design Of Cmos Based Cascode Current Mirror For Asp Applications”International journal of Electronics and Communication Engineering &Technology (IJECET), Volume 2, Issue 2, 2011, pp. 01-07, Published by IAEME.[8] Ms.Rashmi K Patil and Prof (Ms).Vrushali G Nasre, “Wide-Frequency-Range Cmos Voltage Controlled Oscillator for Phase Lock Loop – A Review” International journal of Electronics and Communication Engineering &Technology (IJECET), Volume 3, Issue 1, 2012, pp. 10-16, Published by IAEME.[9] Praveer Saxena, Swati Dhamani, Dinesh Chandra, Sampath Kumar V, “Modified Two Phases Drive Adiabatic Dynamic Cmos Logic” International journal of Electronics and Communication Engineering &Technology (IJECET),Volume 3,Issue 2, 2012, pp. 141-147, Published by IAEME.[10] Rajinder Tiwari, R. K. Singh, “An Innovative Approach of High Performance Cmos Current Conveyor - Ii for Analog Signal Processing Applications” International Journal of Computer Engineering & Technology (IJCET) Volume 3, Issue 1, 2012, pp 147-153, Published by IAEME 262
  8. 8. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 1, January- February (2013), © IAEME[11] Dhanisha N. Kapadia , Priyesh P. Gandhi, “Design And Simulation Of High Speed Cmos Differential Current Sensing Comparator In 0.35 µm And 0.25µ Technologies” International journal of Electronics and Communication Engineering &Technology (IJECET),Volume 3,Issue 3, 2012, pp. 147-152, Published by IAEME.[12] Rajinder Tiwari, R K Singh, “an Optimized High Speed Dual Mode Cmos Differential Amplifier for Analog Vlsiapplications” International Journal of Electrical Engineering & Technology (IJEET) Volume 3, Issue 1, 2012, pp. 180-187, Published by IAEME.[13] P.Sreenivasulu, Krishnna veni, Dr. K.Srinivasa Rao,Dr.A.VinayaBabu, “Low Power Design Techniques Of Cmos Digital Circuits” International journal of Electronics and Communication Engineering &Technology (IJECET),Volume 3,Issue 2, 2012, pp. 199-208, Published by IAEME.[14] Suhas. S. Khot, Prakash. W. Wani , Mukul. S. Sutaone and Saurabh.K.Bhise, “A 581/781 Msps 3-Bit Cmos Flash Adc Using Tiq Comparator” International journal of Electronics and Communication Engineering &Technology (IJECET),Volume 3, Issue 2, 2012, pp. 352-359, Published by IAEME.[15] S. S. Khot, P. W. Wani,M. S. Sutaone and S.K.Bhise, “A 555/690 Msps 4-Bit Cmos Flash Adc Using Tiq Comparator” International journal of Electronics and Communication Engineering &Technology (IJECET),Volume 3, Issue 2, 2012, pp. 373-382, Published by IAEME.[16] S. S. Khot, P. W. Wani, M. S. Sutaone and S.K.Bhise, “A Low Power 2.5 V, 5-Bit, 555-Mhz Flash Adc In 0.25µ Digital Cmos” International journal of Electronics and Communication Engineering &Technology (IJECET),Volume 3, Issue 2, 2012, pp. 533-542, Published by IAEME. 263

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