Your SlideShare is downloading. ×
Design of a uhf band lna using active inductor with ffp noise cancelling
Design of a uhf band lna using active inductor with ffp noise cancelling
Design of a uhf band lna using active inductor with ffp noise cancelling
Design of a uhf band lna using active inductor with ffp noise cancelling
Design of a uhf band lna using active inductor with ffp noise cancelling
Design of a uhf band lna using active inductor with ffp noise cancelling
Design of a uhf band lna using active inductor with ffp noise cancelling
Design of a uhf band lna using active inductor with ffp noise cancelling
Upcoming SlideShare
Loading in...5
×

Thanks for flagging this SlideShare!

Oops! An error has occurred.

×
Saving this for later? Get the SlideShare app to save on your phone or tablet. Read anywhere, anytime – even offline.
Text the download link to your phone
Standard text messaging rates apply

Design of a uhf band lna using active inductor with ffp noise cancelling

287

Published on

Published in: Technology, Business
1 Comment
0 Likes
Statistics
Notes
  • Mediafire Download : http://www.mediafire.com/download/o4awfjuj814d96r
       Reply 
    Are you sure you want to  Yes  No
    Your message goes here
  • Be the first to like this

No Downloads
Views
Total Views
287
On Slideshare
0
From Embeds
0
Number of Embeds
0
Actions
Shares
0
Downloads
15
Comments
1
Likes
0
Embeds 0
No embeds

Report content
Flagged as inappropriate Flag as inappropriate
Flag as inappropriate

Select your reason for flagging this presentation as inappropriate.

Cancel
No notes for slide

Transcript

  • 1. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 124 DESIGN OF A UHF BAND LNA USING ACTIVE INDUCTOR WITH FFP NOISE CANCELLING TECHNIQUE VIKAS KUMAR and R. S. GAMAD Department of Electronics & Instrumentation Engineering, Shri G. S. Institute of Technology and Science, Indore. ABSTRACT This paper reports an area-efficient LNA design using an active inductor which can be realised in various UHF band receivers. The overall low noise performance of LNA is achieved by cancelling the inductor noise through additional feed forward path. This circuit is implemented using 0.18µm CMOS technology with cadence environment and its operating range is 0.4 to 1- GHz. Design is simulated in virtuoso simulator and simulation results are measured. Noise figure is 1.6 to 3.0 dB for the UHF band and power dissipation of overall circuit is 14.03mw at 1.8V supply. KEYWORD: Cadence, MOS based Active Inductor, Feed forward path logic (FFP), Low Noise Amplifier (LNA), Spectre Simulator. 1. INTRODUCTION LNA is the first signal processing block in the receiving chain of any receiver thus its noise figure and voltage gain have the most significant impact on the sensitivity level. Also linearity and power consumption need to be considered in their design. Inductor used at gate terminal of LNA with parallel resistance can be used for matching which having resonance with the amplifier input capacitance results in greater noise figure more than 3 dB, this structure is only used in narrow band application such as RF identification (RFID) [1][2]. Resistive feedback can also be used for input impedance matching with the noise cancellation path introduced in may result in reduced noise figure but it suffers from high power consumption and limited bandwidth [3] [4]. INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET) ISSN 0976 – 6464(Print) ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June, 2013, pp. 124-131 © IAEME: www.iaeme.com/ijecet.asp Journal Impact Factor (2013): 5.8896 (Calculated by GISI) www.jifactor.com IJECET © I A E M E
  • 2. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 125 The common gate/source circuit can provide real input impedance matching but in both structure inductors is often an off-chip component because passive on chip inductors has low quality factor as well as large die area and lack of tenability. Thus need of active inductor is potentially generated. However the poor noise and linearity performance of active inductor has limited their use at LNA input in replacing passive inductors [5-9].This design has used active inductor as input matching circuit with feed forward path to noise cancellation. The proposed LNA is fully on chip with sma area and having high voltage gain as well as low noise figure and good linearity. 2. ACTIVE INDUCTOR USING MOS TECHNOLOGY Fig. 1: Active Inductor structure and RLC model The most common topology of active inductor is shown in figure 1 using two back to back transconductances Gm1 and Gm2 (a gyrator) and a capacitor [10, 11]. The input impedance of the circuit is inductive and given as (1) Where, Zin = Equivalent Input Impedance. Gm1 (combination of transistor M1 & M2) & Gm2 (of transistor M3) are back to back transconductance of Gyrator structure The circuit realization of gyrator concept (Gm1andGm2) is provided in [8][12][13] for which input impedance is inductive with high quality factor and higher resonant frequency. The inductance of the above inductor can be calculated by hybrid- π small signal model and calculated as:
  • 3. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 126 (2) L= Inductance of Equivalent gyrator circuit. C is the total capacitance seen at the gate. gm1 & gm3 are transconductance of transistor M1 & M3 respectively. Here M1 & M2 are assumed to be identical. 2.1 FEED FORWARD PATH Further for the improvement in noise performance of the above differential stage authors have added Feed forward path (FFP) as shown in figure 2. Design schematic of Active Inductor and proposed LNA are given in figure 3 and 4 respectively. This enhances the output current by factor Af, where Af is the gain magnitude of FFP and given as: Af = gmf * Rf (3) Fig. 2: Improving noise performance by feed forward path
  • 4. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 127 Fig. 3: Schematic of Active Inductor Fig. 4: Schematic of proposed LNA
  • 5. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 128 3. SIMULATION RESULTS AND DISCUSSION This work is carried out under the environment of cadence software. In this work authors have implemented the design with 0.18 micro meter technology than used spectre RF simulator for simulation. Simulation results are presented with applied voltage 1.8V and operating range is 0.4 to 1- GHz. Figure 5 shows the simulation response of the gain versus frequency and measured value is represented in figure with black block. Here authors have done the SP analysis to characterize the proposed design. Analysed the values of (S11 & S22) were -22.7149dB and -10.024 dB respectively shown in figure 6 and 7. Noise figure in frequency range 0.4 to 1GHz has shown in figure 7. Table 1 gives the comparison of the present results with the earlier work done in same field. From this table the authors have observed that this reported work has improved the parameters as compared the earlier published work with same technology. This work will be beneficial for young researchers, designers and manufacturers for high quality design, research and manufacturing. . Fig. 5: Gain frequency Plot
  • 6. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 129 Fig. 6: Measured S11 of the LNA Fig. 7: Measured S22 of the LNA
  • 7. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 130 Fig. 8: Noise Figure of the LNA Table 1: comparison of the present results with the earlier work done 4. CONCLUSIONS An LNA structure with improved active inductor implementation is presented. The noise generated by the gyrator of the active inductor is reduced by the feed forward path at the input. Thus improved noise performance of the LNA makes it suitable for the on chip input impedance matching. In addition to noise cancellation the summation of signals at output would reduce the second and third order harmonics caused by nonlinearity in FFP. The measurements shows that the overall noise performance is enhanced keeping the desirable gain and the overall dc power were low. Also the proposed LNA is capable of input matching over the entire UHF band with optimization of best desired performance. Ref. [9] [10] [11] [12] [13] This work Technology 0.18-µm CMOS 0.18-µm CMOS 0.18-µm CMOS 0.18-µm CMOS 0.18-µm CMOS 0.18-µm CMOS Frequency(GHz) 0.47-0.86 0.05-0.86 0.048-1.2 0.05-0.9 0.47-1.0 0.40-1.0 Noise Figure 4.5 3.1-4.4 3 2.1-3.4 2.3-2.7 1.6-3.5 Gain (dB) 25 18-19.5 14 16.4 18-23.5 20.57 VDD (V) N/A 1.8 2.2 1.8 1.8 1.8 DC Power (mW) 16 35.6 34.8 14.4 15.3 14.03
  • 8. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME 131 ACKNOWLEDGMENT This work has been carried out in SMDP VLSI laboratory of the Electronics and Instrumentation Engineering Department of Shri G. S. Institute of Technology and Science, Indore, India. This SMDP VLSI project is funded by Ministry of Information and Communication Technology, Government of India. Authors are thankful to the Ministry for the facilities provided under this project. REFRENCES [1] B. Razavi, RF Microelectronics. Englewood Cliffs, NJ: Prentice-Hall, 1997. [2] A. Safarian, A. Shameli, A. Rofougaran, M. Rofougaran, and F. De Flaviis, “RF identification (RFID) reader front ends with active blocker rejection,” IEEE Trans. Microw.Theory Tech., vol. 57, no. 5,pp. 1320–1329, May 2009. [3] B. Perumana, J.-H. Zhan, S. Taylor, B. Carlton, and J. Laskar, “Resistive-feedback CMOS low-noise amplifiers for multiband applications,”IEEE Trans. Microw. Theory Tech.,vol. 56, no. 5, pp.1218–1225, May 2008. [4] F. Bruccoleri, E. Klumperink, and B. Nauta, “Wide-band CMOS low noise amplifier exploiting thermal noise canceling,” IEEE J. Solid-State Circuits, vol. 39, no. 2, pp. 275– 282, Feb. 2004. [5] M. Reja, I. Filanovsky, and K. Moez, “A CMOS 2.0–11.2 GHz UWB LNA using active, inductor circuit,” in IEEE Int. Symp. Circuits Syst.(ISCAS), May 2008, pp. 2266–2269. [6] M. Nair, Y. Zheng, and Y. Lian, “1 V, 0.18 m-area and power efficient UWB LNA utilising active inductors,” Electron. Lett., vol. 44, no. 19,pp. 1127–1129, Nov. 2008. [7] A. Thanachayanont and A. Payne, “VHF CMOS integrated active inductor,”Electron. Let., vol. 32, no. 11, pp. 999–1000, May 1996. [8] D. DiClemente and F. Yuan, “Current-mode phase-locked loops—A new architecture,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54 no. 4, pp. 303–307, April 2007. [9] T. W. Kim and B. Kim, “A 13-dB IIP3 improved low-power CMOS RF programmable gain amplifier using differential circuit transconductance linearization for various terrestrial mobile D-TV applications,” IEEE J. Solid-State Circuits, vol. 41, no. 4, pp. 945–953, April 2006. [10] D. Im, I. Nam, and K. Lee, “A CMOS active feedback balun-LNA with high IIP2 for wideband digital TV receivers,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp.3566–3579, Dec. 2010. [11] D. Im, I. Nam, H.-T. Kim, and K. Lee, “A wideband CMOS low noise amplifier employing noise and IM2 distortion cancellation for a digital TV tuner,” IEEE J. Solid-State Circuits, vol.44, no. 3, pp. 686–698, March 2009. [12] Y.-H. Yu, Y.-S. Yang, and Y.-J. Chen, “A compact wideband CMOS low noise amplifier with gain flatness enhancement,” IEEE J. Solid-State Circuits, vol. 45, no. 3, pp. 502–509, March 2010. [13] Mohsen Moezzi and M. Sharif Bakhtiar, “Wideband LNA Using Active Inductor with Multiple Feed-Forward Noise Reduction Paths.” IEEE J. Trans. Microw. Theory Tech, vol 60, no.4, pp. 1069-1078, April 2012. [14] Aswathy G Nair and Gopakumar M G, “Cs-Cmos: A Low-Noise Logic Family For Mixed Signal Socs”, International Journal of Electronics and Communication Engineering & Technology (IJECET), Volume 4, Issue 2, 2013, pp. 180 - 190, ISSN Print: 0976- 6464, ISSN Online: 0976 –6472.

×