Apllictaions of improved gilbert multiplier 2
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Apllictaions of improved gilbert multiplier 2 Apllictaions of improved gilbert multiplier 2 Document Transcript

  • International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 2, March – April (2013), © IAEME462APPLICATIONS OF IMPROVED GILBERT MULTIPLIERKomal Mehna and Prof. B. P. SinghFET, Mody Institute of Technology & Science Lakshmangarh,Sikar (Rajsathan), IndiaABSTRACTWith the advancement in the field of electronics at an incredible pace, the powerefficient and high-speed VLSI designs are gaining more popularity and are highly in demand.The decrease in battery weight, size and increase in the lifetime are the key factors forportable equipments. Most of the reported multipliers have very poor performance and/orbecome non-functional in case of low-voltage, low-power environment. This paper describesvarious applications of analog multiplier such as frequency doubler, modulator, demodulatoretc. All the simulation work has been done on Tanner EDA tool at 45nm technology.Keywords : VLSI, Analog Multiplier, Gilbert Cell, CMOS Technology.1. INTRODUCTIONThe growing demand of data transfer via the wireless communication systems resultsin the fast development of various portable products [1]. The analog multipliers are basicbuilding blocks, used in many applications like mixers and modulators in communicationsystems, continuous time signal processing, automatic variable gain amplifiers, adaptivefilters, and neural networks [2]. The multiplier performs a linear product of continuoussignals x and y yielding an output z=kxy, where k is a constant of suitable dimension [3]. TheGilbert Cell Mixer is very useful building blocks in transceiver design [4]. Gilbert-cell mixersare among the popular classes of mixers which are used extensively in wireless transceivers.Among the important features of Gilbert-cell mixers are their large bandwidth and highconversion gain (CG) [5].INTERNATIONAL JOURNAL OF ELECTRONICS ANDCOMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)ISSN 0976 – 6464(Print)ISSN 0976 – 6472(Online)Volume 4, Issue 2, March – April, 2013, pp. 462-468© IAEME: www.iaeme.com/ijecet.aspJournal Impact Factor (2013): 5.8896 (Calculated by GISI)www.jifactor.comIJECET© I A E M E
  • International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 2, March – April (2013), © IAEME4632. DESCRIPTION OF THE PROPOSED CIRCUITGilbert cell has two important properties. The first property is that the small-signalgain of the circuit is a function of its tail current. The second property tells that the twotransistors in a differential pair provide a simple means of streeing the tail current to one ofthe two destinations [6], [7]. Existing 12T Gilbert cell multiplier [8] has been modified bygrounding the body terminal of all the nMOS transistors and connecting the body terminal oftransistor MP4 to DDV [9]. The positive and negative terminals of the output voltage ( OUTV ) areindicating Outp and Outn respectively in the proposed multiplier circuit of Fig. 1. Here CV isthe control voltage.For the conditionstnGSDS VVV −≥ and tnGS VV ≥Equation of the drain current in the saturation region for the nMOS is given by( )22tnGSnD VVkI −=All the transistors in Fig. 1 operate in the saturation region. Input signals are applied in thecomplementary form i.e.2121 & CC VVVV −=−=The input signal being varied and 4 21V is taken to approximately zero. So the output current[9]OUTnCDOUTRkVVRI 122=OUTI ∝ CVV1 (1)WhereOUTnDRkRk221 =Equation (1) indicates that the output current ( OUTI ) is proportional to the product of inputvoltages which is the property of the voltage multiplier so it is a voltage multiplier.
  • International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 2, March – April (2013), © IAEME464Fig. 1 Proposed multiplier3. SIMULATION RESULTSIn order to verify the circuit operation and characteristics, several experimentalsimulations have been carried out at the 45nm technology using Tanner EDA tool. Thetransient response of the proposed multiplier is shown in Fig. 2. Here input signals aresinusoidal with 10mv peak amplitude, frequency of V1 and VC are 500kHZ and 0.1GHZrespectively and the supply voltage is ± 0.8v. The aspect ratio of all transistors is taken 1. Theproposed multiplier had power consumption and power-delay product less than the existing12T Gilbert cell based multiplier almost 2 times and 4 times respectively [9].Fig. 2 Transient response of proposed multiplier
  • International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 2, March – April (2013), © IAEME4654. APPLICATIONS OF PROPOSED MULTIPLIER4.1 Frequency DoublerWhen a sinusoidal voltage ( tA ωsin ) is applied to the both inputs of the proposedmultiplier, output produced is double frequency of the input signal.tAVo ω22sin=( )tAVo ω2cos122−=Thus the output signal contains the DC component and cosine component offrequency ω2 , which twice of the input frequency.For example if the sinusoidal voltage of 50mv amplitude and frequency of 500kHz is given tothe inputs then the output voltage is proportional to ,as shown in Fig. 3. Thus proposedmultiplier can operate as frequency doubler.Fig. 3 Frequency doubler using proposed multiplier4.2 ModulatorThe growing demand of data transfer via the wireless communication systems resultsin the fast development of various portable products [10]. The purpose of a communicationsystem is to deliver a message signal from an information source in recognizable form to auser destination, with the source and the user being physically separated from each other [11].Modulation is the systematic alteration of one waveform, called the carrier, according to thecharacteristics of another waveform, the modulating signal or message [12]. A circuit, stageor piece of hardware that modulates is called a modulator.When two sinusoidal voltages of different frequencies (500 kHz and 0.1GHz) are appliedto the inputs of proposed multiplier presented in Fig. 1, the output results in a modulated sinewave as shown in Fig. 4 (a).
  • International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 2, March – April (2013), © IAEME466Fig. 4 (b) represents the triangular modulation of sine wave when one input is a sinusoidalvoltage and the other is a triangular voltage of lower frequency, the output is triangularmodulation of sinusoidal voltage. Thus the proposed multiplier circuit can also behave asmodulator.Fig. 4(a) Output waveform of modulator for sinusoidal inputFig. 4(b) Output waveform of modulator for triangular input4.3 DemodulatorTo reconstruct the transmitted signal, modulated signal must pass through a reversalprocess known as demodulation. A circuit, stage or piece of hardware that demodulates iscalled a demodulator. Proposed multiplier presented in Fig.1 can also act as demodulatorafter connecting capacitors at the output shown in Fig. 5.
  • International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 2, March – April (2013), © IAEME467Fig. 5 Demodulator using proposed multiplierTransient response of the proposed multiplier as demodulator is shown in Fig. 6. Inthis circuit two capacitor c1 and c2, each of 0.1pf, have been used. Here input signals aresinusoidal with 50mv peak amplitude, frequency of V1 and VC are 500kHZ and 0.1GHZrespectively and the supply voltage is ± 0.8v. Where 2121 & CC VVVV −=−= .Fig. 6 Output waveform of demodulator5. CONCLUSIONApplications of the proposed multiplier have been simulated at the 45nm technologyusing Tanner EDA tool. Simulation results demonstrate that the proposed multiplier can actas frequency doublers when both inputs have the same frequency. It can also be used asmodulator when one input has a higher frequency than other and demodulator.
  • International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 2, March – April (2013), © IAEME468REFERENCES[1] Yu-Hsin Chang, Chia-Yang Huang, and Yen-Chung Chiang, “A 24GHz Down-Conversion Mixer with Low Noise and High Gain,” Proceedings of the 7th EuropeanMicrowave Integrated Circuits Conference, pp. 285 – 288, Oct. 29-30, 2012[2] Jacek Jasielski, Stanislaw Kuta, Witold Machowski and Wojciech Kolodziejski, “Four-Quadrant CMOS Transconductance Multiplier Operating at Low Voltage and High-Speed,” MIXDES 2010, 17thInternational Conference Mixed Design of IntegratedCircuits and Systems, June 24-26, 2010, Wroclaw, Poland.[3] Om Prakash Kumar, J Michel Suman, and Mrs Flavia Princess “A Novel FourQuadrant CMOS Analog Multiplier,” International Conference on Devices, Circuits andSystems (ICDCS), pp. 149 – 152, March 15-16, 2012 .[4] Ms. Ujwala A. Belorkar, Dr. S.A. Ladhake, Member, and Dr. Sujata N. Kale, “2.45GHz Gilbert Mixer Using 45 nm CMOS Technology,” IEEE Business, Engineering &Industrial Applications Colloquium (BEIAC), 2012.[5] Hooman Rashtian, Amir Hossein Masnadi Shirazi, and Shahriar Mirabbasi“Improving Linearity of CMOS Gilbert-Cell Mixers using Body Biasing, ” Circuits andSystems (MWSCAS) , pp. 61 – 64, Aug. 5-8, 2012[6] B. Gilbert, "A precision four-quadrant multiplier with sub-nanosecond response," IEEEJ. Solid-state Circuits, Vol.SC-3, no. 6, pp. 353-365, Dec. 1968.[7] Behzad Razavi, Design of Analog CMOS Integrated Circuits (1sted. Tata McGraw-Hill, 2002).[8] Chander Shekhar, “Low Voltage Low Power Gilbert Cell Based Multiplier,”International Journal of Engineering Research and Applications (IJERA), Vol. 1, Issue1, pp. 011-014, June 2011.[9] Komal Mehna and B. P. Singh ,“Low Voltage Low Power High Speed AnalogMultiplier, ” International Conference on Technical and Executive Innovation inComputing and Communication (TEICC), Dec. 2012.[10] Yu-Hsin Chang, Chia-Yang Huang, and Yen-Chung Chiang, “A 24GHz Down-Conversion Mixer with Low Noise and High Gain,” Proceedings of the 7th EuropeanMicrowave Integrated Circuits Conference, Oct. 29-30, 2012, pp. 285 – 288.[11] Sanjay Sharma, “Communication Systems (analog and digital),” S. K. Kataria & sons,Fourth Edition.[12] A. Bruce Carlson “Communication Systems- An Introduction to signal and noise inelectrical communication,” McGraw-Hill International Edition, Third Edition.[13] Mohit Kumar, “CMOS Current Multipliers in 0.5µm and 0.35µm Technology”,International journal of Electronics and Communication Engineering & Technology(IJECET), Volume 4, Issue 1, 2013, pp. 304 - 312, ISSN Print: 0976- 6464, ISSNOnline: 0976 –6472.[14] Rajinder Tiwari and R K Singh, “An Optimized High Speed Dual Mode CMOSDifferential Amplifier for Analog VLSI applications”, International Journal ofElectrical Engineering & Technology (IJEET), Volume 3, Issue 1, 2012, pp. 180 - 187,ISSN Print : 0976-6545, ISSN Online: 0976-6553.