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Analytical solution of 2d poisson’s equation using separation of variable method for fdsoi mosfet

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  • 1. International Journal of Electronics and Communication Engineering & Technology (IJECET), INTERNATIONAL JOURNAL OF ELECTRONICS AND ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Special Issue (November, 2013), © IAEME COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET) ISSN 0976 – 6464(Print) ISSN 0976 – 6472(Online) Special Issue (November, 2013), pp. 150-154 © IAEME: www.iaeme.com/ijecet.asp Journal Impact Factor (2013): 5.8896 (Calculated by GISI) www.jifactor.com IJECET ©IAEME Analytical Solution of 2d Poisson’s Equation Using Separation of Variable Method for FDSOI MOSFET Prashant Mani1, Manoj Kumar Pandey2 Research Scholar1, Director2 SRM University, NCR Campus Ghaziabad, India 1prashantmani29@gmail.com, 2mkspandey@gmail.com ABSTRACT: A two–dimensional (2-D) analytical model for the surface potential variation along the channel in fully depleted silicon-on-insulator MOSFETs is developed .Our Approach to solve poisson’s equation using suitable boundary conditions, results high accuracy to calculate the potential of the channel as compare to various approaches. A Simple and accurate analytical expression for surface potential in channel are derived. The proposed model will help to reduce Short Channel Effect, Drain Induced Barrier Lowering in Fully Depleted SOI MOSFETs etc KEYWORDS: SOI MOSFET, Poisson Equation, 2D Solution I. INTRODUCTION FULLY DEPLETED single-gate SOI MOSFETs are expected to become next-generation devices due to their superior short-channel immunity and ideal subthreshold characteristics. There have been many reports on their modeling of devices [1]–[11]. The assumption of constant surface potential used in the charge sharing models is invalid for submicrometer channel lengths. The solution of 2-D Poisson’s equation has been obtained using various approaches. Pseudo-2-D solutions of Poisson’s equation [12], [13] and a quasi-2-D technique [14], [15] have been reported in literature. The solution of 2-D Poisson’s equation by power series approach has also been obtained [16].However, the solution of 2-D Poisson’s equation by power series approach is obtained by neglecting the higher order terms and, hence, it is not as accurate as the other approaches. Analytical solution of 2-D Poisson’s equation by means of Green’s function technique [17] is another method to solve 2-DPoisson’s equation. This model solves 2-D Poisson’s equation using the separation of variables method. However, the boundary conditions used for the solution of Poisson’s equation are applicable only for bulk MOSFETs. This model solve the 2 D POISSON’S equation by using separation of variable method .First split the 2D Poisson’s equation in to one dimensional poisson’s equation and 2D laplace equation . International Conference on Communication Systems (ICCS-2013) B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India October 18-20, 2013 Page 150
  • 2. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Special Issue (November, 2013), © IAEME II. SOLUTION OF 2D POISSON’S EQUATION Fig. 1: Cross-sectional View MOSFET The cross-sectional view of an n-channel SOIMOSFET along the channel length is shown in Fig. 1. The source–SOI film and drain–SOI film junctions are located at y=0 and y= Leff, where Leff is the effective channel length .The front and back interfaces are located at Si-SiO2 at x=0 and x= ts, where ts is SOI film thickness. toxf and toxb are the thickness of frontgate an backgate oxide thickness Vgf and Vgb are the applied potential. In this paper, we consider a fully depleted (FD) SOI film. The Poisson’s equation inthe FD SOI film region is given by ( ) ( ) ( ) where NA is the doping concentration and is the potential at a particular point (x,y) in the SOI film. The boundary conditions required to solve the 2-D Poisson’s equation are ( ( ) ) (2) Where x=0 ( ( ) ) (3) Where x=ts ( ( ) (4) ) Where y=0 (5) Where y=Leff The separation of variable method applied on equation (1), following step involve   Split the 2D Poisson’s Equation in two parts, first one is one dimensional poisson’s equation and two dimensional laplace equation. Now 2D Laplace equation has all variable in one side. International Conference on Communication Systems (ICCS-2013) B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India October 18-20, 2013 Page 151
  • 3. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Special Issue (November, 2013), © IAEME ( ) ( ) ( ) Where ( ( ) ) ( ) ( ) ( ) In equation (8) ( ) is the solution of equation (6) and (7) with boundary conditions. III. (8) ( ) is the solution of equation SOLUTION OF ΨL(X) In equation below l is the solution of 1 D POISSON equation, using the boundary condition given (9) (10) Now after solving the above boundary condition we find the solution in the form of (11) The following graph is plotted between l and xi. From the graph we find out the result as in parabolic form. As the thickness of the silicon layer increases from 0 to 1.25*10-8 nm the surface potential decreases, but after more increase in si thickness the surface potential also increase. 1.62 1.61 1.6 1.59 li 1.58 1.57 1.56 1.55 0 4.17 10 9 8.33 10 9 1.25 10 8 1.67 10 8 2.08 10 8 2.5 10 8 xi Fig. 2: Potential variation along the channel thickness vary from ts=0 to ts=2.5*10-8nm International Conference on Communication Systems (ICCS-2013) B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India October 18-20, 2013 Page 152
  • 4. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Special Issue (November, 2013), © IAEME Where l is the potential of one dimensional poission equation and xi is the thickness of silicon film. IV. SOLUTION OF ΨS (X,Y) In equation (8) Ψs is the solution of 2 D Laplace equation, the boundary conditions required to solve the Laplace equation are given below. ( ( ( ) ) ( ) ( ) Where x=0 ) ( ) ( ) ( ) Where x=ts (14) (15) Where y=0 Where y=Leff (16) The solution comes in the form of summation of sin and sin hyperbolic terms. Here the terms can be explained as below .Where the Vr and V’r are defined as given below. inum1  Vr  si ox  toxf   inum2 iDnum  Vds  1   1  cos   ts   si  toxf sin   ts     ox    V’r Vr  iDnum 179.8942 179.89415 s j 179.8941 179.89405 179.894 7 1 10 1.5 10 7 2 10 7 2.5 10 7 3 10 7 3.5 10 7 Leff j Fig. 3: The Potential Variation along the Channel length. Leff =0 to Leff =3.5 10-7 nm The graph shows as the effective channel length increase the potential decrease. International Conference on Communication Systems (ICCS-2013) B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India October 18-20, 2013 Page 153
  • 5. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online), Special Issue (November, 2013), © IAEME V. RESULT AND FUTURE WORK SOI MOSFET based on an analytical solution of 2-D Poisson’s equation is presented. The effect of change in thickness of silicon film can be analyzed by fig. 2 and fig. 3 shows the outcome of potential as changes the effective channel length of proposed model. The 2D Poisson’s equation is solved analytically using the separation of variables technique. The solution will then extend to obtain the 3D Poisson’s equation of the small geometry SOI MOSFET. REFERENCES [1] K. K. Young, “Short-channel effect in fully depleted SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 36, pp. 399–401, 1989. [2] “Analysis of conduction in fully depleted SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 36, pp. 504–506, 1989. [3] R. H. Yan, A. Ourmazd, and K. F. Lee, “Scaling the Si MOSFET: From bulk to SOI to bulk,” IEEE Trans. Electron Devices, vol. 39, pp. 1704–1710, 1992. [4] H.-O. Yoachim, Y. Yamaguchi, K. Ishikawa, Y. Inoue, and T. Nishimura,“Simulation and 2D analytical modeling of sub threshold slope in ultrathin-film SOI MOSFETs down to 0.1 _m gate length,” IEEE Trans.Electron Devices, vol. 40, pp. 1812–1817, 1993. [5] S. R. Banna, P. C. H. Chan, P. K. Ko, C. T. Nguyen, and M. Chan,“Threshold voltage model for deep-submicrometer fully depleted SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 42, pp. 1949–1955,1995. [6] S. Pidin and M. Koyanagi, “Two-dimensional analytical subthreshold model and optimal scaling of fully-depleted SOI MOSFET down to 0.1_m channel length,” in Solid State Devices Mat. Tech. Dig., 1996, pp.309–310. [7] K. Suzuki, Y. Tosaka, T. Tanaka, H. Horie, and Y. Arimoto, “Scalingtheory for double-gate SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 40, pp. 2326–2329, 1993. [8] K. Suzuki and T. Sugii, “Analytical models for n -p double-gate SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 42, pp. 1940–1948,1995. [9] T. K. Chiang, Y. H. Wang, and M. P. Houng, “Modeling of threshold voltage and subthreshold swing of short-channel SOI MOSFETs,” Solid-State Electron, vol. 43, pp. 123–129, 1999. [10] D. J. Frank, Y. Taur, and H.-S. P. Wong, “Generalized scale length for 2D effects in MOSFETs,” IEEE Trans. Electron Devices, vol. ED-19, pp. 385–387. [11] S.-L. Jang, B.-R. Huang, and J.-J. Ju, “A unified analytical fully depleted and partially depleted SOI MOSFET model,” IEEE Trans. Electron Devices, vol. 46, pp. 1872–1876, 1998. [12] K. K. Young, “SCEs in fully depleted SOI MOSFETs,” IEEE Trans.Electron Devices, vol. 36, pp. 399–402, Apr. 1989. [13] H.-O. Joachim, Y. Yamaguchi, K. Ishikawa, I. Yasuo, and T. Nishimura,“Simulation and two dimensional analytical modeling of subthresholdslope in ultrathin-film SOI MOSFETs down to 0.1–_m gate length,” IEEE Trans. Electron Devices, vol. 40, pp. 1812–1817, Nov. 1993. [14] J.-Y. Guo and C.-Y. Wu, “A new 2-D analytic threshold voltage model for fully depleted short channel SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 40, pp. 1653–1661, Nov. 1993. [15] J. C. S.Woo, K.W. Terrill, and P. K.Vasudev, “Two dimensional analytic modeling of very thin SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 37, pp. 1999–2006, 1990. [16] K.-W. Su and J. B. Kuo, “Analytical threshold voltage formula including narrow channel effects for VLSI mesa-isolated fully depleted ultrathin silicon-on-insulator n-channel metal– oxide–silicon devices,”Jpn. J. Appl. Phys., vol. 34, pp. 4010–4019, 1995. [17] K. O. Jeppson, “Influence of the channel width on the threshold voltage modulation of MOSFETs,” Electron. Lett., vol. 11, pp. 297–299, 1975. International Conference on Communication Systems (ICCS-2013) B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India October 18-20, 2013 Page 154