A fast fpga based architecture for measuring the distance between

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A fast fpga based architecture for measuring the distance between

  1. 1. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME1A FAST FPGA BASED ARCHITECTURE FOR MEASURING THEDISTANCE BETWEEN TWO COLOR IMAGES USING MANHATTANDISTANCE METRICA. Hasnat1, S. Halder1, A. Hoque2, D. Bhattacharjee3, M. Nasipuri 31Dept. of Computer Science and Engineering, Government College of Engineering TextileTechnology, Berhampore, West Bengal, India,2Research Scholar, Kalyani University, West Bengal, India3Dept. of Computer Science and Engineering, Jadavpur University, Kolkata, India,ABSTRACTThis paper presents an efficient FPGA based architecture for measuring the distancebetween two RGB color images using Manhattan distance. There are a lot of research worksin literature to measure the distance between two images of same size like Euclidean method,Manhattan distance, Vector Cosine Angle Distance, Modified Euclidean distance based onhistogram etc. In the present work, Manhattan distance metric is used to measure the distancebetween two images due to its simplicity and wide acceptability and the FPGAimplementation of Manhattan distance method is designed in an efficient way. The resultshows that the architecture is able to operate at 171.585 MHz speed which is faster than anysoftware solution.Keywords: Distance metric, Manhattan distance, FPGA.I. INTRODUCTIONImage processing has become a vibrant area of research over the last few years anddistance measurement between two images is needed in many applications of it [1][2][3].There exist different distance metrics to measure the distance between two images of samesize i.e. Manhattan Distance [4][5], Euclidean Distance[4][5], Vector Cosine AngleDistance(VCAD) [5][6], Modified Euclidean Distance based on histogram index[4][5] etc.Among these distance metrics, Manhattan distance and Euclidean distance gives the metric ofdissimilarity whereas Vector Cosine Angle Distance and Modified Euclidean distance givesINTERNATIONAL JOURNAL OF ELECTRONICS ANDCOMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)ISSN 0976 – 6464(Print)ISSN 0976 – 6472(Online)Volume 4, Issue 3, May – June, 2013, pp. 01-10© IAEME: www.iaeme.com/ijecet.aspJournal Impact Factor (2013): 5.8896 (Calculated by GISI)www.jifactor.comIJECET© I A E M E
  2. 2. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME2the metric of similarity [6]. As the Manhattan Distance metric is the simple one, this paperfocuses on implementation FPGA based architecture for it.FPGA (Field Programmable Gate Array) design allows designers to design their ownmodules according to their needs and upgrade the system conveniently. The system designbased on FPGA is flexible with the advantages of parallelism, low cost and low powerconsumption [7]. The main purpose of our work is to design a feasible hardware circuitsbased on FPGA for Manhattan distance to measure distance between two images of same sizeto improve the processing speed.This paper is organized as follows: The section II presents the preprocessing of theimages needed for the FPGAA architecture. Section III presents the top level design of thecircuit. Section IV depicts the proposed system architecture for Manhattan distance metric.Section V shows the experimental results and finally section VI concludes and remarks aboutsome of the aspects analyzed in this paper of the paper.II. PREPROCESSINGThe proposed architecture for Manhattan Distance metric is implemented on XilinxSpartan3 XC3S50-5PQ208 FPGA. As the division operation is not allowed and division isneeded to calculate average distance in the present work images are resized into power of twoas average could be performed by only shift operation. So in this work each image is resizedinto pixel size. Fig. 1(b) shows the resized images of the original images shown in Fig. 1(a)(a)(b)(c)(d)(e)(f)(a) (b)Figure 1: Example of preprocessing (a) Original images (b) Resized images
  3. 3. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME3Another preprocessing is done for giving the input to the FPGA module. Two inputtext files have been generated using Matlab containing the Red, Green and Blue intensity of apixel in each row of the text file for two input images.III. MANHATTAN DISTANCEThe Manhattan distance computes the sum of difference in each dimension of twovectors in n dimensional vector space. It is the sum of the absolute differences of theircorresponding components. Manhattan distance is also called the 1L distance. If)....,( 21 nxxxu = and ).....,( 21 nyyyv = are two vectors in n dimensional hyper plane, then theManhattan Distance ),( vuMD between two vectors u, v is given by the Eq. 1.nn yxyxyxvuMD −++−+−= ....),( 2211∑=−=niii yx1(1)Now for two RGB scale images of size qp × , ),,(1 cbaI and ),,(2 cbaI where pa ....2,1= ,qb ..2,1= and 3,2,1=c where c represents color intensity values Red, Green, Bluerespectively. Manhattan Distance is measured using Eq. 2.∑∑∑= = =−=paqb ccbaIcbaIIIMD1 1312121 ),,(),,(),( (2)As the number of pixels, n which falls in skin region varies with varying size of the image, sorather than taking the absolute distance further the distance is being normalized using Eq. 3.nIIMDIIMD),(),( 21211 = (3)where n=total number of pixels considered.IV. TOP LEVEL DESIGNThe top level design of FPGA architecture for Manhattan distance metric is shown inFig 2. The proposed architecture takes one 8-bit value for each of the Red, Green, Blue colorchannels for each pixel of the 1stimage as input { 111 ,, BGR }. Likewise it also takes one 8-bitvalue for each of the red, green, blue color channels for each pixel of 2nd image asinput{ 222 ,, BGR }. Then the system calculates absolute difference between }{},{ 2121 GGRR −− and}{ 21 BB − . Then the system sums up all these absolute difference. This process is continued forall the pixels. After calculation of summation for all pixels the sum is divided by number ofpixels considered that is 128x128=16384 for the present system to get the average value. Fig.2 shows the top level design of proposed architecture.
  4. 4. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME4Figure 2: Top level Design Manhattan Distance metricV. SYSTEM ARCHITECTUREThe proposed architecture of FPGA based Manhattan distance measurement of twoimages is shown in Fig. 3. The architecture contains three modules for subtraction, threemodules for addition and one module for addition followed by division. The division isachieved by shifting operation. The modeling of the internal architecture of each block hasbeen designed using Very high-speed integrated circuit Hardware Description Language(VHDL). Each block is controlled by a global clock.Figure 3: System architecture of FPGA based Manhattan Distance calculation
  5. 5. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME5A. Subtractor ModuleThese modules take two 8-bit inputs and produce their absolute subtraction value in 8-bit. These blocks offer a latency of one clock cycle each. The symbolic representation of asubtractor block is shown in Fig. 4. Algorithm 1 describes the function of these modules.Figure 4: Symbolic representation of subtractor blockAlgorithm 1Algorithm Subtractor{Input: I1, I2}{Output: O}Begin21 IIO −= ;End {End of Algorithm}B. Adder ModuleThese modules take one 8-bit input and one 22-bit input and produce their summation valuein 22-bit. These blocks offer a latency of one clock cycle each. The symbolic representationof Adder block is shown in Fig. 5. Algorithm 2 describes the function of these modules.Figure 5: Symbolic representation of adder block
  6. 6. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME6Algorithm 2Algorithm Adder{Input: I1(in 8bits), I2(in 22 bits)}{Output: O}Begin//Append 14 zeros in left hand side of I1 to convert it into 22 //bits.I11 = "00000000000000" & I1;// Add I11 and I2O = I11 + I2;End {End of Algorithm}C. Adder with Shifter ModuleThese modules take three 22-bit inputs, add them and produce divides the sum with128×128. Here the division is performed by shifting the sum by 14 bits right shift. This blockoffers a latency of one clock cycle. The symbolic representation of Adder block is shown inFig. 6. Algorithm 3 describes the function of these modules.Figure 6: Symbolic representation of adder with shifter blockAlgorithm 3Algorithm Adder with Shifter{Input: I1 (in 22 bits), I2 (in 22 bits), I3 (in 22 bits)}{Output: O (in 10 bits)}BeginI123 = I1 + I2 + I3;O = I123 >> 14;End {End of Algorithm}VI. RTL SIMULATIONSimulation for the FPGA based Manhattan distance calculation architecture describedin this paper is done with the Model SimSE 6.2c. For the testing of the system correctness atestbench file is written in VHDL. The testbench file reads the values of R1, G1, B1 for apixel of the first image from a text file named Input1.txt and the values of R2, G2, B2 of
  7. 7. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME7second image from a text file called Input2.txt. The testbench writes the result in a differenttext file called Output.txt. The simulation result for the testbench is shown in the Fig. 7.Figure 7: Simulation ResultVII. EXPERIMENTAL RESULTThe FPGA based Manhattan distance calculation architecture was implemented onVHDL, synthesized for a Xilinx Spartan 3 XC3S50-5PQ208 FPGA with simulation on theModelsim 6.2c from Mentor Graphics Corporation. The device utilization summary is givenin Table 1. The architecture is capable of operating at a clock frequency of 171.585 MHz orthe minimum clock period is 5.828 ns. Hence for calculating the Manhattan distance of twoimages having image size 128×128 requires 0.095 ms.TABLE 1: DEVICE UTILIZATION SUMMARYUsage Total PercentageNumber of Slices 100 1408 7%Number of Slice Flip Flops 100 2816 3%Number of 4 input LUTs 180 2816 6%Number of bonded IOBs 58 140 41%Number of GCLKs 1 4 6%Some sample results with calculating Manhattan distance is shown in Fig. 8 to Fig. 14.(a) (b)Manhattan distance=127Figure 8: Manhattan distance (a) Image1 (b) Image2
  8. 8. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME8(a) (b)Manhattan distance=214Figure 9: Manhattan distance (a) Image1 (b) Image2(a) (b)Manhattan distance=127Figure 10: Manhattan distance (a) Image1 (b) Image2(a) (b)Manhattan distance=207Figure 11: Manhattan distance (a) Image1 (b) Image2(a) (b)Manhattan distance=117Figure 12: Manhattan distance (a) Image1 (b) Image2
  9. 9. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME9(a) (b)Manhattan distance=49Figure 13: Manhattan distance (a) Image1 (b) Image2(a) (b)Manhattan distance=65Figure 14: Manhattan distance (a) Image1 (b) Image2(a) (b)Manhattan distance=52Figure 14: Manhattan distance (a) Image1 (b) Image2VIII. CONCLUSIONThe FPGA based architecture for calculating the Manhattan distance between twoimages is useful in many image processing applications. This architecture is capable ofoperating at a speed 171.585 MHz on a Vertex 2P FPGA kit which is much faster than anysoftware solution and hence the proposed methodology is applicable in a real time system.
  10. 10. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME10ACKNOWLEDGMENTAuthors are thankful to the "Center for Microprocessor Application for TrainingEducation and Research", "Project on Storage Retrieval and Understanding of Video forMultimedia" at Computer Science & Engineering Department, Jadavpur University, forproviding infrastructural facilities during progress of the work. Two of the authors, Dr.Santanu Halder and Mr. Abul Hasnat, are thankful to Government College of Engineeringand Textile Technology, Berhampore,WB for kindly permitting them to carry on theresearch work.REFERENCES[1] R. C. Gonzalez, R. E. Woods, S. L. Eddins, “Digital Image processing usingMATLB”, Mc-Graw Hill, 2011.[2] W. K. Pratt, “Digital image processing”, A Wiley Interscience Publication, 1991.[3] R. C. Gonzalez, R. E. Woods, “Digital Image Processing”, Addison Wesley, 2002.[4] Jain Anil K,Vailaya Aditya, (1996), “Image retrieval using color and shape”, PatternRecognition, Volume 29, Issue 8, Pages 1233–1244.[5] Abul Hasnat, Santanu Halder, D. Bhattacharjee, M. Nasipuri, D. K. Basu, “ComparativeStudy of Distance Metrics for Finding Skin Color Similarity of Two Color FacialImages,” ACER 2013, pp. 99–108, 2013, DOI : 10.5121/csit.2013.3210.[6] A Vadivel, A K Majumdar, Shamik Sural, ( 2003),“Performance comparison ofdistance metrics in content-based Image retrieval applications”, InternationalConference on Information Technology (CIT), Bhubaneswar, India, pp. 159-164..[7] Jayaram Bhasker, A VHDL Primer, 3rdedition, P T R Prentice Hall, 1998.[8] K.Ganapathi Babu, A.Komali, V.Satish Kumar and A.S.K.Ratnam, “An Overview ofContent Based Image Retrieval Software Systems”, International journal of ComputerEngineering & Technology (IJCET), Volume 3, Issue 2, 2012, pp. 424 - 432,ISSN Print: 0976 – 6367, ISSN Online: 0976 – 6375.[9] Abhishek Choubey , Omprakash Firke and Bahgwan Swaroop Sharma, “Rotation andIllumination Invariant Image Retrieval using Texture Features”, International Journal ofElectronics and Communication Engineering &Technology (IJECET), Volume 3,Issue 2, 2012, pp. 48 - 55, ISSN Print: 0976- 6464, ISSN Online: 0976 –6472.[10] Tarun Dhar Diwan and Upasana Sinha, “Performance Analysis Is Basis on Color BasedImage Retrieval Technique”, International Journal of Computer Engineering &Technology (IJCET), Volume 4, Issue 1, 2013, pp. 131 - 140, ISSN Print: 0976 – 6367,ISSN Online: 0976 – 6375.

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