Your SlideShare is downloading. ×
AgO Product Overview
Upcoming SlideShare
Loading in...5

Thanks for flagging this SlideShare!

Oops! An error has occurred.


Introducing the official SlideShare app

Stunning, full-screen experience for iPhone and Android

Text the download link to your phone

Standard text messaging rates apply

AgO Product Overview


Published on

Published in: Design

  • Be the first to comment

  • Be the first to like this

No Downloads
Total Views
On Slideshare
From Embeds
Number of Embeds
Embeds 0
No embeds

Report content
Flagged as inappropriate Flag as inappropriate
Flag as inappropriate

Select your reason for flagging this presentation as inappropriate.

No notes for slide
  • AgO Analog and RF Circuit Optimization
  • Ago is an EDA company focused on Analog and RF optimization. I’d like to go briefly into the company background, to go over the challenges that we see in analog and RF design, then introduce AnXplorer and its optimization approach.
  • The company was founde in 2007. Founders were previously in senior CAD development positions at National Semiconductor. In that time, they had a strong track record for innovation with 8 patent awards and 15 research papers and of course experience in developing industrial quality software. Headquarters was established in Silicon Valley with the AgO brand in 2009. The AnXplorer product was announced and the worldwide sales channel was established during the first quarter of 2010.
  • Total cost of ownership is addressed in this slide
  • Before looking AnXplorer at let’s take a step back and look at classic Analog design methodology. A design project typically starts with the design specification and constraints. The analog designer would typically use a schematic based tool to define the topology of the circuit. Then, an iterative approach is taken using a transistor level simulator to evaluate performance of that topology with particular device sizes and then devices are resized in order to try to fulfill the requirements and constraints of the design and the process is repeated. Then the sized schematic is used to layout and further adjustments and iterations can take place after the layout and extraction phases.
  • AgO has assumed that the definition of the topology is something that requires real expertise from the analog designer. However, AnXplorer aims to automate the more tedious tasks of device resizing and running and evaluating Spice simulations. Once the optimization is complete then the design activity can progress to physical layout and extraction.
  • The inputs to AnXplorer follow well known industry standards making them quite compatible with existing design flows. To begin with the design team will start with an Un-sized circuit schematic. They will define design variables which would be used in the optimization and the objectives of the design. As a result of the optimization by AnXplorer, there will be a sized and centered net list, and additionally an Exploration Database for tradeoff analysis is available. This allows designers to investigate intermediate points during the optimization. So the output is an optimized and centered net list which should meet or exceed the objectives that are specified in the design objectives.
  • AnXplorer has been conceived to work with existing environments. Today, Cadence Spectre, Synopsys HSpice, Legend Design MSim are fully supported. The operating systems that are supported are Red Hat Enterprise Linux 5 32b and 64b and Ubuntu 10
  • So in conclusion, we see Analog and RF design is rapidly growing in importance. We see that managing the risk of a respin is a major challenge for design teams. With AnXplorer, we automate the resizing and simulation activities which are normally a tedious, iterative task for the designer. The AnXplorer high-performance optimizer should produce designs that meet objectives and constraints thus improving the productivity of the design team, improving yield, and reducing the probability of respins.
  • Transcript

    • 1. Analog & RF Circuit Optimization
    • 2. What we will talk about• Company Background• Challenges in Analog and RF design• Overview of AnXplorer• Competitive Differentiation2 © Copyright AgO Inc 2011
    • 3. Company Background• Founded in 2007• Held senior positions at National• Held senior position in GE and Toshiba• Awarded 8 Patents and 15 papers -National• AgO - Advanced Generation Optimization• Global Sales & Marketing Presence Q4 20113 © Copyright AgO Inc 2011
    • 4. Challenges in Analog & RF DesignMaximising yield• Validating greater numbers of process, voltage and temperature corners• Efficiently centering design across all PVT corners using Monte CarloAchieving design specification• Meeting or beating performance while minimising cost of implementation• Managing greater complexity in operating and power saving modesRespin avoidance• Analog circuits are responsible for ~ 50% of IC design re-spins• Re-spins can mean missing market windows and unbudgeted costsDesign porting• Moving existing circuit designs to similar technologies• Re-centering design to meet constraints of new technology4 © Copyright AgO Inc 2011
    • 5. Classic Analog DesignMethodology• Design methodology has changed little over the years• Manual, iterative design with many SPICE runs Design Define topology specification & & Spice constraints resize devices Physical layout & adjust Spice Extraction Layout verification5 © Copyright AgO Inc 2011
    • 6. Optimization Strategy Feasibility Global Optimization Centering DatabaseDescription Description Description Description• DC Operation • Single Corner • All Corners • Conflict• Increase Margin • Meet performance • Rapid Size • Change Priority• Quick check • Monte Carlo • Ready for P&R • System Analysis• Best Design Space • Ready for Center AgO Optimization Strategy6 © Copyright AgO Inc 2011
    • 7. AnXplorer Goals• Quickly size W/L a circuit in a given technology• Explore suitability of different design options• Robust design PVT variations using Monte Carlo• Support all types of devices• Explore results using database7 © Copyright AgO Inc 2011
    • 8. AgO Design MethodologyAnXplorer automates device resizing using SPICE runs Design specification & Define topology Feasibility constraints Global Physical layout & adjust Centering AnXplorer Extraction Layout verification8 © Copyright AgO Inc 2011
    • 9. Porting of Existing Circuits Common challenge • Port existing design in technology X (say 180 nm) to technology Y (in 180 nm) Technology X • Ensure that original design goals are met AnXplorer approach Porting • Start with original sized circuit • Define variable ranges for target circuit AnXplorer • “One click” command • Optimises and centers with new PVT corners Technology Y9 © Copyright AgO Inc 2011
    • 10. Prioritized Design Objectives• Most tools support a weight-based prioritisation for multiple objectives – Designer is often unsure of relative weights• AnXplorer supports hierarchical design objectives – User defines relative priority of different objectives• AnXplorer achieves important objectives before optimizing others10 © Copyright AgO Inc 2011
    • 11. Implicit Objectives• Imposes implicit objectives on Examples of sub- conditions of devices at DC circuits: operating point • transistors in• Customizable objectives saturation• Detects common sub-circuits and • transistors in linear imposes constraints on their region • current mirrors operating conditions • level shifters• Ensures a robust DC operating • differential pairs point • voltage reference• Feature only available for MOS • current mirror banks devices • etc11 © Copyright AgO Inc 2011
    • 12. Core Optimization Technology Early Optimisation tools • Frequently relied on traditional convex/gradient methods • These are known to have difficulty with multiple local minima AnXplorer • Based on Evolutionary algorithm • Capable of finding global minimum in presence of many local minima Supports both simulation-based • Successfully optimised tough tests e.g. optimization & equation-based optimization Rastrigin’s function • Optional logarithmic partitioning of design space12 © Copyright AgO Inc 2011
    • 13. Multiple Local Minimum13 © Copyright AgO Inc 2011
    • 14. Trade-off Analysis• Finds multiple design points satisfying design objectives• Creates exploration database for post- optimization analysis – Database stores all explored design points – Query language or GUI• Useful for trade-off analysis with conflicting objectives• Useful for “what-if” analysis14 © Copyright AgO Inc 2011
    • 15. Industry Standard Formats Compatible with existing design flows Un-sized circuit Definition of Design objectives Schematics Design variables AnXplorer Sized and centered Exploration net list database for Trade off analysis15 © Copyright AgO Inc 2011
    • 16. Design Environment• Spice Simulators – Cadence Spectre – Synopsys Finesim & HSpice – Mentor Eldo – Multi-threading support• Operating system – Red Hat Enterprise Linux RHEL 5 & 416 © Copyright AgO Inc 2011
    • 17. Competitive Differentiation • One product, four optimization steps • Robust centering to maximise yield –Monte Carlo • Implicit objectives for stable DC operation (CMOS) • Hierarchical design objectives • User can perform trade-off analysis • Industry standard formats and simulators • Core based on Evolutionary Algorithm17 © Copyright AgO Inc 2011
    • 18. Promotion • EE Times Global Coverage • Document Download 300 per month • No of customers engagement 50 in 2012 • Trade Show: DATE 2012 Dresden Germany18 © Copyright AgO Inc 2011
    • 19. Market Segment - Power19 © Copyright AgO Inc 2011
    • 20. HD TV20 © Copyright AgO Inc 2011
    • 21. Wireless 560 LTE Devices 83 Suppliers MIMO Technology © Copyright AgO Inc 2011
    • 22. Medical Devices • Low Power • Reliability • Performance • Long Life • Implant Devices $15B22 © Copyright AgO Inc 2011
    • 23. Analog and RF OptimizationNew generation Analog & RF Circuit OptimizationHillol