AgO Overview
Upcoming SlideShare
Loading in...5
×
 

AgO Overview

on

  • 157 views

Advanced Generation Optimization.

Advanced Generation Optimization.
www.ago-inc.com

Statistics

Views

Total Views
157
Views on SlideShare
157
Embed Views
0

Actions

Likes
0
Downloads
0
Comments
0

0 Embeds 0

No embeds

Accessibility

Categories

Upload Details

Uploaded via as Microsoft PowerPoint

Usage Rights

© All Rights Reserved

Report content

Flagged as inappropriate Flag as inappropriate
Flag as inappropriate

Select your reason for flagging this presentation as inappropriate.

Cancel
  • Full Name Full Name Comment goes here.
    Are you sure you want to
    Your message goes here
    Processing…
Post Comment
Edit your comment
  • AgO Analog and RF Circuit Optimization
  • Correct by construction
  • Commercial products available today failed to converge under multiple local minimum circuits
  • Have a good day www.ago-inc.com

AgO Overview AgO Overview Presentation Transcript

  • Analog & RF Circuit Optimization Hillol Sarkar Dr. Bish Ray
  • What we will talk about • Company Background • Challenges in Analog and RF design • Overview of AnXplorer • Competitive Differentiation 2 © Copyright AgO Inc 2011
  • Company Background • • • • • • 3 Founded in 2007 Held senior positions at National Held senior position in GE and Toshiba Awarded 8 Patents and 15 papers -National AgO - Advanced Generation Optimization Global Sales & Marketing Presence Q4 2011 © Copyright AgO Inc 2011 View slide
  • Challenges in Analog & RF Design Maximising yield • Validating greater numbers of process, voltage and temperature corners • Efficiently centering design across all PVT corners using Monte Carlo Achieving design specification • Meeting or beating performance while minimising cost of implementation • Managing greater complexity in operating and power saving modes Respin avoidance • Analog circuits are responsible for ~ 50% of IC design re-spins • Re-spins can mean missing market windows and unbudgeted costs Design porting • Moving existing circuit designs to similar technologies • Re-centering design to meet constraints of new technology 4 © Copyright AgO Inc 2011 View slide
  • Classic Analog Design Methodology • Design methodology has changed little over the years • Manual, iterative design with many SPICE runs Design specification & constraints Define topology & resize devices Spice Physical layout & adjust Spice Extraction Layout verification 5 © Copyright AgO Inc 2011
  • Optimization Strategy Feasibility Global Optimization Description • DC Operation • Increase Margin • Quick check • Best Design Space Description • Single Corner • Meet performance • Monte Carlo • Ready for Center Centering Description • All Corners • Rapid Size • Ready for P&R AgO Optimization Strategy 6 © Copyright AgO Inc 2011 Database Description • Conflict • Change Priority • System Analysis
  • AnXplorer Goals • • • • • 7 Quickly size W/L a circuit in a given technology Explore suitability of different design options Robust design PVT variations & Monte Carlo Support all types of devices Explore results using database © Copyright AgO Inc 2011
  • AgO Design Methodology AnXplorer automates device resizing using SPICE runs Design specification & constraints Define topology Feasibility Global Physical layout & adjust Centering AnXplorer Extraction Layout verification 8 © Copyright AgO Inc 2011
  • Porting of Existing Circuits Common challenge • Port existing design in technology X (say 180 nm) to technology Y (in 180 nm) • Ensure that original design goals are met AnXplorer approach • Start with original sized circuit • Define variable ranges for target circuit • “One click” command • Optimises and centers with new PVT corners 9 © Copyright AgO Inc 2011 Vendor X Porting Vendor Y
  • Prioritized Design Objectives • Most tools support a weight-based prioritisation for multiple objectives – Designer is often unsure of relative weights • AnXplorer supports hierarchical design objectives – User defines relative priority of different objectives • AnXplorer achieves important objectives before optimizing others 10 © Copyright AgO Inc 2011
  • Implicit Objectives • Imposes implicit objectives on conditions of devices at DC operating point • Customizable objectives • Detects common sub-circuits and imposes constraints on their operating conditions • Ensures a robust DC operating point • Feature only available for MOS devices 11 © Copyright AgO Inc 2011 Examples of subcircuits: • transistors in saturation • transistors in linear region • current mirrors • level shifters • differential pairs • voltage reference • current mirror banks • etc
  • Core Optimization Technology Early Optimisation tools • Frequently relied on traditional convex/gradient methods • These are known to have difficulty with multiple local minima AnXplorer • Based on Evolutionary algorithm • Capable of finding global minimum in presence of many local minima • Successfully optimised tough tests e.g. Rastrigin’s function • Optional logarithmic partitioning of design space 12 © Copyright AgO Inc 2011 Supports both simulation-based optimization & equation-based optimization
  • Multiple Local Minimum 13 © Copyright AgO Inc 2011
  • Trade-off Analysis • Finds multiple design points satisfying design objectives • Creates exploration database for postoptimization analysis – Database stores all explored design points – Query language or GUI • Useful for trade-off analysis with conflicting objectives • Useful for “what-if” analysis 14 © Copyright AgO Inc 2011
  • Industry Standard Formats Compatible with existing design flows Un-sized circuit Schematics Definition of Design variables Design objectives AnXplorer Sized and centered net list 15 © Copyright AgO Inc 2011 Exploration database for Trade off analysis
  • Design Environment • Spice Simulators – – – – – Cadence Spectre Synopsys Finesim & HSpice Mentor Eldo Silvaco Smart Spice Multi-threading support • Operating system – Red Hat Enterprise Linux RHEL 5 16 © Copyright AgO Inc 2011
  • Competitive Differentiation • One product, four optimization steps • Robust centering to maximise yield –Monte Carlo • Implicit objectives for stable DC operation (CMOS) • Hierarchical design objectives • User can perform trade-off analysis • Industry standard formats and simulators • Core based on Evolutionary Algorithm 17 © Copyright AgO Inc 2011
  • Analog and RF Optimization New generation Analog & RF Circuit Optimization Hillol.Sarkar@ago-inc.com Bish.Ray@atherspectrum.com