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Pbl report kkkl 2174 electric analogue

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  • 1. KKKL 2174 ANALOG ELECTRONIC REPORT PBL PROBLEM BASED LEARNING ASSIGNMENT TITLE : POSITIVE TRIGGER CIRCUIT (MONOSTABLE MODE) NAME 1) ABDUL HAKIM BIN ABDULLAH 2) IZA ROZWAN ISKANDAR BIN ZAKARIA MATRIC NO. A141188 A141204 LECTURER : Dr. ANUAR MIKDAD BIN MUAD Prof. Dr. MD. MAMUN BIN IBNE REAZ Dr. MUHAMMAD FAIZ BIN BUKHORI
  • 2. 1. Choice of topic and its relation with real world applications Monostable circuits are used as timers, pulse generators, waveform generators, and sweep generators for CRTs (cathode ray tubes) such as the ones found in some television (TV) receivers, older computer displays, oscilloscopes, and spectrum analyzers. Monostable circuits are useful for creating automatic delays in circuits, with a time that can be controlled by the circuit designer. Such a delay can be used for keeping an outside lamp on for a period of 20 seconds after movement is detected, or timing an egg boiling on a stove to ensure that it is cooked to perfection every time. Monostable means that once the circuit is switched on it will time once and then stop. In order to start it again it must be switched on manually a second time. 2. Theoretical concept of our design In this experiment, charging and discharging of capacitors concept is applied to the circuit used. When the power on, the voltage level in the capacitor C1 is less than 1/3 Vcc. This resets the internal Flip-Flop of IC and its output goes high and LED turns on.C1 then charges through R1. When the voltage level in C1 rises to 2/3 Vcc, output of IC turns low and LED turns off. This low output from pin 3 pulls the reset pin 4 to a low state and IC latches to off condition. The latching state continues even if the capacitor C1 discharges through the discharge pin 7 and voltage in C1 drops below 1/3 Vcc. The IC 555 works in a monostable or "singleshot" mode. Initially the attached external capacitor stays discharged internally (through a transistor). A negative trigger less than 1/3 VCC applied at pin #2 initiates a flip-flop action, quickly discharging the capacitor and subsequently driving the output high. This results in an exponential increase in the voltage across the capacitor. The time period of this change can be expressed through the formula, t = 1.1Ra.C. The capacitor is fully charged after this period when the voltage across it finally reaches 2/3 VCC. The flip-flop is then reset back by the internal comparator stage of the IC, resulting in an immediate discharge of the capacitor and ultimately the output shifts to logic low state.
  • 3. 3. Derivation of mathematical formulae – (20 marks). The standard equation for a charging capacitor is: e = E(1 - (-t/RC)). "e" is the capacitor voltage at some instant in time "E" is the supply voltage VCC, and " " is the base for natural logarithms, approximately 2.718 The value "t"denotes the time that has passed, in seconds, since the capacitor started charging. We already know that the capacitor will charge until its voltage reaches (2/3)+VCC, whatever that voltage may be. This doesn't give us absolute values for "e" or "E," but it does give us the ratio e/E = 2/3. We can use this to compute the time, t, required to charge capacitor C to the voltage that will activate the threshhold comparator: 2/3 = 1 - (-t/RC) -1/3 = - (-t/RC) 1/3 = (-t/RC) ln(1/3) = -t/RC -1.0986123 = -t/RC t = 1.0986123RC t = 1.1RC 4. Circuit simulation
  • 4. 5. Technical specification Monostable waveforms Figure Figure 1 illustrates the timing waveforms for the monostable mode, the trigger pulse on pin 2, must be higher than 1/3Vcc in the absence of a trigger pulse but is normally at about +Vcc, falls to less than 1/3 Vcc to trigger the start of the delay (high output) period. The trigger pulse makes the voltage on the inverting input of comparator 2 lower than its non-inverting input and so the comparator output goes high. This turns off the discharge transistor and the low output from the bistable is inverted by the inverter to make the output at pin 3 high. C1 commences charging from 0V towards +Vcc, but once VC1 reaches the discharge level of 2/3Vcc, Comparator 1 is triggered, the bistable is reset, the output at pin 3 goes low and the discharge transistor immediately discharges C1. As C1 is also connected to the non-inverting input of comparator 2, this voltage also falls, and as the trigger voltage on pin 2 is now high again after the trigger pulse, the 1/3Vcc threshold level that was active in the astable configuration is ignored as VC1 falls and C1 is fully discharged to 0V. No further action takes place until the arrival of a further trigger pulse at pin 2, and during this time the monostable is said to be in its stable state.
  • 5. 6. Discussion and conclusion DISCUSSION : In the monostable mode, the 555 timer acts as a "one-shot" pulse generator. The pulse begins when the 555 timer receives a signal at the trigger input that falls below a third of the voltage supply. The width of the output pulse is determined by the time constant of an RC network, which consists of a capacitor (C) and aresistor (R). The output pulse ends when the voltage on the capacitor equals 2/3 of the supply voltage. The output pulse width can be lengthened or shortened to the need of the specific application by adjusting the values of R and C. The output pulse width of time t, which is the time it takes to charge C to 2/3 of the supply voltage, is given by where t is in seconds, R is in ohms and C is in farads. A circuit which connects the output pin of the 555 to an LED,causing the LED to light up for the duration of the pulse. We will have a visual indication to verify our calculations is correct. The trigger pin of the 555 is connected to a push buttonmomentary switch, connecting it to ground when pressed. CONCLUSION : A 555 timer in monostable mode will output a high pulse (of voltage~Vcc) when the trigger pin in pulsed low. The duration of this output pulse is dependent on the values of R and C.